Akira Hatanaka
5ac8547a41
Use subword loads instead of a 4-byte load when the size of a structure (or a
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piece of it) that is being passed by value is smaller than a word.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138007 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 23:39:37 +00:00
Owen Anderson
78affc9ea1
STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate.
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Found by randomized testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:47:44 +00:00
Owen Anderson
846dd95f87
Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs have it unset.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138000 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:31:17 +00:00
Owen Anderson
14090bf263
Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions.
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Fixes a large class of disassembler crashes found by randomized testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:11:02 +00:00
Ivan Krasin
74af88a666
FastISel: avoid function calls between the materialization of the constant and its use.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137993 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:06:10 +00:00
Jim Grosbach
93b3eff623
Thumb assembly parsing and encoding for LDM instruction.
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Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 21:50:53 +00:00
Owen Anderson
847a7ad800
More Thumb1 decoding tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 20:05:06 +00:00
Devang Patel
727df2ca81
Add another test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137969 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 18:50:25 +00:00
Devang Patel
3f52c51e00
Add test to check type uniquing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137968 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 18:40:49 +00:00
Jim Grosbach
1eba8a66b6
Thumb assembly parsing and encoding for EOR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 18:10:38 +00:00
Jim Grosbach
0d1511c022
Thumb assembly parsing and encoding for CMP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 18:08:29 +00:00
James Molloy
dbe46744c5
Test commit; adding test for invalid LDRD which was part of the patch for r137647 but seemingly didn't get svn add'ed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137960 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 18:03:02 +00:00
Jim Grosbach
7750b8df6a
Thumb assembly parsing and encoding test for CMN.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137957 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:55:03 +00:00
Owen Anderson
7cf6d7a083
Port over BL/BLX to disassembly tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137954 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:43:52 +00:00
Jim Grosbach
6ea80e964b
ARM assembly parsing and encoding test for BX/BLX (register).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137949 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:02:28 +00:00
Jim Grosbach
ded439886a
ARM assembly parsing and encoding test for BL/BLX (immediate).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137948 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:00:09 +00:00
Richard Osborne
c4dcf323cc
Add intrinsics for SETEV, GETED, GETET.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137938 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 13:00:48 +00:00
Bruno Cardoso Lopes
24b90e2287
Cleanup vector logical ops in AVX and add use int versions for simple
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v2i64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137919 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 02:11:34 +00:00
Owen Anderson
3230e9537d
Port new Thumb1 encoding tests over to decoding tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137902 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 23:37:33 +00:00
Jim Grosbach
37f88c7812
ARM assembly parsing and encoding test for BKPT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137898 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 23:11:13 +00:00
Jim Grosbach
5b657de62b
ARM assembly parsing and encoding test for BIC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 23:00:53 +00:00
Jim Grosbach
395b453bed
Thumb assembly parsing and encoding for B.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:57:40 +00:00
Jim Grosbach
00f5d98205
Thumb assembly parsing and encoding for ASR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:49:09 +00:00
Eli Friedman
56efe24431
Atomic load/store handling for the passes using memdep (GVN, DSE, memcpyopt).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137888 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:22:24 +00:00
Bruno Cardoso Lopes
0dd80b0d69
Fix PR10688. Add support for spliting 256-bit vector shifts when the
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shift amount is variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137885 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:12:20 +00:00
Jim Grosbach
5a1cd045cd
Thumb assembly parsing and encoding for ADR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 20:37:40 +00:00
Jim Grosbach
53727fc659
Add a couple of FIXMEs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 20:35:57 +00:00
Devang Patel
cbfadfc4b3
Fix test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137847 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:48:28 +00:00
Devang Patel
4be7fb0742
Remove superficial test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137846 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:39:13 +00:00
Devang Patel
0cd513269f
Robustify test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137845 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:38:44 +00:00
Owen Anderson
4c81cf5dfc
Start building a Thumb1 decoding test file based on the Thumb1 parsing/encoding test file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137840 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:21:36 +00:00
Eli Friedman
447f95202a
Silly mistake from r137777; restore significant isStructTy() checks. While here, be a bit more defensive
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with unknown instructions.
Fixes PR10687.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137836 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:10:43 +00:00
Jim Grosbach
358499ea3b
Thumb assembly parsing and encoding for ADC(register) instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137833 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 17:55:28 +00:00
Jim Grosbach
b1ee18ee69
Add missing '@' delimiter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137832 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 17:46:01 +00:00
Owen Anderson
83e3f67fb6
Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
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Patch by James Molloy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137830 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 17:44:15 +00:00
Bruno Cardoso Lopes
0e6d230abd
Introduce matching patterns for vbroadcast AVX instruction. The idea is to
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match splats in the form (splat (scalar_to_vector (load ...))) whenever
the load can be folded. All the logic and instruction emission is
working but because of PR8156, there are no ways to match loads, cause
they can never be folded for splats. Thus, the tests are XFAILed, but
I've tested and exercised all the logic using a relaxed version for
checking the foldable loads, as if the bug was already fixed. This
should work out of the box once PR8156 gets fixed since MayFoldLoad will
work as expected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 02:29:19 +00:00
Bruno Cardoso Lopes
666f500592
Update test to not use the scalar type to splat from a load
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137809 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 02:29:15 +00:00
Bruno Cardoso Lopes
fc0a702128
Now that we have a canonical way to handle 256-bit splats:
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vinsertf128 $1 + vpermilps $0, remove the old code that used to first
do the splat in a 128-bit vector and then insert it into a larger one.
This is better because the handling code gets simpler and also makes a
better room for the upcoming vbroadcast!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137807 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 02:29:10 +00:00
Akira Hatanaka
bb15e117d3
Add support for ext and ins.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137804 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 02:05:42 +00:00
Jim Grosbach
89e2aa6afd
Thumb ADD(immediate) parsing support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137788 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 23:57:34 +00:00
Eli Friedman
bfd5040ddc
An additional atomic test; related to r137662.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137786 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 23:29:17 +00:00
Jim Grosbach
194bd89829
Thumb parsing diagnostics for low-reg requirements on ADD and MOV.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137779 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 22:20:01 +00:00
Eli Friedman
054ddf799b
A bunch of misc fixes to SCCPSolver::ResolvedUndefsIn, including a fix to stop
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making random bad assumptions about instructions which are not explicitly listed.
Includes fix for rdar://9956541, a version of "undef ^ undef should return
0 because it's easier than arguing with users".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137777 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 22:06:31 +00:00
Eric Christopher
f213ad1a55
Remove tests that have been obsoleted or migrated to clang/optimizer tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137775 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:46:25 +00:00
Jim Grosbach
3912b73c74
Thumb assembly parsing and encoding for ADD(register) instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137759 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:34:08 +00:00
Eli Friedman
1fc291f0d3
Minor bug in SCCP found by inspection. (I don't think it's possible to hit this with a normal pass pipeline, but fixing for completeness.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137755 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:12:35 +00:00
Jim Grosbach
c2408d3ce5
Add testcase for r137746.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137754 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:11:21 +00:00
Jim Grosbach
be2ac8ca7b
Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137747 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 20:55:41 +00:00
Jim Grosbach
47a0d52b69
ARM thumb assembly parsing for arithmetic flag setting instructions.
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Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 20:45:50 +00:00
Bruno Cardoso Lopes
3b86598cfa
Instead of always leaving the work to the generic legalizer when
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there is no support for native 256-bit shuffles, be more smart in some
cases, for example, when you can extract specific 128-bit parts and use
regular 128-bit shuffles for them. Example:
For this shuffle:
shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32>
<i32 1, i32 0, i32 7, i32 6>
This was expanded to:
vextractf128 $1, %ymm1, %xmm2
vpextrq $0, %xmm2, %rax
vmovd %rax, %xmm1
vpextrq $1, %xmm2, %rax
vmovd %rax, %xmm2
vpunpcklqdq %xmm1, %xmm2, %xmm1
vpextrq $0, %xmm0, %rax
vmovd %rax, %xmm2
vpextrq $1, %xmm0, %rax
vmovd %rax, %xmm0
vpunpcklqdq %xmm2, %xmm0, %xmm0
vinsertf128 $1, %xmm1, %ymm0, %ymm0
ret
Now we get:
vshufpd $1, %xmm0, %xmm0, %xmm0
vextractf128 $1, %ymm1, %xmm1
vshufpd $1, %xmm1, %xmm1, %xmm1
vinsertf128 $1, %xmm1, %ymm0, %ymm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137733 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 18:21:54 +00:00