Commit Graph

118319 Commits

Author SHA1 Message Date
Lang Hames
2e960cb2c4 [Orc] Make partition identification in the CompileOnDemand layer lazy.
This also breaks out the logical dylib symbol resolution logic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239561 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 21:45:19 +00:00
Peter Collingbourne
6170134a1f Object: Prepend __imp_ when mangling a dllimport symbol in IRObjectFile.
We cannot prepend __imp_ in the IR mangler because a function reference may
be emitted unmangled in a constant initializer. The linker is expected to
resolve such references to thunks. This is covered by the new test case.

Strictly speaking we ought to emit two undefined symbols, one with __imp_ and
one without, as we cannot know which symbol the final object file will refer
to. However, this would require rather intrusive changes to IRObjectFile,
and lld works fine without it for now.

This reimplements r239437, which was reverted in r239502.

Differential Revision: http://reviews.llvm.org/D10400

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239560 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 21:42:18 +00:00
Peter Collingbourne
6f69f4074f LTO: expose LTO_SYMBOL_COMDAT flag, which indicates that the definition is part of a comdat group.
Reviewers: rafael

Subscribers: llvm-commits, ruiu

Differential Revision: http://reviews.llvm.org/D10330

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239559 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 21:41:27 +00:00
Douglas Katzman
3238e64ef4 Fix English usage in command line flag help string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239556 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 20:03:23 +00:00
Davide Italiano
5a78f2db38 [ELF] Introduce getValue() for ELF Symbols.
Differential Revision:	http://reviews.llvm.org/D10328
Reviewed by:	rafael


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239555 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 19:59:04 +00:00
Daniel Sanders
4ddb0ced90 Replace string GNU Triples with llvm::Triple in TargetMachine. NFC.
Summary:
For the moment, TargetMachine::getTargetTriple() still returns a StringRef.

This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: ted, llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10362

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239554 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 19:41:26 +00:00
Ahmed Bougacha
fd83cb21ce [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239553 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 19:30:37 +00:00
Rafael Espindola
6c56decee0 Generalize emitAbsoluteSymbolDiff.
This makes emitAbsoluteSymbolDiff always succeed and moves logic from the asm
printer to it.

The object one now also works on ELF. If two symbols are in the same fragment,
we will never move them apart.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239552 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 18:58:08 +00:00
Alexey Samsonov
bc482286fc Set proper debug location for branch added in BasicBlock::splitBasicBlock().
This improves debug locations in passes that do a lot of basic block
transformations. Important case is LoopUnroll pass, the test for correct
debug locations accompanies this change.

Test Plan: regression test suite

Reviewers: dblaikie, sanjoy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10367

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239551 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 18:25:54 +00:00
Alexey Samsonov
7356846f65 [LoopUnroll] Use IRBuilder to create branch instructions.
Use IRBuilder::Create(Cond)?Br instead of constructing instructions
manually with BranchInst::Create(). It's consistent with other
uses of IRBuilder in this pass, and has an additional important
benefit:

Using IRBuilder will ensure that new branch instruction will get
the same debug location as original terminator instruction it will
eventually replace.

For now I'm not adding a testcase, as currently original terminator
instruction also lack debug location due to missing debug location
propagation in BasicBlock::splitBasicBlock. That is, the testcase
will accompany the fix for the latter I'm going to mail soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239550 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 18:25:44 +00:00
Benjamin Kramer
29edabcc44 Replace an instance of custom atomics with standard ones.
Eventually I want to get rid of them entirely, but Statistic.h is still blocked
on MSVC bugs. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239545 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 17:30:34 +00:00
Rafael Espindola
688e7b3049 This reverts commit r239529 and r239514.
Revert "[AArch64] Match interleaved memory accesses into ldN/stN instructions."
Revert "Fixing MSVC 2013 build error."

The  test/CodeGen/AArch64/aarch64-interleaved-accesses.ll test was failing on OS X.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239544 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 17:30:33 +00:00
Reid Kleckner
cd354fa84d Revert "Fix merges of non-zero vector stores"
This reverts commit r239539.

It was causing SDAG assertions while building freetype.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239543 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 17:25:24 +00:00
Douglas Katzman
b0cbcd2362 Fix comment typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239541 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 16:46:27 +00:00
Matt Arsenault
b1d220c21a SLSR: Pass address space to isLegalAddressingMode
This only updates one of the uses. The other is used in cases
that may never touch memory, so I'm not sure why this is even
calling it. Perhaps there should be a new, similar hook for such
cases or pass -1 for unknown address space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239540 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 16:13:39 +00:00
Matt Arsenault
564ff6478c Fix merges of non-zero vector stores
Now actually stores the non-zero constant instead of 0.
I somehow forgot to include this part of r238108.

The test change was just an independent instruction order swap,
so just add another check line to satisfy CHECK-NEXT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 16:03:52 +00:00
Daniel Sanders
f0e3a9c174 Replace string GNU Triples with llvm::Triple in computeDataLayout(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, jfb, rengolin

Differential Revision: http://reviews.llvm.org/D10361

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239538 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 15:34:59 +00:00
Tom Stellard
4bedcbcab3 R600/SI: Define latency for flat instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239535 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 14:51:50 +00:00
Tom Stellard
a79d4da0f1 R600/SI: Move flat instruction defs to CIInstructions.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239534 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 14:51:49 +00:00
Tom Stellard
6fcf906bb0 R600/SI: Add -mcpu=bonaire to a test that uses flat address space
Flat instructions don't exist on SI, but there is a bug in the backend that
allows them to be selected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239533 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 14:51:46 +00:00
Sanjay Patel
6b71bf10b6 remove function names from comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239532 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 14:26:49 +00:00
Aaron Ballman
89f93ead2a Fixing MSVC 2013 build error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239529 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 13:06:02 +00:00
Toma Tabacu
f24e4e46cd Recommit "[mips] [IAS] Add support for BNE and BEQ with an immediate operand." (r239396).
Apparently, Arcanist didn't include some of my local changes in my previous
commit attempt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239523 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 10:36:10 +00:00
Zoran Jovanovic
9d115effdf [mips][microMIPS] Implement ERET and ERETNC instructions
http://reviews.llvm.org/D10091


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239522 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 10:22:46 +00:00
Zoran Jovanovic
d09e8beec3 [mips] Change existing uimm10 operand to restrict the accepted immediates
http://reviews.llvm.org/D10312


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239520 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 09:51:58 +00:00
Zoran Jovanovic
938cba6ae3 [mips][microMIPSr6] Change disassembler tests to one line format
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239519 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 09:42:10 +00:00
Hao Liu
7b35bb4e76 [LoopVectorize] Revert the enabling of interleaved memory access in Loop Vectorizor, which was wrongly committed in r239514.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239515 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 09:18:07 +00:00
Hao Liu
442f620296 [AArch64] Match interleaved memory accesses into ldN/stN instructions.
Add a pass AArch64InterleavedAccess to identify and match interleaved memory accesses. This pass transforms an interleaved load/store into ldN/stN intrinsic. As Loop Vectorizor disables optimization on interleaved accesses by default, this optimization is also disabled by default. To enable it by "-aarch64-interleaved-access-opt=true"

E.g. Transform an interleaved load (Factor = 2):
       %wide.vec = load <8 x i32>, <8 x i32>* %ptr
       %v0 = shuffle %wide.vec, undef, <0, 2, 4, 6>  ; Extract even elements
       %v1 = shuffle %wide.vec, undef, <1, 3, 5, 7>  ; Extract odd elements
     Into:
       %ld2 = { <4 x i32>, <4 x i32> } call aarch64.neon.ld2(%ptr)
       %v0 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 0
       %v1 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 1

E.g. Transform an interleaved store (Factor = 2):
       %i.vec = shuffle %v0, %v1, <0, 4, 1, 5, 2, 6, 3, 7>  ; Interleaved vec
       store <8 x i32> %i.vec, <8 x i32>* %ptr
     Into:
       %v0 = shuffle %i.vec, undef, <0, 1, 2, 3>
       %v1 = shuffle %i.vec, undef, <4, 5, 6, 7>
       call void aarch64.neon.st2(%v0, %v1, %ptr)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239514 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 09:05:02 +00:00
Arnaud A. de Grandmaison
3b8d35fb8d [LiveVariables] Improve isLiveOut runtime performances. NFC.
On large goto table based interpreters, where phi nodes can have (very) large
fan-ins, isLiveOut exhibited poor performances: about 40% of the full
codegen time was spent in PHIElim, sorting MachineBasicBlock addresses.

This patch improve the performances for such cases, and does not show
compile time regressions on the LNT, at bootstrap (llvm+clang+lldb) or
any other benchmarks we have in-house.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 07:50:21 +00:00
Simon Pilgrim
44226ffc19 [X86][SSE] Vectorized i8 and i16 shift operators
This patch ensures that SHL/SRL/SRA shifts for i8 and i16 vectors avoid scalarization. It builds on the existing i8 SHL vectorized implementation of moving the shift bits up to the sign bit position and separating the 4, 2 & 1 bit shifts with several improvements:

1 - SSE41 targets can use (v)pblendvb directly with the sign bit instead of performing a comparison to feed into a VSELECT node.
2 - pre-SSE41 targets were masking + comparing with an 0x80 constant - we avoid this by using the fact that a set sign bit means a negative integer which can be compared against zero to then feed into VSELECT, avoiding the need for a constant mask (zero generation is much cheaper).
3 - SRA i8 needs to be unpacked to the upper byte of a i16 so that the i16 psraw instruction can be correctly used for sign extension - we have to do more work than for SHL/SRL but perf tests indicate that this is still beneficial.

The i16 implementation is similar but simpler than for i8 - we have to do 8, 4, 2 & 1 bit shifts but less shift masking is involved. SSE41 use of (v)pblendvb requires that the i16 shift amount is splatted to both bytes however.

Tested on SSE2, SSE41 and AVX machines.

Differential Revision: http://reviews.llvm.org/D9474

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239509 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 07:46:37 +00:00
Arnaud A. de Grandmaison
a2cdb8ca59 [PHIElim] Use ranges and const-ify, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239508 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 07:45:05 +00:00
Nemanja Ivanovic
f7d6501d1d LLVM support for vector quad bit permute and gather instructions through builtins
This patch corresponds to review:
http://reviews.llvm.org/D10096

This is the back end portion of the patch related to D10095.
The patch adds the instructions and back end intrinsics for:
vbpermq
vgbbd


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239505 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 06:21:25 +00:00
Reid Kleckner
7963762fce Revert "Move dllimport name mangling to IR mangler."
This reverts commit r239437.

This broke clang-cl self-hosts. We'd end up calling the __imp_ symbol
directly instead of using it to do an indirect function call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239502 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 01:31:48 +00:00
Pete Cooper
5a118340dd Remove MachineModuleInfo::UsedFunctions as it has no users.
It hasn't been used since r130964.

This also removes MachineModuleInfo::isUsedFunction and
MachineModuleInfo::AnalyzeModule, both of which were only
there to support UsedFunctions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239501 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 01:04:56 +00:00
Sanjay Patel
e0d6eef952 change assert that will never fire to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239497 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 23:27:33 +00:00
Jingyue Wu
294c7822a0 [NFC] added a missing space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239495 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:54:02 +00:00
Pete Cooper
ea423677ca Stop returning a Use* from allocHungOffUses.
This always just set the User::OperandList which is now set
in that method instead of being returned.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239493 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:38:46 +00:00
Pete Cooper
33102d2faa Add User::growHungoffUses and use it to grow the hung off uses. NFC.
PhiNode, SwitchInst, LandingPad and IndirectBr all had virtually identical
logic for growing the hung off uses.
Move it to User so that they can all call a single shared implementation.

Their destructors were all empty after this change and were deleted.  They all
have virtual clone_impl methods which can be used as vtable anchors.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239492 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:38:41 +00:00
Pete Cooper
0fa7dc6b36 Delete User::dropHungOffUses and move it in to ~User which is the only caller. NFC.
Now that the subclasses which care about hung off uses let ~User clean it up,
there's no need for a separate method.  Just inline it to ~User and delete it.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239491 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:38:38 +00:00
Pete Cooper
0aae8ce09f Make User track whether a class has 'hung off uses' and delete them in its destructor.
Currently all of the logic for deleting hung off uses, which PHI/switch/etc use,
is in their classes.

This adds a bit to Value which tracks whether that user had hung off uses,
then User can be responsible for clearing them instead of the sub classes.

Note, the bit used here was taken from NumOperands which was 30-bits.
Given the reduction to 29 bits, and the average User being just over 100 bytes,
a single User with 29-bits of num operands would need 50GB of RAM for itself
so its reasonable to assume that 29-bits is enough for now.

This is a step towards hiding all the hung off uses logic in the User.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239490 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:38:34 +00:00
Pete Cooper
e0e42bb51f Move the special Phi logic for hung off uses in to User::allocHungOffUses. NFC.
PhiNode's need to allocate space for an array of Use[N] and then BasicBlock*[N].

They had their own allocHungOffUses to handle all of this.  This moves the logic
in to User::allocHungOffUses and PhiNode passes in a bool to say to allocate
the BB* space too.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239489 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:38:30 +00:00
Peter Collingbourne
6e5bbb57e4 ArgumentPromotion: Drop sret attribute on functions that are only called directly.
If the first argument to a function is a 'this' argument and the second
has the sret attribute, the ArgumentPromotion pass may promote the 'this'
argument to more than one argument, violating the IR constraint that 'sret'
may only be applied to the first or second argument.

Although this IR constraint is arguably unnecessary, it highlighted the fact
that ArgPromotion does not need to preserve this attribute. Dropping the
attribute reduces register pressure in the backend by avoiding the register
copy required by sret. Because sret implies noalias, we also replace the
former with the latter.

Differential Revision: http://reviews.llvm.org/D10353

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239488 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 21:14:34 +00:00
Sanjay Patel
c826b54b52 [x86] Add a reassociation optimization to increase ILP via the MachineCombiner pass
This is a reimplementation of D9780 at the machine instruction level rather than the DAG.

Use the MachineCombiner pass to reassociate scalar single-precision AVX additions (just a
starting point; see the TODO comments) to increase ILP when it's safe to do so.

The code is closely based on the existing MachineCombiner optimization that is implemented
for AArch64.

This patch should not cause the kind of spilling tragedy that led to the reversion of r236031.

Differential Revision: http://reviews.llvm.org/D10321



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239486 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 20:32:21 +00:00
Sanjay Patel
bb79423d0f punctuation policing; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239484 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 19:52:58 +00:00
Reid Kleckner
3de99b70aa [WinEH] _except_handlerN uses 0 instead of 1 to indicate catch-all
Our usage of 1 was a holdover from __C_specific_handler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239482 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 18:14:07 +00:00
Teresa Johnson
b78ea510c1 Add new EliminateAvailableExternally module pass, which is performed in
O2 compiles just before GlobalDCE, unless we are preparing for LTO.

This pass eliminates available externally globals (turning them into
declarations), regardless of whether they are dead/unreferenced, since
we are guaranteed to have a copy available elsewhere at link time.
This enables additional opportunities for GlobalDCE.

If we are preparing for LTO (e.g. a -flto -c compile), the pass is not
included as we want to preserve available externally functions for possible
link time inlining. The FE indicates whether we are doing an -flto compile
via the new PrepareForLTO flag on the PassManagerBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239480 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 17:49:28 +00:00
Alexey Samsonov
881c8e0c9a [GVN] Set proper debug locations for some instructions created by GVN.
Determining proper debug locations for instructions created in
PHITransAddr is tricky. We use a simple approach here and simply copy
debug locations from instructions computing load address to
"corresponding" instructions re-creating the address computation
in predecessor basic blocks.

This may not always be correct, given all the rearrangement and
simplification going on, and debug locations may jump around a lot,
as the basic blocks we copy locations between may be very far from
each other.

Still, this would work good in most simple cases (e.g. when chain
of address computing instruction is short, or our mapping turns out
to be 1-to-1), and we desire to have *some* reasonable debug locations
associated with newly inserted instructions.

See http://reviews.llvm.org/D10351 review thread for more details.

Test Plan: regression test suite

Reviewers: spatel, dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10351

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239479 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 17:37:38 +00:00
Sanjay Patel
708de57fee fix typo in comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239478 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 17:08:12 +00:00
Colin LeMahieu
c196bfecd6 [Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239477 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 16:52:32 +00:00
Benjamin Kramer
d5254aba82 [Hexagon] Make global arrays 'static const'. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239475 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 14:43:59 +00:00