Commit Graph

5951 Commits

Author SHA1 Message Date
Evan Cheng
31ff1ff348 Typo! How did we commute nodes before?!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28229 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12 01:46:26 +00:00
Evan Cheng
f4df680ad4 Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28223 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-11 07:33:49 +00:00
Chris Lattner
3e6a35076e Fix the PowerPC JIT-only failure on UnitTests/Vector/sumarray-dbl, which is
really a bad codegen bug that LLC happens to get lucky with. I must chat with
Nate for the proper fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28213 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-10 06:38:32 +00:00
Chris Lattner
219f1b535d Indent .data/.text in the .s file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28204 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09 16:15:00 +00:00
Evan Cheng
8399c5cbe4 Remove a completed entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28199 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09 06:54:05 +00:00
Chris Lattner
7faec9b93a Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28194 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09 05:33:48 +00:00
Chris Lattner
c9260a1556 MASM doesn't have one of these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28190 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09 05:21:47 +00:00
Chris Lattner
e7027d5339 Preserve prior behavior
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28187 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09 05:15:24 +00:00
Chris Lattner
dad9c5a14f Fix the MASM asmprinter's lies. It does not want to emit code to .text/.data
it wants it emitted to _text/_data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28185 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09 05:12:53 +00:00
Chris Lattner
4632d7a570 Split SwitchSection into SwitchTo{Text|Data}Section methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28184 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09 04:59:56 +00:00
Chris Lattner
4c15e33946 Some notes and thoughts to myself
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28182 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09 04:58:46 +00:00
Chris Lattner
9fd868ae0a Another bad case I noticed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28177 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 21:39:45 +00:00
Chris Lattner
8ef67ac3c3 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28176 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 21:24:21 +00:00
Nate Begeman
7514620052 Yet more readme updating
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28172 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 20:54:02 +00:00
Nate Begeman
fcf64a91d6 New note about something bad happening in target independent optimizers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28170 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 20:08:28 +00:00
Nate Begeman
d8624ed07f Proving once again that I am not as smart as the compiler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28169 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 19:09:24 +00:00
Nate Begeman
4667f2cbad Fold more shifts into inserts, and update the README
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28168 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 17:38:32 +00:00
Evan Cheng
403be7eafc Fixing truncate. Previously we were emitting truncate from r16 to r8 as
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28164 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 08:01:26 +00:00
Nate Begeman
93376b083e Update some stuff now that the new rlwimi code has gone in
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28162 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 02:52:38 +00:00
Evan Cheng
74811450b2 Typo's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28158 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-07 10:10:20 +00:00
Nate Begeman
77f361f5b3 New rlwimi implementation, which is superior to the old one. There are
still a couple missed optimizations, but we now generate all the possible
rlwimis for multiple inserts into the same bitfield.  More regression tests
to come.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-07 00:23:38 +00:00
Jeff Cohen
d43b18d9e4 Fix some loose ends in MASM support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28148 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 21:27:14 +00:00
Chris Lattner
80a7ecc923 Teach the X86 backend about non-i32 inline asm register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28139 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 00:29:37 +00:00
Chris Lattner
35c3913328 Print a grouping around inline asm blocks so that we can tell when we are
using them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28134 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:50:04 +00:00
Chris Lattner
7660ebc90a Print *some* grouping around inline asm blocks so we know where they are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28133 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:48:50 +00:00
Chris Lattner
bd04aa5796 Teach the code generator to use cvtss2sd as extload f32 -> f64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28131 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:35:18 +00:00
Evan Cheng
4713724eda Need extload patterns after Chris' DAG combiner changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28127 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 08:23:07 +00:00
Evan Cheng
8f7f7125e9 Better implementation of truncate. ISel matches it to a pseudo instruction
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28119 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 05:40:20 +00:00
Chris Lattner
55c63257f3 New note, Nate, please check to see if I'm full of it :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28118 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 05:36:15 +00:00
Chris Lattner
8b915b4ed2 Remove and simplify some more machineinstr/machineoperand stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 18:16:01 +00:00
Chris Lattner
2d90ac7ca6 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 18:05:43 +00:00
Chris Lattner
e53f4a055f Move some methods out of MachineInstr into MachineOperand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 17:52:23 +00:00
Chris Lattner
63b3d7113d There shalt be only one "immediate" operand type!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 17:21:20 +00:00
Chris Lattner
e45aa737ba Revert Nate's CR patch from last night, which caused many regressions (e.g. fhourstones).
Loading and storing off R0 isn't what we wanted.  Also, taking some CR's out of
CRRC seems to cause failures as well.  Further investigation is required.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28097 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 16:56:45 +00:00
Jeff Cohen
10efcfabf1 Make external globals public; other minor cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 16:20:22 +00:00
Jeff Cohen
a6e24d8caf Make Intel syntax the default when LLVM is built with VC++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28095 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 16:19:27 +00:00
Chris Lattner
4efeab208c Remove a bunch more dead V9 specific stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28094 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 01:26:39 +00:00
Chris Lattner
ea50fabfd4 Remove a bunch more SparcV9 specific stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 01:15:02 +00:00
Chris Lattner
34fb2cad46 Remove some more V9-specific stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28092 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 00:49:59 +00:00
Chris Lattner
10f3597c4e Remove some more unused stuff from MachineInstr that was leftover from V9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 00:44:25 +00:00
Chris Lattner
0e57629a93 Simplify handling of relocations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28090 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 00:42:08 +00:00
Evan Cheng
9e062ed516 Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when
movlps cannot be used (e.g. when load from m64 has multiple uses).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28089 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 20:32:03 +00:00
Chris Lattner
5a032de387 Change from using MachineRelocation ctors to using static methods
in MachineRelocation to create Relocations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28088 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 20:30:20 +00:00
Chris Lattner
93e5c284d7 inline a simple method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28083 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 17:21:32 +00:00
Chris Lattner
b4432f3d47 Suck block address tracking out of targets into the JIT Emitter. This
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28082 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 17:10:41 +00:00
Chris Lattner
5c488182da Fix a bug in Owen's checkin that broke the CBE on all non sparc v9 platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28081 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 05:48:41 +00:00
Nate Begeman
67977ad19c Teach the x86 jit how to handle jump tables not directly used by a jump
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28080 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 04:52:47 +00:00
Owen Anderson
a69571c799 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 01:29:57 +00:00
Chris Lattner
af1563fb62 Change the BasicBlockAddrs map to be a vector, indexed by MBB number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28069 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 00:32:55 +00:00
Chris Lattner
23118b649e Keep the alpha JIT similar to the PPC/X86 jits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28068 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 00:31:21 +00:00