Commit Graph

732 Commits

Author SHA1 Message Date
Dan Gohman
77ca41e5c3 Don't print fast-isel debug messages by default. Thanks Chris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56614 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 17:21:42 +00:00
Dan Gohman
2c442eda74 Don't forget the newline in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56613 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 17:17:27 +00:00
Dan Gohman
33134c4a75 FastISel support for debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56610 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 17:05:24 +00:00
Dan Gohman
2c4bf119be Enable DeadMachineInstructionElim when Fast-ISel is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56604 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 01:14:49 +00:00
Dale Johannesen
86b49f8e2d Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 01:07:17 +00:00
Devang Patel
eaf42abab6 s/ParameterAttributes/Attributes/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56513 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23 23:03:40 +00:00
Dan Gohman
d57dd5f4e6 Arrange for FastISel code to have access to the MachineModuleInfo
object. This will be needed to support debug info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23 21:53:34 +00:00
Dale Johannesen
91aac1015e Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 21:13:11 +00:00
Dan Gohman
1937e2f6ca Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls
are not enabled. Instead just omit the tail call flag when calls are
created.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56235 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16 01:42:28 +00:00
Dan Gohman
095cc29f32 Define CallSDNode, an SDNode subclass for use with ISD::CALL.
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 01:54:27 +00:00
Dan Gohman
f5aeb1a8e4 Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 16:56:44 +00:00
Dan Gohman
0586d91bb3 Add X86FastISel support for static allocas, and refences
to static allocas. As part of this change, refactor the
address mode code for laods and stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56066 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 20:11:02 +00:00
Dan Gohman
3ee25dca5b Add a break statement that I accidentally deleted when
I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56057 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 15:52:34 +00:00
Dan Gohman
4344a5d0d7 Change -fast-isel-no-abort to -fast-isel-abort, which now defaults
to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56029 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 23:05:00 +00:00
Dan Gohman
293d5f8bc0 Add a new option, -fast-isel-verbose, that can be used with
-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56021 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 22:06:46 +00:00
Dan Gohman
cf01f7a78c Remove the code that protected FastISel from aborting in
the case of loads, stores, and conditional branches. It can
handle those now, so any that aren't handled should trigger
the abort.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55977 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 02:40:04 +00:00
Dan Gohman
a8657e3587 Fix a few I's that were meant to be renamed to BI's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55942 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 20:37:59 +00:00
Evan Cheng
9f1185076d Avoid redefinition and nnbreak windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55911 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 16:01:27 +00:00
Dan Gohman
8a11053f3c Move the code that inserts copies for function livein registers
out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55863 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 22:59:21 +00:00
Dan Gohman
ae73dc1448 Tidy up several unbeseeming casts from pointer to intptr_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 17:05:41 +00:00
Dan Gohman
3df24e667f Create HandlePHINodesInSuccessorBlocksFast, a version of
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 23:12:08 +00:00
Dan Gohman
f0cbcd4880 Split the SelectionDAG-building code, including the FunctionLoweringInfo
and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55701 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 16:12:24 +00:00
Evan Cheng
f45261fb9b If TargetSelectInstruction returns true, move to next instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 06:43:41 +00:00
Dan Gohman
d2ff647964 Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks,
even in FastISel mode in the case where FastISel successfully 
selects all the instructions. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55641 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 20:17:56 +00:00
Dan Gohman
99b218218c Add a target callback for FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55512 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:21:34 +00:00
Gabor Greif
ba36cb5242 erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:40:38 +00:00
Dan Gohman
9ffd8b5720 Move CaseBlock, JumpTable, and BitTestBlock to be members of
SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55497 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 20:38:18 +00:00
Dan Gohman
5edd361497 Fix a FastISel bug where the instructions from lowering the arguments
were being emitted after the first instructions of the entry block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55496 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 20:28:56 +00:00
Rafael Espindola
91ee5454ae Reduce the size of the Parts vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55483 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 18:29:58 +00:00
Rafael Espindola
c748ffa4e4 Correctly resize the Parts array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55471 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 14:24:45 +00:00
Dale Johannesen
e00a8a2a2e Split the ATOMIC NodeType's to include the size, e.g.
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.

This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad.  This is the alternative.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55457 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 02:44:49 +00:00
Dan Gohman
7c3234c6be Reorganize the lifetimes of the major objects SelectionDAGISel
works with.

SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering
objects now get created once per SelectionDAGISel instance, and
can be reused across blocks and across functions. Previously,
they were created and destroyed each time they were needed.

This reorganization simplifies the handling of PHI nodes, and
also SwitchCases, JumpTables, and BitTestBlocks. This
simplification has the side effect of fixing a bug in FastISel
where successor PHI nodes weren't being updated correctly.

This is also a step towards making the transition from FastISel
into and out of SelectionDAG faster, and also making
plain SelectionDAG faster on code with lots of little blocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55450 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 23:52:12 +00:00
Gabor Greif
99a6cb92d1 disallow direct access to SDValue::ResNo, provide a getter instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 22:36:50 +00:00
Chris Lattner
09c5d8baa2 typo fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55355 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 06:07:47 +00:00
Dan Gohman
6ecf50908c Make MBBMap a DenseMap instead of a std::map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55220 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 02:44:46 +00:00
Dan Gohman
f350b277f3 Move the point at which FastISel taps into the SelectionDAGISel
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.

Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.

To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 02:25:05 +00:00
Dan Gohman
6679906d97 Avoid creating shift-by-zero SDNodes in the common case of
i8* getelementptr. DAGCombine eliminates these, but this is
a fairly common case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55214 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 01:06:51 +00:00
Dan Gohman
3c8f36fd03 Reapply r55191 and r55192.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55205 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 21:28:19 +00:00
Bill Wendling
449416deb6 Reverting r55190, r55191, and r55192. They broke the build with this error message:
{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55200 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 20:51:05 +00:00
Dan Gohman
e0182ec0e4 Support non-fallthrough unconditional branches in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55191 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 19:21:41 +00:00
Evan Cheng
83785c8096 First cut, un-optimized (and untested) fast isel lowering of GetElementPtrInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55085 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 22:45:34 +00:00
Dan Gohman
bb466331e7 Simplify FastISel's constructor argument list, make the FastISel
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 21:05:57 +00:00
Dan Gohman
2385852b5b Dump the instruction that foiled ISel even when -debug is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55075 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 20:47:32 +00:00
Evan Cheng
d420789301 Kill off SimpleBBISel, it's replaced by FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55067 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 17:50:32 +00:00
Dan Gohman
a267651b7e Disable DAGCombine's alignment inference in "fast" codegen mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55059 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 16:30:28 +00:00
Dan Gohman
c53ec49885 Use BitVector instead of std::vector<unsigned char>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55054 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 14:58:41 +00:00
Dan Gohman
cc8430f742 Fix a leak in the FastISel code that Chris pointed out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55031 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:56:17 +00:00
Dan Gohman
3e697cfa97 Add support for running SelectionDAG if FastISel fails. This is under
a command-line option, so that the default behavior is an abort, which
is useful for exposing code that isn't supported yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55028 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:47:54 +00:00
Dan Gohman
78eca170e9 Add code to call FastISel, and a command-line option to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55015 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 22:33:34 +00:00
Gordon Henriksen
5eca075b74 Rename some GC classes so that their roll will hopefully be clearer.
In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:

  Collector               -> GCStrategy
  CollectorMetadata       -> GCFunctionInfo
  CollectorModuleMetadata -> GCModuleInfo
  CollectorRegistry       -> GCRegistry
  Function::getCollector  -> getGC (setGC, hasGC, clearGC)

Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54899 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 18:44:35 +00:00