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3373f3bb3f
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9465 Commits

Author SHA1 Message Date
Bill Wendling
3373f3bb3f Move into an anonymous namespace and closer to where it's used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190547 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-11 20:38:09 +00:00
Bill Wendling
9c7448c8d3 Revert r190366. It was breaking build bots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190373 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-10 00:20:27 +00:00
Bill Wendling
5ebe6ccf65 Use a default value for the prologue's debug location. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190366 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-09 23:28:15 +00:00
Bill Wendling
c3cee57f7d Generate compact unwind encoding from CFI directives. 
We used to generate the compact unwind encoding from the machine
instructions. However, this had the problem that if the user used `-save-temps'
or compiled their hand-written `.s' file (with CFI directives), we wouldn't
generate the compact unwind encoding.

Move the algorithm that generates the compact unwind encoding into the
MCAsmBackend. This way we can generate the encoding whether the code is from a
`.ll' or `.s' file.

<rdar://problem/13623355>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190290 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-09 02:37:14 +00:00
Craig Topper
704e8d41fe Add neverHasSideEffects=1 on a couple move instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190259 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-08 00:50:45 +00:00
Craig Topper
89bf2e163c Using popcount should check the popcount feature flag not the SSE41 feature flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190258 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-08 00:47:31 +00:00
Juergen Ributzka
d7174719a9 [X86] Perform VSELECT DAG combines also before DAG type legalization. 
If the DAG already has only legal types, then the second round of DAG combines
is skipped. In this case VSELECT+SETCC patterns that match a more efficient
instruction (e.g. min/max) are never recognized.

This fix allows VSELECT+SETCC combines if the types are already legal before DAG
type legalization.

Reviewer: Nadav

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190105 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-05 23:02:56 +00:00
Kevin Enderby
d8e2f1757d Fixed a crash in the integrated assembler for Mach-O when a symbol difference 
expression uses an assembler temporary symbol from an assignment.  In this case
the symbol does not have a fragment so the use of getFragment() would be NULL
and caused a crash. In the case of an assembler temporary symbol we want to use
the AliasedSymbol (if any) which will create a local relocation entry, but if
it is not an assembler temporary symbol then let it use that symbol with an
external relocation entry.

rdar://9356266


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190096 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-05 20:25:06 +00:00
Jim Grosbach
36b00f394f X86: Mark non-crashing report_fatal_errors() as such. 
Previously, the clang crash handling code would kick in and give a crash
report for these, even though they're not that sort of error.

rdar://14882264

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189878 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-03 23:02:00 +00:00
Bill Wendling
b9daaa02a2 WIP: Refactor some code so that it can be called by more than just one method. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189849 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-03 20:59:07 +00:00
Craig Topper
4ccfbedaed Add hadSideEffects=0 to some instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189779 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-03 03:56:17 +00:00
Craig Topper
69c474ffa8 Create BEXTR instructions for (and ((sra or srl) x, imm), (2**size - 1)). Fixes PR17028. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189742 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-02 07:53:17 +00:00
Elena Demikhovsky
da0ce6eb8b AVX-512: updated the list of high-latency instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189740 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-02 07:41:01 +00:00
Elena Demikhovsky
cafcc99857 AVX-512: gather-scatter tests; added foldable instructions; 
Specify GATHER/SCATTER as heavy instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189736 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-02 07:12:29 +00:00
Elena Demikhovsky
6adcd58d3c AVX-512: Added GATHER and SCATTER instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189729 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-01 14:24:41 +00:00
Charles Davis
5510728d28 Move everything depending on Object/MachOFormat.h over to Support/MachO.h. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189728 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-01 04:28:48 +00:00
Richard Mitton
06f9db01ba Build fix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189699 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-30 21:32:42 +00:00
Richard Mitton
d4b3168609 Fixed a bug where diassembling an instruction that had a prefix would cause LLVM to identify a 1-byte instruction, but then upon querying it for that 1-byte instruction would cause an undefined opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189698 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-30 21:19:48 +00:00
Andrey Churbanov
2cc396bfb0 Checking commit access; removed one space added in previous test checkin by Jim 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189673 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-30 14:40:24 +00:00
Benjamin Kramer
d7a178eee3 X86: Add a description of the Intel Atom Silvermont CPU. 
Currently this is just the atom model with SSE4.2 enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189669 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-30 14:05:32 +00:00
Craig Topper
a9080653c2 Fixup BZHI selection to remove an unneeded zero extension. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189656 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-30 07:16:16 +00:00
Craig Topper
74f269176f Remove unused X86andn_flag node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189654 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-30 07:06:26 +00:00
Craig Topper
b6ac30a155 Teach X86 backend to create BMI2 BZHI instructions from (and X, (add (shl 1, Y), -1)). Fixes PR17038. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189653 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-30 06:52:21 +00:00
Cameron Esfahani
441c557708 Clean up some usage of Triple. The base class has methods for determining if the target is iOS and Linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189604 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-29 20:23:14 +00:00
Elena Demikhovsky
4edfa2278a AVX-512: added extend and truncate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189580 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-29 11:56:53 +00:00
Kevin Enderby
e54726a87a The darwin integrated assembler for X86 in 64-bit mode is not rejecting 
32-bit absolute addressing in instructions likei this:

	mov $_f, %rsi

which is not supported in 64-bit mode.

rdar://8827134


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189543 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-29 00:19:03 +00:00
Elena Demikhovsky
2fb982aa72 AVX-512: added SQRT, VRSQRT14, VCOMISS, VUCOMISS, VRCP14, VPABS 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189472 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-28 11:21:58 +00:00
Eric Christopher
6b6345f016 Remove support for the .debug_inlined section. No known software 
in use supports it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189439 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-28 04:04:28 +00:00
NAKAMURA Takumi
5be1752dcd X86JITInfo.cpp: Apply x64 version of X86CompilationCallback() to Cygwin64. 
For now, (defined(X86_64_JIT) && defined(__CYGWIN__)) satisfies Cygwin64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189437 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-28 03:04:09 +00:00
NAKAMURA Takumi
6a15b6a269 X86Subtarget.h: Recognize x86_64-cygwin. 
In the LLVM side, x86_64-cygwin is almost as same as x86_64-mingw32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189436 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-28 03:04:02 +00:00
David Majnemer
7cde9d0286 [ms-inline asm] Support offsets after segment registers 
Summary: MASM let's you do stuff like 'MOV FS:20, EAX' and 'MOV EAX, FS:20'

Reviewers: craig.topper, rnk

Reviewed By: rnk

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1470

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189407 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-27 21:56:17 +00:00
Elena Demikhovsky
d371d4f0f4 AVX-512: added conversion instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189349 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-27 13:54:04 +00:00
Elena Demikhovsky
1567abe74f AVX-512: Added FMA instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189326 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-27 08:39:25 +00:00
Charles Davis
f69a29b23a Revert "Fix the build broken by r189315." and "Move everything depending on Object/MachOFormat.h over to Support/MachO.h." 
This reverts commits r189319 and r189315. r189315 broke some tests on what I
believe are big-endian platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189321 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-27 05:38:30 +00:00
Charles Davis
9c3dd1b0d1 Move everything depending on Object/MachOFormat.h over to Support/MachO.h. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189315 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-27 05:00:43 +00:00
Elena Demikhovsky
92bfb54770 AVX-512: Added shuffle instructions - 
VPSHUFD, VPERMILPS, VMOVDDUP, VMOVLHPS, VMOVHLPS, VSHUFPS, VALIGN
 single and double forms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189215 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-26 12:45:35 +00:00
Craig Topper
318f4e679b Make sure x86 instructions using ssmem/sdmem operand types are only able to parse memory operands of the proper size in Intel syntax. Primarily affects some of sse cvt instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189206 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-26 00:39:04 +00:00
Craig Topper
f0509f3637 Remove some unnecessary PredicateMethod overrides. Add RenderMethod overrides to remove forwarding in the X86AsmParser code itself. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189205 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-26 00:13:09 +00:00
Craig Topper
c648f85f7b Put some of the AVX-512 parsing stuff in a more consistent place with the existing functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189204 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-25 23:18:05 +00:00
Craig Topper
a4959f3f6e First round of fixes for the x86 fixes for the x86 move accumulator from/to memory offset instructions. 
-Assembly parser now properly check the size of the memory operation specified in intel syntax. So 'mov word ptr [5], al' is no longer accepted.
-x86-32 disassembly of these instructions no longer sign extends the 32-bit address immediate based on size.
-Intel syntax printing prints the ptr size and places brackets around the address immediate.

Known remaining issues with these instructions:
-Segment override prefix is not supported. PR16962 and PR16961.
-Immediate size should be changed by address size prefix.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189201 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-25 22:23:38 +00:00
Elena Demikhovsky
41f7baf181 AVX-512: added UNPACK instructions and tests for all-zero/all-ones vectors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189189 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-25 12:54:30 +00:00
Craig Topper
916f1a1470 Add hasSideEffects/mayLoad/mayStore flags to the X86 moffs8/moffs16/moffs32/moffs64 versions of move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189182 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-24 20:31:14 +00:00
Craig Topper
f86778a848 Remove trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189178 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-24 19:50:11 +00:00
Rafael Espindola
4aa8bdaa46 Rename features to match what gcc and clang use. 
There is no advantage in being different and using the same names simplifies
clang a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189141 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-23 20:21:34 +00:00
Jim Cownie
f89c749870 Checking commit access; added one space 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189111 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-23 15:51:37 +00:00
Elena Demikhovsky
1765e74c15 AVX-512: Added masked SHIFT commands, more encoding tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189005 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-22 12:18:28 +00:00
Elena Demikhovsky
8ba76daba0 AVX-512: Added SHIFT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188899 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-21 09:36:02 +00:00
Craig Topper
5bdf397e25 Synchronize VEX JIT encoding code with the MCJIT version. Fix a bug in the MCJIT code where CurOp was being incremented even if the operand it was pointing at wasn't used. Maybe only matters if there are any EVEX_K instructions that aren't VEX_4V. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188868 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-21 05:57:45 +00:00
Nadav Rotem
ec7b5e9290 In LLVM FMA3 operands are dst, src1, src2, src3, however dst is not encoded as it is always src1. This was causing the encoding of the operands to be off by one. 
Patch by Chris Bieneman.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188866 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-21 05:03:10 +00:00
Craig Topper
33b5fe7f16 Rename mattr names for AVX-512 to from avx-512 -> avx512f, avx-512-pfi -> av512pf, avx-512-cdi -> avx512cd, avx-512-eri->avx512er. This matches better with official docs and what gcc patches appearto be using. I didn't touch the has* functions or the feature flag names to avoid change the td and lowering file while commits are still happening. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188859 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-21 03:57:57 +00:00