Daniel Dunbar
338825c192
llvm-mc/AsmMatcher: Change assembler parser match classes to their own record
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structure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78581 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 18:41:10 +00:00
Chris Lattner
f9bdeddb96
split MachO section handling stuff out to its out .h/.cpp file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 18:15:01 +00:00
Chris Lattner
f3231de60b
arm only needs to emit one .align directive for hidden nlp's, not one
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per pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 18:02:16 +00:00
Chris Lattner
c076a97939
make sure that arm nonlazypointers are aligned properly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78573 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 18:01:34 +00:00
Chris Lattner
e1e8a82986
Fix a weird ppc64-specific link error during an llvm-gcc build:
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ld: bad offset (0x00000091) for lo14 instruction pic-base fix-up in ___popcountdi2 from libgcc/./_popcountsi2_s.o
The problem is that the non lazy symbol pointers need to be 8 byte aligned
on ppc64 and .section doesn't have an implicit alignment like ".non_lazy_symbol_pointer"
does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 17:58:51 +00:00
Chris Lattner
12b2bda61a
fix some warnings for the MSVC build, by Yonggang Luo!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78571 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 17:35:42 +00:00
David Goodwin
bcf81629b8
Checkpoint scheduling itinerary changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78564 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 15:56:13 +00:00
Evan Cheng
65f2e7887a
Watch out for empty BB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 08:10:13 +00:00
Evan Cheng
8442d00a0e
rev, rev16, and revsh do not set CPSR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78561 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 07:58:45 +00:00
Evan Cheng
0d3007bb32
Duh. Most 16-bit Thumb rr instructions are two-address. Fix table.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 07:20:37 +00:00
Evan Cheng
26cc252a43
CPSR can be livein; transfer predicate operands correctly; tMUL is two-address.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78559 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 06:57:42 +00:00
Evan Cheng
19068ba71a
Add support for folding loads / stores into 16-bit moves used by Thumb2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 06:32:05 +00:00
Evan Cheng
2294645642
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 05:51:48 +00:00
Evan Cheng
052053bbe3
Use tMOVgpr2gpr instead of t2MOVr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78556 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 05:49:43 +00:00
Evan Cheng
e8af1f9afe
Add support to reduce most of 32-bit Thumb2 arithmetic instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78550 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 02:37:24 +00:00
Evan Cheng
09d97354ed
Always use the 16-bit tMOVgpr2gpr instead of the 32-bit t2MOVr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78549 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 02:06:53 +00:00
Chris Lattner
ff4bc460c5
Make the big switch: Change MCSectionMachO to represent a section *semantically*
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instead of syntactically as a string. This means that it keeps track of the
segment, section, flags, etc directly and asmprints them in the right format.
This also includes parsing and validation support for llvm-mc and
"attribute(section)", so we should now start getting errors about invalid
section attributes from the compiler instead of the assembler on darwin.
Still todo:
1) Uniquing of darwin mcsections
2) Move all the Darwin stuff out to MCSectionMachO.[cpp|h]
3) there are a few FIXMEs, for example what is the syntax to get the
S_GB_ZEROFILL segment type?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78547 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 01:39:42 +00:00
Benjamin Kramer
c6ca847a4e
Use abs64 instead abs; some platforms don't have a 64-bit abs overload. Noticed by Yonggang Luo!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78543 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 22:37:07 +00:00
Evan Cheng
a56c57e5f0
Add support to convert 32-bit instructions to 16-bit non-two-address ones.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78540 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 19:17:19 +00:00
Daniel Dunbar
5fe6338ac8
llvm-mc/AsmParser: Implement user defined super classes.
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- We can now discriminate SUB32ri8 from SUB32ri, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78530 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 07:20:21 +00:00
Daniel Dunbar
98164afb01
Extend comment on ParserMatchClass .td field, and add some missing
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classes for X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78524 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 06:00:04 +00:00
Daniel Dunbar
6745d42e8e
llvm-mc/AsmParser: Define match classes in the .td file.
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-2 FIXMEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78523 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 05:18:30 +00:00
Chris Lattner
93b6db3de9
sink the 'name' and 'isdirective' state out of MCSection into its derived classes.
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This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78517 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 23:39:42 +00:00
Anton Korobeynikov
8e9ece75db
Use subclassing to print lane-like immediates (w/o hash) eliminating
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'no_hash' modifier. Hopefully this will make Daniel happy :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78514 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 23:10:41 +00:00
Chris Lattner
ba44633a3b
add a note about dead zero extends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78511 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 22:46:59 +00:00
Chris Lattner
892e182393
1. Make MCSection an abstract class.
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2. Move section switch printing to MCSection virtual method which takes a
TAI. This eliminates textual formatting stuff from TLOF.
3. Eliminate SwitchToSectionDirective, getSectionFlagsAsString, and
TLOFELF::AtIsCommentChar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 22:41:53 +00:00
Eric Christopher
b4dc13cab7
Add crc32 instruction and intrinsics. Add a new class of prefix
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bytes for F2 0F 38 and propagate. Add a FIXME for a set
of possibilities which correspond to intrinsics already used.
New test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:55:08 +00:00
Jakob Stoklund Olesen
46151de6a0
Add support for READCYCLECOUNTER in Blackfin back-end.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:42:22 +00:00
Chris Lattner
f7427e558d
add new PIC16Section class, this time hopefully not breaking the build :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:37:01 +00:00
Daniel Dunbar
245f05843f
llvm-mc/AsmMatcher: Switch token matching to use the new string matcher.
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Also, redefined MatchRegisterName to just return the register value or a
sentinel, to simplify the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78504 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:22:41 +00:00
Daniel Dunbar
fb373909be
Revert r78501, it doesn't build.
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--- Reverse-merging r78501 into '.':
U lib/Target/PIC16/PIC16TargetObjectFile.cpp
D lib/Target/PIC16/PIC16Section.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78503 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:12:40 +00:00
Chris Lattner
50e38121d1
make PIC16 create its own custom MCSection.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78501 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:55:25 +00:00
Chris Lattner
7c599d056a
make target-specific TLOF impls (except PIC16) create target-specific
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MCSection instances.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:52:13 +00:00
Chris Lattner
5277b22687
eliminate TargetLoweringObjectFileSparc in favor of a TAI hook.
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A TAI hook is appropriate in this case because this is just an
asm syntax issue, not a semantic difference. TLOF should model
the semantics of the section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78498 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:43:12 +00:00
Chris Lattner
9aee18186c
give pic16 a target-specific section creation name too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:23:47 +00:00
Chris Lattner
0c0cb71233
now that getOrCreateSection is all object-file specific,
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give the impls an object-file-specific name. In the future
they can take different arguments etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:22:20 +00:00
Chris Lattner
fbf1d271e6
sink getOrCreateSection down into all the object file implementations,
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now that they create *all* the sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:14:13 +00:00
Bruno Cardoso Lopes
71435a3975
Use reloc_absolute_word_sext relocation for X86::MOV64(ri/mi)32 instructions,
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since they are in 64 bit mode with i64immSExt32 imms. JIT is not affected since
it handles both word absolute relocations in the same way
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78479 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 17:47:41 +00:00
Daniel Dunbar
cf1e764a1c
Update CMake
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78475 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 17:03:13 +00:00
Anton Korobeynikov
06af2ba809
Add insert_elt / extract_elt patterns for v4f32 stuff.
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Did anyone tests v4f32 ever?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 14:06:07 +00:00
Anton Korobeynikov
3405201bce
Lane number should be printed w/o hash
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78469 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 14:05:53 +00:00
Anton Korobeynikov
baf31088f1
Use VLDM / VSTM to spill/reload 128-bit Neon registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 13:35:48 +00:00
Andrew Lenharth
20c08e534f
move this fp select into a pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 12:49:07 +00:00
Daniel Dunbar
a3741fa28b
llvm-mc/AsmMatcher: Improve match code.
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- This doesn't actually improve the algorithm (its still linear), but the
generated (match) code is now fairly compact and table driven. Still need a
generic string matcher.
- The table still needs to be compressed, this is quite simple to do and should
shrink it to under 16k.
- This also simplifies and restructures the code to make the match classes more
explicit, in anticipation of resolving ambiguities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78461 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 07:50:56 +00:00
Bob Wilson
b6ab51e829
Implement Neon VZIP and VUZP instructions. These are very similar to VTRN,
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so I generalized the class for VTRN in the .td file to handle all 3 of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78460 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 06:13:25 +00:00
Bob Wilson
64efd90f8c
Implement Neon VTRN instructions. For now, anyway, these are selected
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directly from the intrinsics produced by the frontend. If it is more
convenient to have a custom DAG node for using these to implement shuffles,
we can add that later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78459 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 05:53:00 +00:00
Evan Cheng
3eff16e27a
Add a skeleton Thumb2 instruction size reduction pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78456 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:21:23 +00:00
Evan Cheng
8fb903604e
Code refactoring. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78455 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:20:32 +00:00
Evan Cheng
57834cdee5
tADDhirr should target GPR, not tGPR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78454 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:19:44 +00:00
Evan Cheng
34f8a029e3
I can type.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78453 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 02:54:37 +00:00