Commit Graph

246 Commits

Author SHA1 Message Date
Craig Topper
b198f5c897 Mark asm matcher conversion table as const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164088 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-18 01:41:49 +00:00
Craig Topper
be480ff607 Fix typo in comment. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-18 01:13:36 +00:00
Dmitri Gribenko
4e0ae44b3a Fix Doxygen issues: wrap code examples in \code and use \p to refer to
parameters.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15 20:22:05 +00:00
Jim Grosbach
a562dc7228 TableGen: Convert an assert() to a proper diagnostic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163726 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12 17:40:25 +00:00
Chad Rosier
5d637d7e93 Fix function name per coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 01:15:43 +00:00
Chad Rosier
90e11f8c95 Fix function name per coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 01:02:38 +00:00
Chad Rosier
2dc88d94c3 [ms-inline asm] Make comment more verbose and add an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 20:37:01 +00:00
Chad Rosier
2cc97def74 [ms-inline asm] Asm operands can map to one or more MCOperands. Therefore, add
the NumMCOperands argument to the GetMCInstOperandNum() function that is set
to the number of MCOperands this asm operand mapped to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 20:31:23 +00:00
Chad Rosier
038f3e3127 [ms-inline asm] Add an interface to the GetMCInstOperandNum() function in the
MCTargetAsmParser class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 18:47:45 +00:00
Chad Rosier
ad2d3e637a Remove extraneous return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163119 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 17:39:57 +00:00
Chad Rosier
87d910efc6 [ms-inline asm] Return the MCOperandNum instead of passing a reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163118 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 17:33:50 +00:00
Chad Rosier
c4d2560a20 Removed unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163104 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 03:16:09 +00:00
Chad Rosier
3a86e13962 [ms-inline asm] Expose the Kind and Opcode variables from the
MatchInstructionImpl() function.

These values are used by the ConvertToMCInst() function to index into the
ConversionTable.  The values are also needed to call the GetMCInstOperandNum()
function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 02:06:46 +00:00
Chad Rosier
756d2cc2f7 Remove an unused argument. The MCInst opcode is set in the ConvertToMCInst()
function nowadays.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31 22:12:31 +00:00
Chad Rosier
359956dc1b With the fix in r162954/162955 every cvt function returns true. Thus, have
the ConvertToMCInst() return void, rather then a bool.  Update all the cvt
functions as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31 00:03:31 +00:00
Chad Rosier
389536cf44 Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162946 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-30 21:47:00 +00:00
Chad Rosier
04508c6cb7 Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162945 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-30 21:46:00 +00:00
Chad Rosier
0bad086d6d Hoist a check to eliminate obvious mismatches as early as possible. Also, fix
an 80-column violation in the generated code.  No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162944 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-30 21:43:05 +00:00
Chad Rosier
62316fa00a [ms-inline asm] Add a new function, GetMCInstOperandNum, to the
AsmMatcherEmitter.  This function maps inline assembly operands to MCInst
operands.

For example, '__asm mov j, eax' is represented by the follow MCInst:

<MCInst 1460 <MCOperand Reg:0> <MCOperand Imm:1> <MCOperand Reg:0> 
             <MCOperand Expr:(j)> <MCOperand Reg:0> <MCOperand Reg:43>>

The first 5 MCInst operands are a result of j matching as a memory operand
consisting of a BaseReg (Reg:0), MemScale (Imm:1), MemIndexReg(Reg:0), 
Expr (Expr:(j), and a MemSegReg (Reg:0).  The 6th MCInst operand represents
the eax register (Reg:43).

This translation is necessary to determine the Input and Output Exprs.  If a
single asm operand maps to multiple MCInst operands, the index of the first
MCInst operand is returned.  Ideally, it would return the operand we really
care out (i.e., the Expr:(j) in this case), but I haven't found an easy way
of doing this yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162920 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-30 17:59:25 +00:00
Andrew Trick
2b70dfaaeb Fix a nondeterminism in the ARM assembler.
Adding arbitrary records to ARM.td would break
basic-arm-instructions.s because selection of nop vs mov r0,r0 was
ambiguous (this will be tested by a subsequent addition to ARM.td).
An imperfect but sensible fix is to give precedence to match rules
that have more constraints.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162824 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-29 03:52:57 +00:00
Jakob Stoklund Olesen
376a8a773e Print out the location of expanded multiclass defs in TableGen errors.
When reporting an error for a defm, we would previously only report the
location of the outer defm, which is not always where the error is.

Now we also print the location of the expanded multiclass defs:

lib/Target/X86/X86InstrSSE.td:2902:12: error: foo
  defm ADD : basic_sse12_fp_binop_s<0x58, "add", fadd, SSE_ALU_ITINS_S>,
             ^
lib/Target/X86/X86InstrSSE.td:2801:11: note: instantiated from multiclass
  defm PD : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode, VR128,
            ^
lib/Target/X86/X86InstrSSE.td:194:5: note: instantiated from multiclass
    def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
        ^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162409 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22 23:33:58 +00:00
Jim Grosbach
c8f267f669 TblGen: Make asm-matcher ConvertToMCInst() table driven.
No change in interface or functionality. Purely under-the-hood
details of the generated function that change.

The X86 assembly parser is reduced in size by over 15% and ARM by
over 10%.

No performance change by my measurements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162337 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22 01:06:23 +00:00
Chad Rosier
4c1d2baa7c Formatting. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162292 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 17:22:47 +00:00
Akira Hatanaka
72e9b6aeb4 Add stub methods for mips assembly matcher.
Patch by Vladimir Medic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 20:16:42 +00:00
Bill Wendling
087642f863 Remove extraneous ';'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161298 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-04 10:31:40 +00:00
Owen Anderson
b885dc8d39 Defer checking for registers in the MC AsmMatcher until the after user-defined match classes have been checked. This allows the creation of MatchClass's that are supersets of a register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160327 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-16 23:20:09 +00:00
Jim Grosbach
151d81d1e7 TableGen: Assembly matcher 'insufficient operands' diagnostic.
Make sure the tblgen'erated asm matcher correctly returns numoperands+1
as the ErrorInfo when the problem was that there weren't enough operands
specified.

rdar://9142751

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160144 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-12 21:37:20 +00:00
Jim Grosbach
ef970c1091 TableGen: AsmMatcher diagnostics preference detail.
Don't override a custom diagnostic w/ a generic InvalidOperand, all else
being equal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159238 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 22:58:01 +00:00
Jim Grosbach
4dbfdfba6c TableGen: AsmMatcher support for better operand diagnostics.
"Invalid operand" may be a completely correct diagnostic, but it's often
insufficiently specific to really help identify and fix the problem in
assembly source. Allow a target to specify a more-specific diagnostic kind
for each AsmOperandClass derived definition and use that to provide
more detailed diagnostics when an operant of that class resulted in a
match failure.

rdar://8987109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159050 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22 23:56:44 +00:00
Jim Grosbach
325bd661ff TableGen: AsmMatcher missing-features list minimization.
When returning a 'cannot match due to missing CPU features' error code,
if there are multiple potential matches with different feature sets,
return the smallest set of missing features from the alternatives as
that's most likely to be the one that's desired.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158673 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-18 19:45:46 +00:00
Jakob Stoklund Olesen
6f36fa981a Write llvm-tblgen backends as functions instead of sub-classes.
The TableGenBackend base class doesn't do much, and will be removed
completely soon.

Patch by Sean Silva!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158311 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-11 15:37:55 +00:00
Jim Grosbach
8e27c96159 TableGen: AsmMatcher diagnostic when missing instruction mnemonic.
Previously, if an instruction definition was missing the mnemonic,
the next line would just assert(). Issue a real diagnostic instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156263 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-06 17:33:14 +00:00
Douglas Gregor
f657da2e48 Move llvm-tblgen's StringMatcher into the TableGen library so it can
be used by clang-tblgen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156000 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02 17:32:48 +00:00
Craig Topper
8030e1a0df Add ifdef around getSubtargetFeatureName in tablegen output file so that only targets that want the function get it. This prevents other targets from getting an unused function warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155538 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-25 06:56:34 +00:00
Jim Grosbach
14ce6fac24 ARM: improved assembler diagnostics for missing CPU features.
When an instruction match is found, but the subtarget features it
requires are not available (missing floating point unit, or thumb vs arm
mode, for example), issue a diagnostic that identifies what the feature
mismatch is.

rdar://11257547

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155499 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-24 22:40:08 +00:00
Jim Grosbach
c1922c72ad TableGen support for auto-generating assembly two-operand aliases.
Assembly matchers for instructions with a two-operand form. ARM is full
of these, for example:
  add {Rd}, Rn, Rm  // Rd is optional and is the same as Rn if omitted.

The property TwoOperandAliasConstraint on the instruction definition controls
when, and if, an alias will be formed. No explicit InstAlias definitions
are required.

rdar://11255754

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155172 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 23:59:23 +00:00
Jim Grosbach
b423d18a00 Use a SmallVector instead of std::vector for ResOperands.
There's almost always a small number of instruction operands, so
use a SmallVector and save on heap allocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155143 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 17:52:34 +00:00
Jim Grosbach
8caecdea56 Update some internal naming conventions to modern style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 17:52:32 +00:00
Jim Grosbach
d4824fc8aa Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155075 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 23:46:25 +00:00
Jim Grosbach
67cd20d039 Sanity check error handling for TokenAlias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154951 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 21:23:52 +00:00
Jim Grosbach
65da6fc8af Tidy up. 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154881 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 00:01:04 +00:00
Jim Grosbach
11fc6467e6 Tidy up. Remove hard tab characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154532 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 21:02:33 +00:00
Craig Topper
fab3f7ee6f Reorder fields in MatchEntry and OperandMatchEntry to reduce padding. A bit tricky due to the target specific sizes for some of the fields so the ordering is only optimal for the targets in the tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153865 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-02 07:48:39 +00:00
Jakob Stoklund Olesen
7044cce1a3 Make MnemonicTable const again. That part of r152202 was OK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152840 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15 21:22:53 +00:00
Jakob Stoklund Olesen
dd20af266c Don't assume all mnemonics fit in 64k.
We currently assume that all targets have less than 64k opcodes. We
shouldn't limit it further.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152833 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15 20:44:06 +00:00
Jakob Stoklund Olesen
bcfa982c48 Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo."
We cannot limit the concatenated instruction names to 64K.  ARM is
already at 32K, and it is easy to imagine a target with more
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152817 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15 18:05:57 +00:00
Craig Topper
88d2fa438a Re-commit r152202 hopefully fixing the MSVC linker error.
Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152296 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-08 06:55:27 +00:00
Chad Rosier
3c777947f4 Revert r152202 as it's causing internal buildbot failures.
Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect 
all 16-bit string table offsets. Also make sure the string to offset table 
string is not larger than 65536 characters since larger string literals aren't 
portable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07 17:06:40 +00:00
Craig Topper
d3c9d9447e Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152202 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07 05:17:23 +00:00
Benjamin Kramer
b08bb34a6f Perform the string table optimization for OperandMatchEntries too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151986 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-03 20:44:43 +00:00