Commit Graph

16031 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
f5782e2d60 FileCheckize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155010 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 17:01:26 +00:00
Jakob Stoklund Olesen
377bf1acb9 Nobody likes shifty instructions, but that was a bit strong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155009 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 16:44:44 +00:00
Silviu Baranga
35ee7d28a6 Added support for disassembling unpredictable swp/swpb ARM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155004 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 14:18:57 +00:00
Silviu Baranga
6b9f97dd89 Fix the bahavior of the disassembler when decoding unpredictable mrs instructions on ARM. Now the diasassembler emmits warnings instead of errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155002 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 14:09:07 +00:00
Silviu Baranga
fa1ebc6abe Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 13:12:50 +00:00
Silviu Baranga
e546c4c9c3 Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocessor number was removed for this instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155000 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 13:02:55 +00:00
Silviu Baranga
9e71231309 Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instructions in the disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154999 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 12:48:43 +00:00
Joe Groff
41c3e9a326 FileCheckify, un-XFAIL SimplifyLibCalls/floor test
Fixes build on MSVC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154970 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 00:36:07 +00:00
Joe Groff
d15c581100 Move win32 SimplifyLibcall test under Transforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154967 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18 00:07:45 +00:00
Joe Groff
d5bda5ec66 fix pr12559: mark unavailable win32 math libcalls
also fix SimplifyLibCalls to use TLI rather than compile-time conditionals to enable optimizations on floor, ceil, round, rint, and nearbyint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 23:05:54 +00:00
Akira Hatanaka
ecdc9d5bb2 Add disassembler to MIPS.
Patch by Vladimir Medic. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 18:03:21 +00:00
Benjamin Kramer
93751c8c99 Force cmov on test so block placement doesn't shuffle the code around.
This made the test fail with -mcpu=generic (when building on a non-x86 host).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154926 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 13:55:23 +00:00
James Molloy
72aadc057c Fix bad EXTRACT_SUBREG in instruction selection for extending-loads on NEON.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154915 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 08:18:00 +00:00
Benjamin Kramer
86df062791 Revert "SCEV: When expanding a GEP the final addition to the base pointer has NUW but not NSW."
This isn't right either, reverting for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154910 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 06:33:57 +00:00
Andrew Trick
8ca441aad3 Test cases that assume layout should use -disable-code-place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154908 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 06:20:42 +00:00
Kevin Enderby
c5a2a33938 Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)
instructions with writebacks. And add test a case for all opcodes handed by
DecodeVLD2DupInstruction() in ARMDisassembler.cpp .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154884 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 00:49:27 +00:00
Preston Gurd
8975f510c0 temporarily XFAIL this test until post RA
live-ins is properly enabled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154882 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 00:21:35 +00:00
Chandler Carruth
fd2e4e65f7 Disable the atom scheduling test after r154874 broke it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154877 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 23:11:39 +00:00
Jim Grosbach
bf42f24e6e ARM two-operand forms for vhadd and vhsub instructions.
rdar://11252521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154875 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 23:00:25 +00:00
Chandler Carruth
177bea5330 Relax this test a touch to cope with different assembly variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154870 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 22:20:48 +00:00
Chandler Carruth
f1a60c734c Fix updateTerminator to be resiliant to degenerate terminators where
both fallthrough and a conditional branch target the same successor.
Gracefully delete the conditional branch and introduce any unconditional
branch needed to reach the actual successor. This fixes memory
corruption in 2009-06-15-RegScavengerAssert.ll and possibly other tests.

Also, while I'm here fix a latent bug I spotted by inspection. I never
applied the same fundamental fix to this fallthrough successor finding
logic that I did to the logic used when there are no conditional
branches. As a consequence it would have selected landing pads had they
be aligned in just the right way here. I don't have a test case as
I spotted this by inspection, and the previous time I found this
required have of TableGen's source code to produce it. =/ I hate backend
bugs. ;]

Thanks to Jim Grosbach for helping me reason through this and reviewing
the fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154867 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 22:03:00 +00:00
Jim Grosbach
68f89a6158 MC assembly parser handling for trailing comma in macro instantiation.
A trailing comma means no argument at all (i.e., as if the comma were not
present), not an empty argument to the invokee.

rdar://11252521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154863 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 21:18:49 +00:00
Jakob Stoklund Olesen
39ac3252e8 FileCheckize these tests.
Add an extra test to ldr_post with an immediate increment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154859 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 20:56:42 +00:00
Jakob Stoklund Olesen
fbefc9125d Disable code placement for this test.
It makes it less sensitive to small changes in heuristics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154857 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 20:49:06 +00:00
Duncan Sands
2867c85a37 Remove support for the special 'fast' value for fpmath accuracy for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154850 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 19:39:33 +00:00
Richard Smith
2c651fe6f4 Fix incorrect atomics codegen introduced in r154705, and extend test to catch it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154845 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 18:43:53 +00:00
Akira Hatanaka
1fbfea7b06 This patch fixes 3 problems:
1. CHECKNEXT was used instead of CHECK-NEXT which caused the line to be
   ignored which in turn hid the next 2 problems:
2. ('sh_offset', 0x{{{[0-9,a-f]+}}) had one too many leading curly braces and
   failed to do it's job of accepting all hex digits and:
3. The check for the hex values for the code instructions didn't account for
   blank separators.

Patch by Jack Carter. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154842 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 18:20:26 +00:00
Jim Grosbach
199366a6a6 ARM assembly two-operand forms for VRSHL.
rdar://11252521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154840 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 18:03:16 +00:00
Jim Grosbach
695eca66b1 Tidy up. Test formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154839 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 18:03:14 +00:00
Akira Hatanaka
3ef7edc77a Do not add offset in applyFixup. This has already been accounted for in Value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154838 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 18:00:19 +00:00
Jim Grosbach
705e2572b4 ARM two-operand aliases for VRHADD instructions.
rdar://11252521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154832 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 17:14:11 +00:00
Jim Grosbach
dbd6ba36e4 Tidy up. Testcase formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154831 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 17:14:07 +00:00
Bill Wendling
57ca13ecc4 Move to X86 directory because this fails on non-X86 platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154825 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 16:38:48 +00:00
Duncan Sands
8883c43ddc Make it possible to indicate relaxed floating point requirements at the IR level
through the use of 'fpmath' metadata.  Currently this only provides a 'fpaccuracy'
value, which may be a number in ULPs or the keyword 'fast', however the intent is
that this will be extended with additional information about NaN's, infinities
etc later.  No optimizations have been hooked up to this so far.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154822 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 16:28:59 +00:00
Chandler Carruth
9e67db4af1 Flip the new block-placement pass to be on by default.
This is mostly to test the waters. I'd like to get results from FNT
build bots and other bots running on non-x86 platforms.

This feature has been pretty heavily tested over the last few months by
me, and it fixes several of the execution time regressions caused by the
inlining work by preventing inlining decisions from radically impacting
block layout.

I've seen very large improvements in yacr2 and ackermann benchmarks,
along with the expected noise across all of the benchmark suite whenever
code layout changes. I've analyzed all of the regressions and fixed
them, or found them to be impossible to fix. See my email to llvmdev for
more details.

I'd like for this to be in 3.1 as it complements the inliner changes,
but if any failures are showing up or anyone has concerns, it is just
a flag flip and so can be easily turned off.

I'm switching it on tonight to try and get at least one run through
various folks' performance suites in case SPEC or something else has
serious issues with it. I'll watch bots and revert if anything shows up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154816 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 13:49:17 +00:00
Chandler Carruth
0de089a4d0 Remove an overly brittle test. This test will no longer be interesting
once we start changing the block layout, so just nuke it. If anyone has
ideas about how to craft a code layout agnostic form of the test please
let me know.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 13:49:09 +00:00
Chandler Carruth
e773e8c3e5 Add a somewhat hacky heuristic to do something different from whole-loop
rotation. When there is a loop backedge which is an unconditional
branch, we will end up with a branch somewhere no matter what. Try
placing this backedge in a fallthrough position above the loop header as
that will definitely remove at least one branch from the loop iteration,
where whole loop rotation may not.

I haven't seen any benchmarks where this is important but loop-blocks.ll
tests for it, and so this will be covered when I flip the default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154812 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 13:33:36 +00:00
Richard Barton
d0c478d95f Add -disassemble support for -show-inst and -show-encode capability llvm-mc. Also refactor so all MC paraphernalia are created once for all uses as much as possible.
The test change is to account for the fact that the default disassembler behaviour has changed with regards to specifying the assembly syntax to use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154809 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 11:32:10 +00:00
Chandler Carruth
16295fc20b Tweak the loop rotation logic to check whether the loop is naturally
laid out in a form with a fallthrough into the header and a fallthrough
out of the bottom. In that case, leave the loop alone because any
rotation will introduce unnecessary branches. If either side looks like
it will require an explicit branch, then the rotation won't add any, do
it to ensure the branch occurs outside of the loop (if possible) and
maximize the benefit of the fallthrough in the bottom.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154806 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 09:31:23 +00:00
Hal Finkel
31490baf38 Remove dead SD nodes after the combining pass. Fixes PR12201.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154786 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 03:33:22 +00:00
Chandler Carruth
70daea90af Rewrite how machine block placement handles loop rotation.
This is a complex change that resulted from a great deal of
experimentation with several different benchmarks. The one which proved
the most useful is included as a test case, but I don't know that it
captures all of the relevant changes, as I didn't have specific
regression tests for each, they were more the result of reasoning about
what the old algorithm would possibly do wrong. I'm also failing at the
moment to craft more targeted regression tests for these changes, if
anyone has ideas, it would be welcome.

The first big thing broken with the old algorithm is the idea that we
can take a basic block which has a loop-exiting successor and a looping
successor and use the looping successor as the layout top in order to
get that particular block to be the bottom of the loop after layout.
This happens to work in many cases, but not in all.

The second big thing broken was that we didn't try to select the exit
which fell into the nearest enclosing loop (to which we exit at all). As
a consequence, even if the rotation worked perfectly, it would result in
one of two bad layouts. Either the bottom of the loop would get
fallthrough, skipping across a nearer enclosing loop and thereby making
it discontiguous, or it would be forced to take an explicit jump over
the nearest enclosing loop to earch its successor. The point of the
rotation is to get fallthrough, so we need it to fallthrough to the
nearest loop it can.

The fix to the first issue is to actually layout the loop from the loop
header, and then rotate the loop such that the correct exiting edge can
be a fallthrough edge. This is actually much easier than I anticipated
because we can handle all the hard parts of finding a viable rotation
before we do the layout. We just store that, and then rotate after
layout is finished. No inner loops get split across the post-rotation
backedge because we check for them when selecting the rotation.

That fix exposed a latent problem with our exitting block selection --
we should allow the backedge to point into the middle of some inner-loop
chain as there is no real penalty to it, the whole point is that it
*won't* be a fallthrough edge. This may have blocked the rotation at all
in some cases, I have no idea and no test case as I've never seen it in
practice, it was just noticed by inspection.

Finally, all of these fixes, and studying the loops they produce,
highlighted another problem: in rotating loops like this, we sometimes
fail to align the destination of these backwards jumping edges. Fix this
by actually walking the backwards edges rather than relying on loopinfo.

This fixes regressions on heapsort if block placement is enabled as well
as lots of other cases where the previous logic would introduce an
abundance of unnecessary branches into the execution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154783 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16 01:12:56 +00:00
Craig Topper
2cb1e9dc7d Remove AVX2 vpermq and vpermpd intrinsics. These can now be handled with normal shuffle vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154778 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-15 22:43:31 +00:00
Nadav Rotem
f16af0a053 Fix PR12529. The Vxx family of instructions are only supported by AVX.
Use non-vex instructions for SSE4.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154770 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-15 19:36:44 +00:00
Nadav Rotem
3ab32ea49e When emulating vselect using OR/AND/XOR make sure to bitcast the result back to the original type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154764 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-15 15:08:09 +00:00
Elena Demikhovsky
73c504af9d Added VPERM optimization for AVX2 shuffles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154761 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-15 11:18:59 +00:00
Duncan Sands
5e5c5f8259 Rename "fpaccuracy" metadata to the more generic "fpmath". That's because I'm
thinking of generalizing it to be able to specify other freedoms beyond accuracy
(such as that NaN's don't have to be respected).  I'd like the 3.1 release (the
first one with this metadata) to have the more generic name already rather than
having to auto-upgrade it in 3.2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154744 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-14 12:36:06 +00:00
Hal Finkel
bba23ed672 Fix an error in BBVectorize important for vectorizing pointer types.
When vectorizing pointer types it is important to realize that potential
pairs cannot be connected via the address pointer argument of a load or store.
This is because even after vectorization, the address is still a scalar because
the address of the higher half of the pair is implicit from the address of the
lower half (it need not be, and should not be, explicitly computed).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154735 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-14 07:32:50 +00:00
Hal Finkel
f3f5a1e6f7 Enhance BBVectorize to more-properly handle pointer values and vectorize GEPs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154734 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-14 07:32:43 +00:00
Richard Smith
42fc29e717 Fix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ~*x & y.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154705 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 22:47:00 +00:00
Hal Finkel
fc3665c875 Add support to BBVectorize for vectorizing selects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154700 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 20:45:45 +00:00