Jim Grosbach
3870b750e6
More ARM multiply instuction binary encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117121 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:35:16 +00:00
Evan Cheng
76f920d316
Add fastcc cc: pass and return VFP / NEON values in registers. Controlled by -arm-fastcc for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117119 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:23:05 +00:00
Jim Grosbach
929a7056d8
Parameterize a bit of ARM encoding information, simplifying some instruction
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definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117114 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:42:06 +00:00
Jim Grosbach
9463d0e400
More ARM multiply instruction encoding information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:16:17 +00:00
Wesley Peck
eecb858ca8
Making the e_machine configurable by the target backend in ELFObjectWriter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117099 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 15:52:49 +00:00
Eric Christopher
4f512efee9
Add some basic ret instruction support to arm fast-isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117085 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 01:28:00 +00:00
Jim Grosbach
f50af8b5b8
ARM binary encoding for some of the multiply instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117080 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:52:30 +00:00
Jim Grosbach
3686046a2c
ARM binary encodings for MVN variants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:19:32 +00:00
Jim Grosbach
3fea19105d
ARM Binary encoding information for BFC/BFI instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:03:21 +00:00
Eric Christopher
1778772d1b
These don't need to be virtual.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 21:47:51 +00:00
Owen Anderson
90d4cf9314
Move the encoding logic for Q registers into getMachineOpValue().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:49:13 +00:00
Owen Anderson
d451f888b8
ARM encodes Q registers as 2xregno (i.e. the number of the D register that corresponds to the lower
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half of the Q register), rather than with just regno. This allows us to unify the encodings for
a lot of different NEON instrucitons that differ only in whether they have Q or D register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:21:49 +00:00
Eric Christopher
5b924809e4
Handle storing args to the stack for calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:09:54 +00:00
Eric Christopher
212ae937bb
More load/store refactoring, call reg+offset simplification from within
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the emitter to handle the addresses. Only simplify the offset if we need
to - also fix bug where in addrmode 5 we weren't dividing the offset by
4, which showed up due to not always lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117051 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:40:30 +00:00
Jim Grosbach
3ab5658a12
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:38:40 +00:00
Owen Anderson
1e93466c3a
Add correct NEON encodings for vhadd and vrhadd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:55:04 +00:00
Owen Anderson
9d50559bae
Add correct encodings for NEON vaddw.s* and vaddw.u*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:20:25 +00:00
Owen Anderson
e0e6dc3f4e
Provide correct NEON encodings for vaddl.u* and vaddl.s*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:09:17 +00:00
Duncan Sands
dbbd99faf1
The return value of this call is not used, so no point
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in assigning it to a variable (gcc-4.6 warning).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117024 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:06:28 +00:00
Andrew Trick
5b7a825ec5
putback r116983 and fix simple-fp-encoding.ll tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116992 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:40:16 +00:00
Owen Anderson
d9707e3d85
Revert r116983, which is breaking all the buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:11:16 +00:00
Evan Cheng
d6865de2d2
Add missing scheduling itineraries for transfers between core registers and VFP registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116983 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 01:12:00 +00:00
Owen Anderson
d7795540d0
Implement correct encodings for NEON vadd, both integer and floating point.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 00:48:00 +00:00
Eric Christopher
2d8f6fe610
Custom lower f64 args passed in integer registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 00:01:47 +00:00
Bill Wendling
01aabdac44
Add encoding for moving a value between two ARM core registers and a doublework
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extension register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116970 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 23:37:40 +00:00
Bill Wendling
7d31a169af
Add encodings for movement between ARM core registers and single-precision
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registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116961 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:44:54 +00:00
Dale Johannesen
e4d31593c5
Fix crash introduced in 116852. 8573915.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:03:37 +00:00
Chandler Carruth
1cd9708f5c
Remove remaining uses of ATTRIBUTE_UNUSED on variables, and delete three
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#includes in the process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 08:27:02 +00:00
Eric Christopher
3659ac22c0
Fix a TODO by removing some unnecesary copies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 08:02:24 +00:00
Jim Grosbach
b8e67fc92b
Fix backwards conditional.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 01:10:01 +00:00
Jim Grosbach
8b95c3ebfb
Add dynamic realignment when rematerializing the base register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 00:02:50 +00:00
Jim Grosbach
f6d7df6f21
Nuke a commented out bit that got missed a while back.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116883 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 23:48:47 +00:00
Jim Grosbach
e4ad387a5a
Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any
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setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 23:27:08 +00:00
Jim Grosbach
8155ea4c3a
Update comments to remove obsolete references.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116863 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 21:34:47 +00:00
Dale Johannesen
575cd148ce
Enable using vdup for vector constants which are splat of
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integers by default, and remove the controlling flag, now
that LICM will hoist such vdup's. 8003375.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116852 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 20:00:17 +00:00
Evan Cheng
2312842de0
Re-enable register pressure aware machine licm with fixes. Hoist() may have
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erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 18:58:51 +00:00
Daniel Dunbar
9869413802
Revert r116781 "- Add a hook for target to determine whether an instruction def
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is", which breaks some nightly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116816 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 17:14:24 +00:00
Evan Cheng
11e8b74a7a
- Add a hook for target to determine whether an instruction def is
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"long latency" enough to hoist even if it may increase spilling. Reloading
a value from spill slot is often cheaper than performing an expensive
computation in the loop. For X86, that means machine LICM will hoist
SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
instructions.
- Enable register pressure aware machine LICM by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:55:07 +00:00
Bob Wilson
3454ed9545
Support alignment for NEON vld-lane and vst-lane instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116776 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:16:32 +00:00
Jim Grosbach
70987fbc60
ARM encoding information for [SU]SAT* instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116768 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 23:35:38 +00:00
Eric Christopher
6e5367d6a3
Revert r116220 - thus turning arm fast isel back on by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116762 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 22:53:53 +00:00
Bill Wendling
b41ee96d76
Don't recompute MachineRegisterInfo in the Optimize* method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116750 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 21:22:31 +00:00
Jim Grosbach
5c57639c28
For Thumb2, try to use frame pointer references for stack slots even when a
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base register is available. rdar://8525298
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116729 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 18:39:46 +00:00
Jim Grosbach
0f0127f4a6
ARM addrmode4 instructions (ldm, stm and friends) can't encode an immediate
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offset for stack references. Make sure we take that into account when
deciding whether to reserver an emergency spill slot for the register
scavenger. rdar://8559625
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116714 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 16:48:59 +00:00
Jim Grosbach
e038a206df
Grammar tweak.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116712 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 16:38:50 +00:00
Eric Christopher
4cf34c6c04
Remove the check for invalid calling conventions. Testing shows that they're
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working just fine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116698 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 06:49:12 +00:00
Eric Christopher
fa87d66752
Lift arg promotion from the X86 backend. This should be unified at some point.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116694 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 02:17:53 +00:00
Eric Christopher
404be0c04f
Now that we handle all allocas via a non-SP reg offset remove all of the
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special case handling for ARM::SP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-17 11:08:44 +00:00
Eric Christopher
ec8bf972f5
Allow more load types to be materialized through the allocas.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116683 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-17 06:07:26 +00:00
Eric Christopher
d56d61af01
Optimize GEP off of intermediate allocas.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-17 01:51:42 +00:00