Evan Cheng
3c2ee4939b
ldm / stm instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55599 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:48:18 +00:00
Evan Cheng
5d2c1cf74d
AXI2 and AXI3 instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55598 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:34:13 +00:00
Evan Cheng
4bbd5f8a9c
Reorganize instruction formats again; AXI1 encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55597 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:19:00 +00:00
Evan Cheng
840917be2c
addrmode3 instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55596 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:00:14 +00:00
Evan Cheng
0d14fc8cd5
Reorganize some instruction format definitions. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55594 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 01:51:14 +00:00
Evan Cheng
93912739c9
Rest of addrmode2 instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55593 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 01:27:33 +00:00
Evan Cheng
17222df0ec
Addr2 word / byte load encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55591 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 19:02:21 +00:00
Evan Cheng
b7880ac470
Addr1 instructions opcodes are encoded in bits 21-24; encode S bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55590 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 18:32:16 +00:00
Gabor Greif
93c53e5583
fix a bunch of 80-col violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55588 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 15:37:04 +00:00
Bill Wendling
9440e35b98
Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR
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instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55582 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:59:23 +00:00
Bill Wendling
3156b62855
Expand for ROTR with MVT::i64.
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Dale, Could you please review this?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55581 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:53:19 +00:00
Bill Wendling
acb04ec427
Cosmetic changes to Machine LICM. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55578 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:30:23 +00:00
Bill Wendling
2692d59574
Another situation where ROTR is cheaper than ROTL.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55577 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 01:13:31 +00:00
Bill Wendling
353dea2f0a
For this pattern, ROTR is the cheaper option.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55576 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 01:04:56 +00:00
Bill Wendling
c5cbda12e9
- Fix comment so that it describes how the code really works:
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// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotl x, y)
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotr x, (sub 32, y))
Example: (x == 0xDEADBEEF and y == 4)
(x << 4) | (x >> 28)
=> 0xEADBEEF0 | 0x0000000D
=> 0xEADBEEFD
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> 0xEADBEEFD
- Fix comment and code for second version. It wasn't using the rot* propertly.
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotr x, y)
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotl x, (sub 32, y))
(x << 28) | (x >> 4)
=> 0xD0000000 | 0x0DEADBEE
=> 0xDDEADBEE
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> (0xEADBEEFD)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55575 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 00:37:27 +00:00
Gabor Greif
dc71563794
typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55574 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 22:16:05 +00:00
Gabor Greif
12632d2222
fix some 80-col violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55571 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 19:29:20 +00:00
Gordon Henriksen
07cabf6102
PR2731: C and Ocaml bindings for setTailCall and isTailCall.
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Based on patch by Giorgos Korfiatis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55570 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 16:34:54 +00:00
Gordon Henriksen
699609cf91
Fix ConstantExpr::getInsertElement.
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Breakage was exposed in the Ocaml bindings tests after Chris
uncommented an assertion in r55084.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55566 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 15:41:51 +00:00
Gabor Greif
92362680c1
fix some 80-col violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55565 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 10:09:02 +00:00
Evan Cheng
cd04708f59
Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55564 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 09:09:33 +00:00
Evan Cheng
3689ff450a
Fold isRematerializable checks into isSafeToReMat.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55563 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 09:07:18 +00:00
Evan Cheng
b18ae3cb63
For now, can't mark XOR64rr isAsCheapAsAMove. It's technically correct. But various passes cannot handle remating these.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 08:54:22 +00:00
Evan Cheng
eb9f89287e
Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 02:03:58 +00:00
Owen Anderson
cc54e76cc6
Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg
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assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen
vreg. Other solutions might be preferable, such as:
1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently.
2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55555 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 00:38:46 +00:00
Dale Johannesen
ea9eedb787
Add ppc partial-word ATOMIC_CMP_SWAP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55554 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 00:08:53 +00:00
Evan Cheng
456704476f
Swap fp comparison operands and change predicate to allow load folding (safely this time).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 23:22:12 +00:00
Evan Cheng
97af60b3ae
Use static_cast instead of C style cast.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55552 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 23:21:31 +00:00
Evan Cheng
4529966d99
Fix 80 col. violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 23:20:46 +00:00
Evan Cheng
17a568b668
Back out 55498. It broken Apple style bootstrapping.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55549 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 22:21:44 +00:00
Evan Cheng
94a50da93c
Backing out 55521. Not safe.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55548 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 22:13:21 +00:00
Dale Johannesen
0e55f0678c
Add partial word version of ATOMIC_SWAP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55546 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 18:29:46 +00:00
Owen Anderson
667d8f7607
Add initial support for fast isel of instructions that have inputs pinned to physical registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55545 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 17:45:56 +00:00
Chris Lattner
15bd095aa5
regenerate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 17:20:18 +00:00
Chris Lattner
828db8a2f9
Asmprint nameless instructions as:
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%4 = add ...
instead of:
add ... ; 4
This makes opt -print-cfg output actually usable and makes .ll files
generally easier to read. This fixes PR2480
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55541 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 17:19:30 +00:00
Chris Lattner
6ac28095c2
Add support for parsing .ll files that have numbers in front of
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nameless values, such as:
%3 = add i32 4, 2
This fixes the first half of PR2480
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 17:12:13 +00:00
Evan Cheng
ba705f62b1
TableGen'ing instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55533 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 07:42:03 +00:00
Evan Cheng
612b79edc9
addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 encode the opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55531 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 07:40:52 +00:00
Evan Cheng
3924f78a96
MVN is addrmode1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55530 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 07:36:24 +00:00
Evan Cheng
130966411f
More refactoring.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55528 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 06:41:12 +00:00
Evan Cheng
4d46d0af58
Swap fp comparison operands and change predicate to allow load folding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:48:31 +00:00
Evan Cheng
37f25d989a
Refactor ARM instruction format definitions into a separate file. No functionality changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55518 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:39:26 +00:00
Dan Gohman
99b218218c
Add a target callback for FastISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55512 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:21:34 +00:00
Gabor Greif
327ef031ed
remove tabs, fix > 80 cols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55511 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:19:51 +00:00
Chris Lattner
db57ef1cb3
rename destroy -> releaseMemory to properly hook into passmgr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 22:56:53 +00:00
Nicolas Geoffray
d046fc61ac
Add support for JIT exceptions on Darwin. Since we're dealing with libgcc,
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whose darwin code was written after the ability to dynamically register frames,
we need to do special hacks to make things work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55507 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 22:34:49 +00:00
Gabor Greif
ba36cb5242
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:40:38 +00:00
Dan Gohman
205d92589b
Implement null and undef values for FastISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55500 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:19:07 +00:00
Mon P Wang
5ad0bf658a
In lowering SELECT_CC, removed cases where we can't flip the true and false when the compare value has a NaN
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55499 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:04:05 +00:00
Dan Gohman
a3f8b7a4ce
Optimize DAGCombiner's worklist processing. Previously it started
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its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.
This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55498 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:01:56 +00:00