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Author SHA1 Message Date
Nate Begeman
14e2cf62f4 Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 22:06:00 +00:00
Nate Begeman
e0de44adba Remove an unnecsesary file. PPC32 and PPC64 share architected registers. 
We will decide with subtarget support whether we ever use an i64 register
class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23734 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 18:58:46 +00:00
Chris Lattner
444215dddc add the integer truncate/extension operations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23733 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 06:40:20 +00:00
Chris Lattner
0b61677ae0 Make sure targets depend on TargetSelectionDAG.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23732 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 06:31:58 +00:00
Chris Lattner
3f31d4304c These are now autogenerated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23731 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 06:26:29 +00:00
Chris Lattner
603d78c9de Now that we have int/fp lattice values, implement the SDTCisOpSmallerThanOp 
type constraint.  This lets tblgen realize that it doesn't need any dynamic
type checks for fextend/fround on PPC (and many other targets), because there
are only two fp types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23730 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 06:25:00 +00:00
Chris Lattner
3c7e18d690 Fairly serious rework of the typing code to add new int/fp lattice values. 
Overall, no functionality change yet though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23729 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 06:12:03 +00:00
Chris Lattner
e0583b1b92 simplify the code a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23728 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 05:08:37 +00:00
Chris Lattner
7cb6491a0d Add patterns for FP round/extend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23727 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 04:55:50 +00:00
Chris Lattner
13664a6194 add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend in terms of it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23726 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 04:55:10 +00:00
Chris Lattner
03ebd802c7 Add basic support for recognizing a new SDTCisOpSmallerThanOp type constraint 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23725 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 04:53:53 +00:00
Chris Lattner
0ee7cff4fb Implement a couple of new (important) features. 
1. If an operation has to be int or fp and the target only supports one
   int or fp type, relize that the op has to have that type.
2. If a target has operations on multiple types, do not emit matching code
   for patterns involving those operators, since we do not emit the code to
   check for them yet.  This prevents PPC from generating FP ops currently.

Also move some code around into more logical places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23724 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 04:11:13 +00:00
Chris Lattner
75ee2eb4e2 Do not let getLegalValueTypes return a list with duplicates in it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23723 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 03:54:49 +00:00
Nate Begeman
216def8ecf fold sext_in_reg, sext_in_reg where both have the same VT. This was 
popping up in Fourinarow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23722 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 01:29:07 +00:00
Chris Lattner
b4871ad694 Allow $ 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23721 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 01:28:34 +00:00
Nate Begeman
5054f16212 Relax the checking on zextload generation a bit, since as sabre pointed out 
you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.

Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants.  Woot!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23720 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 01:12:21 +00:00
Chris Lattner
40f44f1f58 Fix errors when compiling with -pedantic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23719 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 00:33:05 +00:00
Chris Lattner
24edbb7a6c Fix the trunc(load) case, finally allowing crafty and povray to pass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23718 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 22:10:05 +00:00
Chris Lattner
f98840531a Fix some bugs in (sext (load x)) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23717 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 21:52:31 +00:00
Chris Lattner
9ad8481cfb When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chain 
is also legal.  Add support for ExpandOp'ing raw EXTLOADs too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23716 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 21:44:47 +00:00
Chris Lattner
4c8f8f0481 Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to Legalize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23715 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 20:07:41 +00:00
Nate Begeman
bfd65a05c9 Fix the remaining DAGCombiner issues pointed out by sabre. This should fix 
the remainder of the failures introduced by my patch last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23714 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 18:34:58 +00:00
Chris Lattner
67a44cd3aa Fix a minor bug in the dag combiner that broke pcompress2 and some other 
tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23713 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 18:16:34 +00:00
Patrick Meredith
d223f5ee78 Updated to be less restrictive on what is matched 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23712 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 17:31:30 +00:00
Nate Begeman
144ff660e6 Add support to Legalize for expanding i64 sextload/zextload into hi and lo 
parts. This should fix the crafty and signed long long unit test failure
on x86 last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23711 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 17:15:37 +00:00
Jim Laskey
53c523c00e Inhibit instructions from being pushed before function calls. This will 
minimize unnecessary spilling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23710 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 16:44:00 +00:00
Chris Lattner
e08fe8d7e5 apparently one of the makefile changes changed libprofile.so to profile.so 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23709 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 16:34:24 +00:00
Patrick Meredith
b89dd23b43 This script is used to remove nodes with the label %tmp(.#)* and all 
edges associated with said node from the dot files produced by
DSA.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23708 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 16:26:50 +00:00
Chris Lattner
dcdadef96d Nate implemented this :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23707 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 06:04:34 +00:00
Nate Begeman
ded4963ab9 Move some Legalize functionality over to the DAGCombiner where it belongs. 
Kill some dead code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23706 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 03:11:28 +00:00
Nate Begeman
ced9d5dcd3 SimplifySelectCC is dead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23705 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-13 03:10:46 +00:00
Nate Begeman
765784ad76 Fix a potential bug with two combine-to's back to back that chris pointed 
out, where after the first CombineTo() call, the node the second CombineTo
wishes to replace may no longer exist.

Fix a very real bug with the truncated load optimization on little endian
targets, which do not need a byte offset added to the load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23704 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-12 23:18:53 +00:00
Nate Begeman
3df4d525c5 More cool stuff for the dag combiner. We can now finally handle things 
like turning:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr

into
_foo:
        fctiwz f0,f1
        stfd f0,-8(r1)
        lhz r3,-2(r1)
        blr

Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23703 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-12 20:40:40 +00:00
Jim Laskey
fab66f6900 Finally committing to the new scheduler. Still -sched=none by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23702 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-12 18:29:35 +00:00
Jim Laskey
851a22db2b Added graphviz/gv support for MF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23700 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-12 12:09:05 +00:00
Chris Lattner
11acc44e66 this passes with the change in predicate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23699 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-11 18:42:26 +00:00
Chris Lattner
d6155e96f7 Fix (hopefully the last) issue where LSR is nondeterminstic. When pulling 
out CSE's of base expressions it could build a result whose order was
nondet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23698 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-11 18:41:04 +00:00
Chris Lattner
7b445c521b Fix another problem where LSR was being nondeterminstic. Also remove elements 
from the end of a vector instead of the beginning


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23697 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-11 18:30:57 +00:00
Chris Lattner
4b43159c55 lsr doesn't emit gep instructions anymore 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23696 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-11 18:28:48 +00:00
Chris Lattner
b4dd1b86fa Fix another lsr-is-nondeterministic case 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23695 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-11 18:17:57 +00:00
Chris Lattner
a179ab3016 Fix a powerpc crash on CodeGen/Generic/llvm-ct-intrinsics.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23694 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-11 17:56:34 +00:00
Chris Lattner
05b57433e6 Add a canonicalization that got lost, fixing PowerPC/fold-li.ll:SUB 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23693 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-11 06:07:15 +00:00
Chris Lattner
04ecf6d65f clean up some corner cases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23692 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 23:00:08 +00:00
Chris Lattner
87514ca04c Implement trivial DSE. If two stores are neighbors and store to the same 
location, replace them with a new store of the last value.  This occurs
in the same neighborhood in 197.parser, speeding it up about 1.5%


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23691 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 22:31:19 +00:00
Chris Lattner
01a2202138 Add support for CombineTo, allowing the dag combiner to replace nodes with 
multiple results.

Use this support to implement trivial store->load forwarding, implementing
CodeGen/PowerPC/store-load-fwd.ll.  Though this is the most simple case and
can be extended in the future, it is still useful.  For example, it speeds
up 197.parser by 6.2% by avoiding an LSU reject in xalloc:

        stw r6, lo16(l5_end_of_array)(r2)
        addi r2, r5, -4
        stwx r5, r4, r2
-       lwzx r5, r4, r2
-       rlwinm r5, r5, 0, 0, 30
        stwx r5, r4, r2
        lwz r2, -4(r4)
        ori r2, r2, 1


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23690 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 22:04:48 +00:00
Chris Lattner
e64dfbc10b new testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23689 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 21:57:37 +00:00
Nate Begeman
07ed417df2 Teach the DAGCombiner several new tricks, teaching it how to turn 
sext_inreg into zext_inreg based on the signbit (fires a lot), srem into
urem, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23688 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 21:26:48 +00:00
Chris Lattner
1628947362 A testcase sitting in my tree 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23687 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 21:21:36 +00:00
Chris Lattner
d739075cbb Fix comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23686 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 16:52:03 +00:00
Chris Lattner
bba9aa3475 Add ISD::ADD to MaskedValueIsZero 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23685 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 16:51:40 +00:00