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3f409f7fef
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16935 Commits

Author SHA1 Message Date
Che-Liang Chiou
3f409f7fef Add simple arithmetics and %type directive for PTX 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119485 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 08:08:49 +00:00
Evan Cheng
3642e64c11 Simplify code that toggle optional operand to ARM::CPSR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119484 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 08:06:50 +00:00
Chris Lattner
b75c651e22 tidy up 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119462 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 05:41:32 +00:00
Bill Wendling
2567eec423 The machine instruction no longer encodes the submode as a separate operand. We 
should get the submode from the load/store multiple instruction's opcode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119461 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 05:31:09 +00:00
Bill Wendling
0f63075613 Proper encoding for VLDM and VSTM instructions. The register lists for these 
instructions have to distinguish between lists of single- and double-precision
registers in order for the ASM matcher to do a proper job. In all other
respects, a list of single- or double-precision registers are the same as a list
of GPR registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119460 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 04:32:08 +00:00
Bill Wendling
6bc105a7b9 Add binary emission stuff for VLDM/VSTM. This reuses the 
"getRegisterListOpValue" logic. If the registers are double or single precision,
the value returned is suitable for VLDM/VSTM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119435 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 00:45:23 +00:00
Bill Wendling
3380f6a4d0 Use the correct variable names so that the encodings will be correct. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119403 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 23:44:49 +00:00
Dan Gohman
742bf87efa Reapply r118917. With pseudo-instruction expansion moved to 
a different pass, the complicated interaction between cmov expansion
and fast isel is no longer a concern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119400 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 22:43:23 +00:00
Oscar Fuentes
975176e5c6 Fix assembling X86CompilationCallback_Win64.asm on VS 10. 
Patch by Louis Zhuang!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119394 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 22:07:47 +00:00
Rafael Espindola
af6b580875 Add .loc methods to the streamer. 
Next: Add support for the !HasDotLocAndDotFile case to the MCAsmStreamer
and then switch codegen to use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119384 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 21:20:32 +00:00
Jim Grosbach
7911916cf7 ARM conditional mov encoding fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119354 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 18:13:42 +00:00
Bill Wendling
1eeb2806cb L_bit doesn't work here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119325 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 02:20:22 +00:00
Bill Wendling
7b71878d9f - Remove dead patterns. 
- Add encodings to the *LDMIA_RET instrs. Probably not needed...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119323 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 02:08:45 +00:00
Bill Wendling
73c57e149c vldm and vstm are mnemonics for vldmia and vstmia resp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119321 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 02:00:24 +00:00
Chris Lattner
b8efa6b475 Fix a bug I introduced in the ppc refactoring, which caused long 
branches to be emitted as:

 	bne cr0, 2
instead of:
 	bne cr0, $+8



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119317 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 01:45:05 +00:00
Bill Wendling
73fe34a3ee Encode the multi-load/store instructions with their respective modes ('ia', 
'db', 'ib', 'da') instead of having that mode as a separate field in the
instruction. It's more convenient for the asm parser and much more readable for
humans.
<rdar://problem/8654088>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119310 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 01:16:36 +00:00
Chris Lattner
0382a4c98e add copy of comment to the code that will survive the mcjit'ization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119308 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 00:57:32 +00:00
Chris Lattner
b69cdfa6f3 relax an assertion a bit, allowing the GPR argument of 
these instructions to be encoded with getMachineOpValue.
This unbreaks ExecutionEngine/2003-01-04-ArgumentBug.ll 
when running on a G5


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119307 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 00:55:51 +00:00
Owen Anderson
c56dcbf641 Add Thumb2 encodings for mov and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119295 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-16 00:29:56 +00:00
Rafael Espindola
7339fb5dae Change the 11 byte nop to be a single instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119286 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 23:10:30 +00:00
Chris Lattner
bc4434135f fix a pasto that massively broke the ppc jit while the buildbots happened 
to be broken for other reasons



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119283 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 22:50:50 +00:00
Owen Anderson
da663f7b51 Attempt to provide encodings for some miscellaneous Thumb2 encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119187 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 21:30:39 +00:00
Evan Cheng
eb96a2f6c0 Code clean up. The peephole pass should be the one updating the instruction 
iterator, not TII->OptimizeCompareInstr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119186 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 21:20:45 +00:00
Owen Anderson
2c4c45deb6 Provide Thumb2 encodings for sxtb and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119185 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 21:12:05 +00:00
Eric Christopher
76dda7ec1d Recommit this change and remove the failing part of the test - it didn't 
pass in the first place and was masked by earlier failures not warning
and aborting the block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119184 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 21:11:06 +00:00
Jim Grosbach
99f53d13ef ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119180 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 20:47:07 +00:00
Owen Anderson
bb6315d1e4 Add Thumb2 encodings for comparison and shift operators. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 19:58:36 +00:00
Owen Anderson
a99e778ed8 Add correct Thumb2 encodings for mvn and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119170 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 18:45:17 +00:00
Jim Grosbach
11bbeecdf1 Add FIXMEs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119167 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 18:36:48 +00:00
Jim Grosbach
17e967eac2 Nuke redundant encoding bit set. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119164 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 18:17:24 +00:00
Kalle Raiskila
38e0c9ba57 Improve code layout, mostly indentation. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119142 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 10:12:32 +00:00
Chris Lattner
b46443a686 Wire up primitive support in the assembler backend for writing .o files 
directly on the mac.  This is very early, doesn't support relocations and
has a terrible hack to avoid .machine from being printed, but despite
that it generates an bitwise-identical-to-cctools .o file for stuff like 
this:

  define i32 @test() nounwind { ret i32 42 }

I don't plan to continue pushing this forward, but if anyone else was
interested in doing it, it should be really straight-forward.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119136 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 08:49:58 +00:00
Chris Lattner
b7035d0442 split out an encoder for memri operands, allowing a relocation to be plopped 
into the immediate field.  This allows us to encode stuff like this:

        lbz r3, lo16(__ZL4init)(r4)     ; globalopt.cpp:5
                                        ; encoding: [0x88,0x64,A,A]
                                        ;   fixup A - offset: 0, value: lo16(__ZL4init), kind: fixup_ppc_lo16

        stw r3, lo16(__ZL1s)(r5)        ; globalopt.cpp:6
                                        ; encoding: [0x90,0x65,A,A]
                                        ;   fixup A - offset: 0, value: lo16(__ZL1s), kind: fixup_ppc_lo16

With this, we should have a completely function MCCodeEmitter for PPC, wewt.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119134 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 08:22:03 +00:00
Chris Lattner
17e2c18835 add support for encoding the lo14 forms used for a few PPC64 addressing 
modes.  For example, we now get:

	ld r3, lo16(_G)(r3)             ; encoding: [0xe8,0x63,A,0bAAAAAA00]
                                        ;   fixup A - offset: 0, value: lo16(_G), kind: fixup_ppc_lo14



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119133 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 08:02:41 +00:00
Chris Lattner
f3b6e06679 fix a regression with the new instprinter: we lost the ability to 
print DBG_VALUE instructions.  This should unbreak the llvm-gcc-powerpc-darwin9
buildbot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119132 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 07:52:06 +00:00
Chris Lattner
85cf7d737d implement the start of support for lo16 and ha16, allowing us to get stuff like: 
lis r4, ha16(__ZL4init)         ; encoding: [0x3c,0x80,A,A]
                                        ;   fixup A - offset: 0, value: ha16(__ZL4init), kind: fixup_ppc_ha16


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119127 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 06:33:39 +00:00
Chris Lattner
b719437325 add a fixup for conditional branches, giving us output like this: 
beq cr0, LBB0_4                 ; encoding: [0x41,0x82,A,0bAAAAAA00]
                                        ;   fixup A - offset: 0, value: LBB0_4, kind: fixup_ppc_brcond14



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119126 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 06:12:22 +00:00
Chris Lattner
8d70411dcd change direct branches to encode with the same encoding method 
as direct calls.  Change conditional branches to encode with
their own method, simplifying the JIT encoder and making room
for adding an mc fixup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119125 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 06:09:35 +00:00
Chris Lattner
019aef6df7 eliminate a now-unneeded operand printer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119124 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 06:01:10 +00:00
Chris Lattner
a9d9ab9673 split call operands out to their own encoding class, simplifying 
code in the JIT.  Use this to form the first fixup for the PPC backend,
giving us stuff like this:

	bl L_foo$stub ; encoding: [0b010010AA,A,A,0bAAAAAA01]
                                        ;   fixup A - offset: 0, value: L_foo$stub, kind: fixup_ppc_br24


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119123 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 05:57:53 +00:00
Chris Lattner
7192eb8732 add proper encoding for MTCRF instead of using a hack. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119121 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 05:19:25 +00:00
Chris Lattner
2ac190238e add fields to the .td files unconditionally, simplifying tblgen a bit. 
Switch the ARM backend to use 'let' instead of 'set' with this change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119120 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 05:19:05 +00:00
Chris Lattner
a04084e777 add basic encoding support for immediates and registers, allowing us 
to encode all of these instructions correctly (for example):

        mflr r0                         ; encoding: [0x7c,0x08,0x02,0xa6]
        stw r0, 8(r1)                   ; encoding: [0x90,0x01,0x00,0x08]
        stwu r1, -64(r1)                ; encoding: [0x94,0x21,0xff,0xc0]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119118 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 04:51:55 +00:00
Chris Lattner
a2d602529d add a dummy entry to fix a build error 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119117 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 04:47:16 +00:00
Chris Lattner
5ffe38ef6a Implement a basic MCCodeEmitter for PPC. This doesn't handle 
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:

	mflr r0                         ; encoding: [0x7c,0x08,0x02,0xa6]
	stw r0, 8(r1)                   ; encoding: [0x90,0x00,0x00,0x00]
	stwu r1, -64(r1)                ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
	lhz r4, 4(r3)                   ; encoding: [0xa0,0x00,0x00,0x00]
	cmplwi cr0, r4, 8               ; encoding: [0x28,0x00,0x00,0x00]
	beq cr0, LBB0_2                 ; encoding: [0x40,0x00,0x00,0x00]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 04:16:32 +00:00
Chris Lattner
84a04adf3a dissolve some more hacks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119115 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 03:53:53 +00:00
Chris Lattner
0fe7184ba1 fix some fixme's, removing dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119114 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 03:51:13 +00:00
Chris Lattner
ab63864564 remove asmstrings (which can never be printed) from pseudo 
instructions, allowing is to eliminate some dead operand 
printing methods from the instprinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119113 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 03:48:58 +00:00
Chris Lattner
374c608fca strength reduce TOC temp label generation, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119112 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 03:42:54 +00:00
Chris Lattner
cb22fa6536 rip out a ton of old instruction printing junk now that the 
new instprinting logic is there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119111 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 03:39:06 +00:00