Commit Graph

7145 Commits

Author SHA1 Message Date
Daniel Dunbar
d7b267bd90 llvm-mc: Parse symbol attribute directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74487 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 00:33:19 +00:00
Daniel Dunbar
c29dfa786a llvm-mc: Parse .{,b,p2}align{,w,l} directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 23:46:59 +00:00
David Goodwin
baeb911d60 Add Thumb-2 support for TEQ amd TST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 22:49:42 +00:00
David Goodwin
8ba221d5c5 Thumb-2 tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 22:25:22 +00:00
Daniel Dunbar
1ad7edc212 llvm-mc: Recognize C++ style comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74463 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 22:00:57 +00:00
Daniel Dunbar
475839e9a9 MC: Improve expression parsing and implement evaluation of absolute expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74448 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 20:37:27 +00:00
Dan Gohman
cffddcd726 Don't cache PHI exit values from exhaustive evaluations, because
an individual exhaustive evaluation reflects only the exit value
implied by an individual exit, which may differ from the actual
exit value of the loop if there are other exits. This fixes PR4477.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74447 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 20:34:13 +00:00
Rafael Espindola
63de5c3b7e FIX PR 4459.
Not sure I understand how the temp register gets used,
but this fixes a bug and introduces no regressions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74446 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 20:29:59 +00:00
David Greene
cf048d4e59 Add some tests of advanced TableGen list functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74445 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 20:07:17 +00:00
David Goodwin
c0309b48b5 Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 15:33:01 +00:00
Evan Cheng
055b0310f8 Implement Thumb2 ldr.
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74420 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 07:51:04 +00:00
Andreas Bolka
c6a303052b Print pairwise dependence results, add testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74402 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-28 00:35:22 +00:00
Dan Gohman
f7ca1611e2 Don't try to split a loop when the controlling icmp instruction
doesn't have an IV-based operand. This fixes PR4471.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74399 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 22:58:27 +00:00
Dan Gohman
4b35f83b91 Teach LoopSimplify how to merge multiple loop exits into a single exit,
when one of them can be converted to a trivial icmp and conditional
branch.

This addresses what is essentially a phase ordering problem.
SimplifyCFG knows how to do this transformation, but it doesn't do so
if the primary block has any instructions in it other than an icmp and
a branch. In the given testcase, the block contains other instructions,
however they are loop-invariant and can be hoisted. SimplifyCFG doesn't
have LoopInfo though, so it can't hoist them. And, it's important that
the blocks be merged before LoopRotation, as it doesn't support
multiple-exit loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74396 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 21:30:38 +00:00
Dan Gohman
de53dc03f5 When a value is used multiple times within a single PHI, instructions
inserted to replace that value must dominate all of of the basic
blocks associated with the uses of the value in the PHI, not just
one of them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74376 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 05:16:57 +00:00
Chris Lattner
74d3f50a80 factor some logic out into a helper function, allow remat of loads from constant
globals.  This implements remat-constant.ll even without aggressive-remat.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74373 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 04:38:55 +00:00
Chris Lattner
18c5987fa3 Reimplement rip-relative addressing in the X86-64 backend. The new
implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an 
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74372 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 04:16:01 +00:00
Chris Lattner
600d006cc7 remove some unneeded eh info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74371 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 04:07:31 +00:00
Chris Lattner
18eed20051 testcase for PR4466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74367 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 01:33:35 +00:00
David Goodwin
dcdaebc592 When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74355 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 23:13:13 +00:00
Dan Gohman
16bdfdb178 Add some testcases for some of the recent ScalarEvolution bug fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74353 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:54:11 +00:00
David Goodwin
7f98cac93a Thumb-2 tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74345 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:37:07 +00:00
Chris Lattner
93677c99a4 remove unwind info, add test for asmprinting of jump table labels with (%rip)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74337 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:16:49 +00:00
Evan Cheng
2c2fb823b9 Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:00:19 +00:00
David Goodwin
24062ac5be Thumb-2 has CLZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74322 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 20:47:43 +00:00
David Goodwin
7ce720b448 Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 20:45:56 +00:00
Daniel Dunbar
d2deed0091 More spelling Count as count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74306 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 18:35:07 +00:00
Daniel Dunbar
039c43dccc Spell Count as count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74298 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 18:21:54 +00:00
David Goodwin
2634e98a93 Add Thumb-2 tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74295 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 18:10:30 +00:00
David Goodwin
93d95bd2c3 ADC used to implement adde should use "adcs" opcode instead of "adc".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 18:07:25 +00:00
David Goodwin
caffbd7b01 ORN and BIC tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74289 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 16:20:06 +00:00
David Goodwin
83b3593478 Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI.
Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74288 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 16:10:07 +00:00
Evan Cheng
6677f51127 Fix tests: Count -> count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74282 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 07:05:57 +00:00
Evan Cheng
c0ad80fd9e Fix a CodeGenDAGPatterns bug. Check if top level predicates match when it's looking for duplicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74276 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 05:59:16 +00:00
Shantonu Sen
1b6d3daa59 Clarify how to configure llvm-gcc-4.2 for use with
test suite. Remove documentation for --with-f2c, which
is no longer supported. Remove information about obtaining
tcl/expect, which ship with Mac OS X by default since
10.4.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74271 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 05:44:53 +00:00
Devang Patel
0f05d22a31 Let's ignore MDStrings also!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74255 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 02:26:12 +00:00
Daniel Dunbar
12cccf10a7 Fix spelling of 'count'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74249 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 01:33:02 +00:00
Dan Gohman
6b9c959c61 Fix LCSSA to avoid emitting a PHI node for the unwind destination of
an invoke instruction, since the value isn't really live across that
edge.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74242 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 00:31:13 +00:00
Evan Cheng
6267422318 Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74228 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 23:34:10 +00:00
David Goodwin
0919a916bf Use MVN for ~t2_so_imm immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74223 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 23:11:21 +00:00
Daniel Dunbar
c238b584de MC: Parse .org directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 22:44:51 +00:00
Bill Wendling
06b76b834f Don't grep the -debug output. This isn't the way to test changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 21:59:32 +00:00
Daniel Dunbar
8f780cd789 MC: Parse .set and assignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74208 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 21:56:11 +00:00
Chris Lattner
5f04d1e522 down with unwind info :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74206 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 21:48:17 +00:00
Evan Cheng
1e249e3705 ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 20:59:23 +00:00
Devang Patel
e4c0c0fab8 No need to code gen MDNodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 00:47:42 +00:00
Evan Cheng
a09b9ca10f Add Thumb2 pc relative add.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74141 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 23:47:58 +00:00
Daniel Dunbar
a0d1426af0 Basic .s parsing for .asci[iz], .fill, .space, {.byte, .short, ... }
- Includes some DG tests in test/MC/AsmParser, which are rather primitive since
   we don't have a -verify mode yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74139 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 23:30:00 +00:00
Evan Cheng
2e1af3529b We should run these tests as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 21:36:26 +00:00
Chris Lattner
7556bfd6af unwind info not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74112 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 19:48:04 +00:00