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3ff25514ce
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48289 Commits

Author SHA1 Message Date
Benjamin Kramer
3ff25514ce Don't emit a bit test if there is only one case the test can yield false. A simple SETNE is sufficient. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135126 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 01:38:42 +00:00
Devang Patel
d77ec6208c Simplify and delay extracting DebugLoc elements, scope and InlinedAt, as much as possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135124 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 01:14:57 +00:00
Eric Christopher
7332e6ee25 Add a dag combine pattern for folding C2-(A+C1) -> (C2-C1)-A 
Fixes rdar://9761830

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135123 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 01:12:15 +00:00
Jakob Stoklund Olesen
4fcfcf4984 Revert r135121 which broke a gcc-4.2 builder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135122 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:58:38 +00:00
Jakob Stoklund Olesen
6a9feaac93 Count references to interference cache entries. 
Each InterferenceCache::Cursor instance references a cache entry. A
non-zero reference count guarantees that the entry won't be reused for a
new register.

This makes it possible to have multiple live cursors examining
interference for different physregs.

The total number of live cursors into a cache must be kept below
InterferenceCache::getMaxCursors().

Code generation should be unaffected by this change, and it doesn't seem
to affect the cache replacement strategy either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135121 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:31:14 +00:00
Eli Friedman
7e94501071 Fix up assertion in r135018 so it doesn't trigger on 32-bit; when we're in 32-bit, it doesn't matter whether the operation overflows because the computed address is not wider than the immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135120 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:22:31 +00:00
Devang Patel
0cd0c248cc Simplify. Compile unit check inside hasValidLocation() did not add any value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135118 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:20:24 +00:00
Jim Grosbach
e77494e3e3 ARM Assembler support for DSB instruction. 
Add instalias for default 'sy' option. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135116 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:18:13 +00:00
Jakob Stoklund Olesen
c66a37df73 Reapply r135074 and r135080 with a fix. 
The cache entry referenced by the best split candidate could become
clobbered by an unsuccessful candidate.

The correct fix here is to use reference counts on the cache entries.
Coming up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135113 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:17:10 +00:00
Jim Grosbach
77f379e2a1 DMB instalias needs the same predicate as the instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135112 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:10:26 +00:00
Devang Patel
0f16a4eecc Fix typo in DEBUG message. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135111 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:04:53 +00:00
Devang Patel
5fc0d886da Add DEBUG messages. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135110 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:03:58 +00:00
Jim Grosbach
032434d622 ARM Assembler support for DMB instruction. 
Flesh out the options supported for the instruction. Shuffle tests a bit and
add entries for the rest of the options. Add an alias to handle the default
operand of "sy".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135109 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 23:40:38 +00:00
Jim Grosbach
20fcaffaf7 Update comments. These are for assembler, too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135107 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 23:33:10 +00:00
Owen Anderson
16884415db Add a target-indepedent entry to MCInstrDesc to describe the encoded size of an opcode. Switch ARM over to using that rather than its own special MCInstrDesc bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135106 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 23:22:26 +00:00
Bill Wendling
efe2a6557d Add code to handle a "frameless" unwind stack. 
The frameless unwind stack has a special encoding, the algorithm for which is in
"permuteEncode".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135103 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 23:03:31 +00:00
Jim Grosbach
6f9f884502 ARM Assembler support for DBG instruction. 
Add range checking and testing for parsing and encoding of DBG instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135102 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 22:59:38 +00:00
Jakob Stoklund Olesen
54c74e906a Revert r135074 and r135080. They broke clamscan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135096 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 22:20:09 +00:00
Jim Grosbach
1cbb0c16a1 Revert 135093. Think-o. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135094 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 22:06:11 +00:00
Jim Grosbach
91eb0aa5de Correct range for thumb co-processor immediate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135093 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 22:03:11 +00:00
Jim Grosbach
83ab070fc1 Range checking for CDP[2] immediates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135092 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 22:01:08 +00:00
Bruno Cardoso Lopes
466b022c99 Make X86ISD::ANDNP more general and Codegen 256-bit VANDNP. A more 
general version of X86ISD::ANDNP also opened the room for a little bit
of refactoring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135088 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:36:51 +00:00
Bruno Cardoso Lopes
c1af4772f1 The target specific node PANDN name is misleading. That happens because 
it's later selected to a ANDNPD/ANDNPS instruction instead of the PANDN
instruction. Rename it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135087 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:36:47 +00:00
Jim Grosbach
e35c5e06fe Cleanup Thumb co-processor instructions a bit. 
Combine redundant base classes and such. No indended functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135085 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:35:10 +00:00
Eli Friedman
2a01946de4 Make sure we don't combine a large displacement and a frame index in the same addressing mode on x86-64. It can overflow, leading to a crash/miscompile. 
<rdar://problem/9763308>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135084 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:29:53 +00:00
Jim Grosbach
0d8dae292a Parameterize away the ARM T1Cop class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135082 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:17:59 +00:00
Jim Grosbach
9bb098ad3a Fix predicates for Thumb co-processor instructions. 
They're all Thumb2 only, not just some of them. More refactoring cleanup
coming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135081 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:14:23 +00:00
Jakob Stoklund Olesen
3bae1bf62e Only keep the global split candidates that work out. 
Some pysical registers create split solutions that would spill anywhere.
They should not even be considered in future multi-way global splits.

This does not affect code generation (yet).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135080 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:49:46 +00:00
Eli Friedman
4977eb5eb5 Refactor out checking for displacements on x86-64 addressing modes. No functionality change. Refactoring in preparation for an additional safety check in FoldOffsetIntoAddress. 
Part of <rdar://problem/9763308>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135079 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:44:23 +00:00
Jim Grosbach
898e7e26a5 Fix encoding for ARM BXJ instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135077 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:25:01 +00:00
Jim Grosbach
d447ac6c8c Fix encoding of predicate bits on ARM BX_pred. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135076 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:21:31 +00:00
Jakob Stoklund Olesen
1337e2b75a Move the InterferenceCache cursor into the GlobalSplitCand struct. 
This is in preparation of supporting multiple global split candidates in
a single live range split operation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135074 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:14:52 +00:00
Jim Grosbach
fff76ee7ef Range checking for 16-bit immediates in ARM assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135071 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:10:10 +00:00
Jay Foad
d1863560cb Revert r135042. As Chris pointed out, it had no effect, and was based on 
a complete misunderstanding of the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135070 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:05:31 +00:00
Evan Cheng
9bc402c8d4 Fix up TargetLoweringObjectFile ctors to properly initialize fields. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135068 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 19:54:59 +00:00
Jim Grosbach
619e0d6d95 Give the ARM BKPT instruction the right operand type. 
The immediate is of limited range and the operand type should reflect that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135066 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 19:24:09 +00:00
Jim Grosbach
21101d60ce Add tests for ARM parsing of 'BKPT' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135063 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 19:17:36 +00:00
Evan Cheng
93a635c82c It's not safe to fold (fptrunc (sqrt (fpext x))) to (sqrtf x) if there is another use of sqrt. rdar://9763193 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135058 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 19:08:16 +00:00
Jim Grosbach
19906729a4 Improve ARM assembly parsing diagnostics a bit. 
Catch potential cascading errors on a malformed so_reg operand and bail after
the first error.

Add some tests for the diagnostics we do want.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135055 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 18:49:30 +00:00
Jim Grosbach
37ee464ea9 Destination register operand is optional for ADC and SBC ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135052 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 17:57:17 +00:00
Jim Grosbach
e8606dc7c8 Flesh out ARM Parser support for shifted-register operands. 
Now works for parsing register shifted register and register shifted
immediate arithmetic instructions, including the 'rrx' rotate with extend.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135049 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 17:50:29 +00:00
Jim Grosbach
aa4cc1a6d7 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 17:25:55 +00:00
Jim Grosbach
b7f689bab9 Update MCParsedAsmOperand debug methods. 
Update the debug output interface for MCParsedAsmOperand to have a print()
method which takes an output stream argument, an << operator which invokes
the print method using the given stream, and a dump() method which prints
the operand to the dbgs() stream. This makes the interface more consistent
with the rest of LLVM, and more convenient to use at the debugger command
line.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135043 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 15:34:57 +00:00
Jay Foad
75f67e0d8d Really cache function types and anonymous struct types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135042 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 10:39:49 +00:00
Jay Foad
fc6d3a4986 Convert InsertValueInst and ExtractValueInst APIs to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135040 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 10:26:04 +00:00
Danil Malyshev
cf852dc49b Add to RuntimeDyld support different object formats 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135037 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 07:57:58 +00:00
Chris Lattner
c09ef37171 stop leaking all named struct types with an empty name. Thanks 
to Benjamin Kramer for steering me in the right direction here.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135031 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 04:22:39 +00:00
Evan Cheng
3b737081e4 Add an entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135024 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 01:33:00 +00:00
Bruno Cardoso Lopes
61905f0139 AVX Codegen support for 256-bit versions of vandps, vandpd, vorps, vorpd, vxorps, vxorpd 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135023 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 01:15:33 +00:00
Bill Wendling
8440fe2166 Don't emit the FDE end label if the last thing emitted was a compact unwind and 
not the FDE


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135020 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 00:49:09 +00:00