11832 Commits

Author SHA1 Message Date
Michael Kuperstein
f8b3b92eb8 [X86] Fix a bug in WIN_FTOL_32/64 handling.
Duplicating an FP register "as itself" is a bad idea, since it violates the
invariant that every FP register is mapped to at most one FPU stack slot.
Use the scratch FP register instead.

This fixes PR23957.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241069 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 14:38:57 +00:00
Ranjeet Singh
b0f7871d4e Reverting r241058 because it's causing buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241061 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 12:32:53 +00:00
Ranjeet Singh
a5106ca54d There are a few places where subtarget features are still
represented by uint64_t, this patch replaces these
usages with the FeatureBitset (std::bitset) type.

Differential Revision: http://reviews.llvm.org/D10542


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241058 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 11:30:42 +00:00
Michael Kuperstein
501cad951b [X86] Add FXSR intrinsics
Add intrinsics for the FXSR instructions (FXSAVE/FXSAVE64/FXRSTOR/FXRSTOR64)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241049 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 08:49:35 +00:00
Rafael Espindola
7ede9649c1 Don't return error_code from a function that doesn't fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241033 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 01:53:01 +00:00
Rafael Espindola
de4d844704 Cleanup getRelocationAddend.
Realistically, this will be returning ErrorOr for some time as refactoring the
user code to check once per section will take some time.

Given that, use it for checking if a relocation has addend or not.

While at it, add ELFRelocationRef to simplify the users.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241028 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 00:33:59 +00:00
Peter Collingbourne
a6367d9136 Teach LTOModule to emit linker flags for dllexported symbols, plus interface cleanup.
This change unifies how LTOModule and the backend obtain linker flags
for globals: via a new TargetLoweringObjectFile member function named
emitLinkerFlagsForGlobal. A new function LTOModule::getLinkerOpts() returns
the list of linker flags as a single concatenated string.

This change affects the C libLTO API: the function lto_module_get_*deplibs now
exposes an empty list, and lto_module_get_*linkeropts exposes a single element
which combines the contents of all observed flags. libLTO should never have
tried to parse the linker flags; it is the linker's job to do so. Because
linkers will need to be able to parse flags in regular object files, it
makes little sense for libLTO to have a redundant mechanism for doing so.

The new API is compatible with the old one. It is valid for a user to specify
multiple linker flags in a single pragma directive like this:

 #pragma comment(linker, "/defaultlib:foo /defaultlib:bar")

The previous implementation would not have exposed
either flag via lto_module_get_*deplibs (as the test in
TargetLoweringObjectFileCOFF::getDepLibFromLinkerOpt was case sensitive)
and would have exposed "/defaultlib:foo /defaultlib:bar" as a single flag via
lto_module_get_*linkeropts. This may have been a bug in the implementation,
but it does give us a chance to fix the interface.

Differential Revision: http://reviews.llvm.org/D10548

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241010 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 22:04:09 +00:00
Matthias Braun
7839b00d43 X86: Rework inline asm integer register specification.
This is a new version of http://reviews.llvm.org/D10260.

It turned out that when you specify an integer register in inline asm on
x86 you get the register of the required type size back. That means that
X86TargetLowering::getRegForInlineAsmConstraint() has to accept any of
the integer registers and adapt its size to the given target size which
may be any 8/16/32/64 bit sized type. Surprisingly that means given a
constraint of "{ax}" and a type of MVT::F32 we need to return X86::EAX.

This change makes this face explicit, the previous code seemed like
working by accident because there it never returned an error once a
register was found. On the other hand this rewrite allows to actually
return errors for invalid situations like requesting an integer register
for an i128 type.

Related to rdar://21042280

Differential Revision: http://reviews.llvm.org/D10813

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241002 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 21:35:51 +00:00
Elena Demikhovsky
546178bfe5 AVX-512: all forms of SCATTER instruction on SKX,
encoding, intrinsics and tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240936 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 12:14:24 +00:00
Igor Breger
048a1eb977 AVX-512: Implemented missing encoding and intrinsics for FMA instructions
Added tests for DAG lowering ,encoding and intrinsics

Differential Revision: http://reviews.llvm.org/D10796

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240926 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 09:10:00 +00:00
NAKAMURA Takumi
85c698064c Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240924 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-29 04:50:09 +00:00
Asaf Badouh
13ce163855 [x86][AVX512]
Add vscalef support
include encoding and intrinsics


review:
http://reviews.llvm.org/D10730

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240906 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-28 14:30:39 +00:00
Elena Demikhovsky
b23b2fbd3a AVX-512: Added all SKX forms of GATHER instructions.
Added intrinsics.
Added encoding and tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240905 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-28 10:53:29 +00:00
David Majnemer
b0e21d44cb Revert "Revert r240762 "[X86] Cleanup X86WindowsTargetObjectFile::getSectionForConstant""
This reverts commit r240793 while fixing how we handle array constant
pool entries.

This fixes PR23966.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240811 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 18:55:48 +00:00
Douglas Katzman
cd39f3c6cb [X86]: Correctly sign-extend 16-bit immediate in CALL instruction.
Patch by Matthew Barney. Thanks!

Differential Revision: http://reviews.llvm.org/D9514

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240795 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 16:58:59 +00:00
Hans Wennborg
57ec696dfd Revert r240762 "[X86] Cleanup X86WindowsTargetObjectFile::getSectionForConstant"
It seems to have caused PR23966: "UNREACHABLE executed at ..\lib\Target\X86\X86TargetObjectFile.cpp:148"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240793 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 16:48:02 +00:00
Rafael Espindola
ea767137b6 Rename getObjectFile to getObject for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240785 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 14:51:16 +00:00
David Majnemer
891c0208fe [X86] Cleanup X86WindowsTargetObjectFile::getSectionForConstant
No functionality changed, just keeping things clean.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240762 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 07:03:12 +00:00
Matthias Braun
48362d63cf Revert "X86: Reject register operands with obvious type mismatches."
Revert until http://llvm.org/PR23955 is investigated.

This reverts commit r239309.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240746 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 00:26:49 +00:00
Rafael Espindola
b24bbb73a7 Add an ELFSymbolRef type.
This allows user code to say Sym.getSize() instead of having to manually fetch
the object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240708 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 22:10:04 +00:00
Ahmed Bougacha
eb78c2fbdf [X86] Accept hasAVX512() as well as hasFMA() when generating FMA.
We don't always have FMA, for example when using 'clang -mavx512f'
without an explicit CPU.

Also check for an explicit +avx512f instead of CPUs in a couple
related tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240616 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 00:44:46 +00:00
Swaroop Sridhar
983b80cf02 Enable StackMap Serialization for COFF
Summary

This change turns on the emission of 
__LLVM_Stackmaps section when generating COFF binaries.

Test Plan

Added a scenario to the test case: 
test\CodeGen\X86\statepoint-stackmap-format.ll.

Code Review:

http://reviews.llvm.org/D10680



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240613 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 00:28:42 +00:00
Douglas Katzman
72260ba601 [X86] Simplify some stuff in X86DisassemblerDecoder. NFC
- Deciding that insn->sibIndex is SIB_INDEX_NONE does not require another
check beyond the fully decoded bits being equal to 0x4.
The expression insn->sibIndex == SIB_INDEX_sib could not have been true unless
index were 0x4, because SIB_INDEX_sib is merely the range base (SIB_INDEX_EAX)
plus 4. Respectively SIB_INDEX_sib64.

- Don't use a switch statement to perform left-shift.

Differential Revision: http://reviews.llvm.org/D9762

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240598 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 22:04:55 +00:00
Rafael Espindola
821b06f3a8 Change how symbol sizes are handled in lib/Object.
COFF and MachO only define symbol sizes for common symbols. Reflect that
in the class hierarchy by having a method for common symbols only in the base
and a general one in ELF.

This avoids the need of using a magic value for the size, which had a few
problems
* Most callers didn't check for it.
* The ones that did could not tell the magic value from a file actually having
  that value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240529 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 10:20:30 +00:00
Ahmed Bougacha
0810814bcc [X86] Don't generate vbroadcasti128 for v4i64 splats from memory.
We used to erroneously match:
    (v4i64 shuffle (v2i64 load), <0,0,0,0>)

Whereas vbroadcasti128 is more like:
    (v4i64 shuffle (v2i64 load), <0,1,0,1>)

This problem doesn't exist for vbroadcastf128, which kept matching
the intrinsic after r231182.  We should perhaps re-introduce the
intrinsic here as well, but that's a separate issue still being
discussed.

While there, add some proper vbroadcastf128 tests.  We don't currently
match those, like for loading vbroadcastsd/ss on AVX (the reg-reg
broadcasts where added in AVX2).

Fixes PR23886.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240488 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 00:07:16 +00:00
Rafael Espindola
9758b4ae95 Simplify the Mangler interface now that DataLayout is mandatory.
We only need to pass in a DataLayout when mangling a raw string, not when
constructing the mangler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240405 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 13:59:29 +00:00
Rafael Espindola
b9ed9af341 Use MCSymbols for FastISel.
The summary is that it moves the mangling earlier and replaces a few
calls to .addExternalSymbol with addSym.

I originally wanted to replace all the uses of addExternalSymbol with
addSym, but noticed it was a lot of work and doesn't need to be done
all at once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240395 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 12:21:54 +00:00
Alexander Kornienko
cd52a7a381 Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
Apparently, the style needs to be agreed upon first.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240390 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 09:49:53 +00:00
Elena Demikhovsky
d96e362b3f AVX-512: Added all forms of VPABS instruction
Added all intrinsics, tests for encoding, tests for intrinsics.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240386 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 08:19:46 +00:00
Sanjay Patel
8bd59f505a [x86] generalize reassociation optimization in machine combiner to 2 instructions
Currently ( D10321, http://reviews.llvm.org/rL239486 ), we can use the machine combiner pass
to reassociate the following sequence to reduce the critical path:

A = ? op ?
B = A op X
C = B op Y
-->
A = ? op ?
B = X op Y
C = A op B

'op' is currently limited to x86 AVX scalar FP adds (with fast-math on), but in theory, it could
be any associative math/logic op (see TODO in code comment).

This patch generalizes the pattern match to ignore the instruction that defines 'A'. So instead of
a sequence of 3 adds, we now only need to find 2 dependent adds and decide if it's worth
reassociating them.

This generalization has a compile-time cost because we can now match more instruction sequences
and we rely more heavily on the machine combiner to discard sequences where reassociation doesn't
improve the critical path.

For example, in the new test case:

A = M div N
B = A add X
C = B add Y

We'll match 2 reassociation patterns, but this transform doesn't reduce the critical path:

A = M div N
B = A add Y
C = B add X

We need the combiner to reject that pattern but select this:

A = M div N
B = X add Y
C = B add A

Differential Revision: http://reviews.llvm.org/D10460



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 00:39:40 +00:00
Simon Pilgrim
7132523d6a [X86][FMA4] FMA4 ops can perform unaligned folded loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240342 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:49:41 +00:00
Ahmed Bougacha
a3afb70a5d [X86] Teach load folding to accept scalar _Int users of MOVSS/MOVSD.
The _Int instructions are special, in that they operate on the full
VR128 instead of FR32.  The load folding then looks at MOVSS, at the
user, and bails out when it sees a size mismatch.

What we really know is that the rm_Int instructions don't load the
higher lanes, so folding is fine.

This happens for the straightforward intrinsic code, e.g.:

    _mm_add_ss(a, _mm_load_ss(p));

Fixes PR23349.

Differential Revision: http://reviews.llvm.org/D10554


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240326 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 20:51:51 +00:00
Sanjay Patel
73aa02eb09 [x86] set default reciprocal (division and square root) codegen to match GCC
D8982 ( checked in at http://reviews.llvm.org/rL239001 ) added command-line 
options to allow reciprocal estimate instructions to be used in place of
divisions and square roots.

This patch changes the default settings for x86 targets to allow that recip
codegen (except for scalar division because that breaks too much code) when
using -ffast-math or its equivalent. 

This matches GCC behavior for this kind of codegen.

Differential Revision: http://reviews.llvm.org/D10396



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240310 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 18:29:44 +00:00
Rafael Espindola
09bbd16112 Avoid a Symbol -> Name -> Symbol conversion.
Before this we were producing a TargetExternalSymbol from a MCSymbol.
That meant extracting the symbol name and fetching the symbol again
down the pipeline.

This patch adds a DAG.getMCSymbol that lets the MCSymbol pass unchanged on the
DAG.

Doing so removes the need for MO_NOPREFIX and fixes the root cause of pr23900,
allowing r240130 to be committed again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 17:46:53 +00:00
Elena Demikhovsky
114489ab24 AVX-512: added VPSHUFB instruction - all SKX forms
Added intrinsics and encoding tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240277 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 13:00:42 +00:00
Elena Demikhovsky
4f1ddd396b AVX-512: All forms of VCOPMRESS VEXPAND instructions,
encoding tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240272 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 11:16:30 +00:00
Elena Demikhovsky
42ceb12123 Reverted AVX-512 vector shuffle
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240258 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 09:01:15 +00:00
Michael Kuperstein
12219f8c85 [X86] Allow more call sequences to use push instructions for argument passing
This allows more call sequences to use pushes instead of movs when optimizing for size.
In particular, calling conventions that pass some parameters in registers (e.g. thiscall) are now supported.

Differential Revision: http://reviews.llvm.org/D10500

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240257 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 08:31:22 +00:00
Elena Demikhovsky
c768510422 AVX-512: Added intrinsics for VPERMT2W/D/Q/PS/PD and
VPERMI2W/D/Q/PS/PD instructions.
Added tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240256 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 06:45:48 +00:00
Simon Pilgrim
da5f3d8f76 [X86] Code tidyup - Use SDValue bool operator. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240249 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-21 21:34:32 +00:00
Simon Pilgrim
1eabc9fb9d [X86][SSE] Fix PerformSExtCombine bug that accessed the wrong return value of an aggregate type.
Fix to rL237885 to ensure that it accesses the correct return value of an aggregate type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240223 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 16:19:24 +00:00
Sanjay Patel
30c3b2a4c2 name change: hasPattern() -> getMachineCombinerPatterns() ; NFC
This was suggested as part of D10460, but it's independent of
any functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240192 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 23:21:42 +00:00
Rafael Espindola
7edd010739 Improve error handling of getRelocationAddend.
This patch changes getRelocationAddend to use ErrorOr and considers it an error
to try to get the addend of a REL section.

If, for example, a x86_64 file has a REL section, that file is corrupted and
we should reject it.

Using ErrorOr is not ideal since we check the section type once per relocation
instead of once per section.

Checking once per section would involve getRelocationAddend just asserting and
callers checking the section before iterating over the relocations.

In any case, this is an improvement and includes a test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240176 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 20:58:43 +00:00
Alexander Kornienko
cf0db29df2 Fixed/added namespace ending comments using clang-tidy. NFC
The patch is generated using this command:

tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \
  -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \
  llvm/lib/


Thanks to Eugene Kosov for the original patch!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240137 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 15:57:42 +00:00
Eric Christopher
933d2bd391 Fix "the the" in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240112 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 01:53:21 +00:00
Sanjay Patel
b9b8054704 use SDValue bool operator; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240064 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 21:44:31 +00:00
Reid Kleckner
edb6ecd65a [X86] Rename RegInfo to TRI as suggested by Eric
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240047 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 20:32:02 +00:00
Reid Kleckner
f4e002cbd0 [X86] Refactor stack adjustments into X86FrameLowering::BuildStackAdjustment
Deduplicates some code and lets us use LEA on atom when adjusting the
stack around callee-cleanup calls. This is the only intended
functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240044 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 20:22:12 +00:00
Reid Kleckner
e7e3ecdbf2 [X86] Remove unneeded parameters and deduplicate stack alignment code
NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240033 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 18:03:25 +00:00
Asaf Badouh
27a2741354 quick fix for failure from r.240012
failure:
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/11847/steps/build_Lld/logs/stdio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240015 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 12:57:24 +00:00