Commit Graph

1188 Commits

Author SHA1 Message Date
Chad Rosier
42536af5ce Add support for passing i1, i8, and i16 call parameters. Also, be sure to
zero-extend the constant integer encoding.  Test case provides testing for
both call parameters and materialization of i1, i8, and i16 types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143821 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-05 20:16:15 +00:00
Benjamin Kramer
c25c908977 Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
As a side effect we now print dwarf ulebs with .ascii directives.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143809 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-05 11:52:44 +00:00
Chad Rosier
f470cbbad2 Add fast-isel support for returning i1, i8, and i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-04 00:50:21 +00:00
Chad Rosier
463fe24f1d Add support for sign-extending non-legal types in SelectSIToFP().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143603 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-03 02:04:59 +00:00
Lang Hames
1a1d1fcc0b Try to lower memset/memcpy/memmove to vector instructions on ARM where the alignment permits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143582 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-02 22:52:45 +00:00
Chad Rosier
e07cd5e40a Add support for comparing integer non-legal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-02 18:08:25 +00:00
Nick Lewycky
6a7efcfc02 Always use the string pool, even when it makes the .o larger. This may help
tools that read the debug info in the .o files by making the DIE sizes more
consistent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143186 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 05:29:47 +00:00
Jakob Stoklund Olesen
b0117eed84 Also set addrmode6 alignment when align==size.
Previously, we were only setting the alignment bits on over-aligned
loads and stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143160 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 22:39:16 +00:00
Evan Cheng
824a70a384 Avoid partial CPSR dependency from loop backedges. rdar://10357570
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143145 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 21:21:05 +00:00
Nick Lewycky
390c40d96a Teach our Dwarf emission to use the string pool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 06:44:11 +00:00
Chad Rosier
6d64b3adab A branch predicated on a constant can just FastEmit an unconditional branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 00:21:16 +00:00
Lang Hames
75757f9fd1 Make sure short memsets on ARM lower to stores, even when optimizing for size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143055 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 20:56:52 +00:00
Jim Grosbach
9c5edc00c4 Thumb2 remove redundant ".w" suffix from t2MVNCCi pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 17:28:15 +00:00
James Molloy
015cca6c08 Revert r142530 at least temporarily while a discussion is had on llvm-commits regarding exactly how much optsize should optimize for size over performance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 08:53:19 +00:00
Evan Cheng
f31151f34e Revert part of r142530. The patch potentially hurts performance especially
on Darwin platforms where -Os means optimize for size without hurting
performance.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143002 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 01:17:44 +00:00
Eli Friedman
5c89cb8cd6 Don't crash on variable insertelement on ARM. PR10258.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142871 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 23:08:52 +00:00
Bill Wendling
671215464c Check the visibility of the global variable before placing it into the stubs
table. A hidden variable could potentially end up in both lists.
<rdar://problem/10336715>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142869 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 23:05:43 +00:00
Chad Rosier
6690bca623 Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142557 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 00:07:12 +00:00
James Molloy
cdd8e46bec Use literal pool loads instead of MOVW/MOVT for materializing global addresses when optimizing for size.
On spec/gcc, this caused a codesize improvement of ~1.9% for ARM mode and ~4.9% for Thumb(2) mode. This is
codesize including literal pools.

The pools themselves doubled in size for ARM mode and quintupled for Thumb mode, leaving suggestion that there
is still perhaps redundancy in LLVM's use of constant pools that could be decreased by sharing entries.

Fixes PR11087.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142530 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 14:11:07 +00:00
Bob Wilson
ad952ad8f0 Fix incorrect check for sign-extended constant BUILD_VECTOR.
<rdar://problem/10298332>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 17:34:51 +00:00
Bob Wilson
db2b18feba Fix a DAG combiner assertion failure when constant folding BUILD_VECTORS.
svn r139159 caused SelectionDAG::getConstant() to promote BUILD_VECTOR operands
with illegal types, even before type legalization.  For this testcase, that led
to one BUILD_VECTOR with i16 operands and another with promoted i32 operands,
which triggered the assertion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 17:34:47 +00:00
Chad Rosier
fe04757f5e Add support for dynamic stack realignment when in thumb1 mode.
rdar://10288916


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 05:28:00 +00:00
Nadav Rotem
f9b9abbd08 Add CHECKs and document PR11158.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142240 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 20:23:23 +00:00
Nadav Rotem
8fb06b3e8f Enable element promotion type legalization by deafault.
Changed tests which assumed that vectors are legalized by widening them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142152 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16 20:31:33 +00:00
Eli Friedman
46995fa7e2 Add missing correctness check to ARMTargetLowering::ReconstructShuffle. Fixes PR11129.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14 23:58:49 +00:00
Jakob Stoklund Olesen
1c062c24ab Fix -widen-vmovs liveness issues.
When widening a copy, we are reading a larger register that may not be
live.  Use an <undef> flag to tell the register scavenger and machine
code verifier that we know the value isn't defined.

We now widen:

  %S6<def> = COPY %S4<kill>, %D3<imp-def>

into:

  %D3<def> = VMOVD %D2<undef>, pred:14, pred:%noreg, %S4<imp-use,kill>

This also keeps the <kill> flag on %S4 so we don't inadvertently kill a
live value in %S5.

Finally, ensure that ARMBaseInstrInfo::setExecutionDomain() preserves
the <undef> flag when converting VMOVD to VORR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 00:06:23 +00:00
Eric Christopher
6618a241f7 Add a new wrapper node for a DILexicalBlock that encapsulates it and a
file. Since it should only be used when necessary propagate it through
the backend code generation and tweak testcases accordingly.

This helps with code like in clang's test/CodeGen/debug-info-line.c where
we have multiple #line directives within a single lexical block and want
to generate only a single block that contains each file change.

Part of rdar://10246360

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141729 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 22:59:11 +00:00
Devang Patel
2e35047947 Add dominance check for the instruction being hoisted.
For example, MachineLICM should not hoist a load that is not guaranteed to be executed.
Radar 10254254.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 18:09:58 +00:00
Bill Wendling
3606f75f35 Test simplification that Ana Pazos noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141644 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 04:43:15 +00:00
Bill Wendling
26e8ca34fe Add testcase for PR11107.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141607 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:26:57 +00:00
Devang Patel
db7334dbc5 Revert r141569 and r141576.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141594 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 23:18:02 +00:00
Bill Wendling
ef2c86f876 Reapply r141365 now that PR11107 is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141591 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 22:59:55 +00:00
Devang Patel
9ac743a4ee Add dominance check for the instruction being hoisted.
For example, MachineLICM should not hoist a load that is not guaranteed to be executed.
Radar 10254254.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 19:09:20 +00:00
Bill Wendling
eba564ceac Revert r141365. It was causing MultiSource/Benchmarks/MiBench/consumer-lame to
hang, and possibly SPEC/CINT2006/464_h264ref.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 18:27:30 +00:00
Bob Wilson
6d2f9cec71 Reenable tail calls for iOS 5.0 and later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 17:17:49 +00:00
Bob Wilson
2fef4573df Reenable use of divmod compiler_rt functions for iOS 5.0 and later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 16:59:21 +00:00
Anton Korobeynikov
244455e6d6 Peephole optimization for ABS on ARM.
Patch by Ana Pazos!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141365 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 16:15:08 +00:00
Cameron Zwarich
d78ebe1e12 Remove a check from ARM shifted operand isel helper methods, which were blocking
merging an lsl #2 that has multiple uses on A9. This shift is free, so there is
no problem merging it in multiple places. Other unprofitable shifts will not be
merged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 23:38:50 +00:00
Dan Gohman
da5836572d Make this test less sensitive to codegen optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141195 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 18:13:08 +00:00
Jim Grosbach
6f09fcf5da ARM Darwin default relocation model is PIC.
This matches clang, so default options in llc and friends are now closer to
clang's defaults.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140863 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 17:41:35 +00:00
Andrew Trick
0c01bc385a LSR: rewrite inner loops only.
Rewriting the entire loop nest now requires -enable-lsr-nested.
See PR11035 for some performance data.
A few unit tests specifically test nested LSR, and are now under a flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140762 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:33:38 +00:00
Andrew Trick
03b08764d2 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140761 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-29 01:31:48 +00:00
Evan Cheng
9b88d2d782 Tighten a ARM dag combine condition to avoid an identity transformation, which
ends up introducing a cycle in the DAG.

rdar://10196296


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140733 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-28 23:16:31 +00:00
Eli Friedman
ad2d46d0a5 Convert more tests over to the new atomic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 20:27:49 +00:00
David Meyer
8f418b11d2 PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 06:13:20 +00:00
Jakob Stoklund Olesen
11ebe3d7c1 Also match negative offsets for addrmode3 and addrmode5.
Math is hard, and isScaledConstantInRange() always returned false for
negative constants.  It was doing unsigned division of negative numbers
before casting back to signed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140425 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 22:10:33 +00:00
Dan Gohman
7b316c9327 Fix SimplifySelectCC to add newly created nodes to the DAGCombiner
worklist, as it may be possible to perform further optimization on them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140349 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 23:01:29 +00:00
Evan Cheng
0d18174f0f Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140181 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 21:38:18 +00:00
Andrew Trick
4815d56bb2 ARM isel bug fix for adds/subs operands.
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140134 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 03:17:40 +00:00
Eli Friedman
17569fe05b Some additional tests for Thumb atomic load and store (which I somehow forgot to commit earlier).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19 22:02:33 +00:00