Commit Graph

78475 Commits

Author SHA1 Message Date
NAKAMURA Takumi
742e5cf612 test/CodeGen/X86/block-placement.ll: Relax expressions for Win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145011 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20 12:49:45 +00:00
Chandler Carruth
b0dadb9dd5 The logic for breaking the CFG in the presence of hot successors didn't
properly account for the *global* probability of the edge being taken.
This manifested as a very large number of unconditional branches to
blocks being merged against the CFG even though they weren't
particularly hot within the CFG.

The fix is to check whether the edge being merged is both locally hot
relative to other successors for the source block, and globally hot
compared to other (unmerged) predecessors of the destination block.

This introduces a new crasher on GCC single-source, but it's currently
behind a flag, and Ben has offered to work on the reduction. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20 11:22:06 +00:00
Chandler Carruth
a91a3e0489 Make an obviously const interface actually be marked as const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145009 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20 11:22:03 +00:00
Benjamin Kramer
b09a3aa4bb XFAIL this test until I figure out what indvars is doing here (or find someone who does)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20 11:10:03 +00:00
Benjamin Kramer
13c3c75176 SCEV: Actually set overflow flags on add expressions.
setFlags doesn't modify its arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145007 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20 10:24:36 +00:00
Chandler Carruth
2901243fda Add some comments to the latest test case I added here to document what
is actually being tested. Also add some FileCheck goodness to much more
carefully ensure that the result is the desired result. Before this test
would only have failed through an assert failure if the underlying fix
were reverted.

Also, add some weight metadata and a comment explaining exactly what is
going on to a trick section of the test case. Originally, we were
getting very unlucky and trying to form a block chain that isn't
actually profitable. I'm working on a fix to avoid forming these
unprofitable chains, and that would also have masked any failure from
this test case. The easy solution is to add some metadata that makes it
*really* profitable to form the bad chain here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145006 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20 09:30:40 +00:00
Craig Topper
0d86d462f8 Add code for lowering v32i8 shifts by a splat to AVX2 immediate shift instructions. Remove 256-bit splat handling from LowerShift as it was already handled by PerformShiftCombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20 00:12:05 +00:00
Craig Topper
745a86bac9 Use 256-bit vcmpeqd for creating an all ones vector when AVX2 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 22:34:59 +00:00
Craig Topper
ba798c5e51 Remove some of the special classes that worked around an old tablegen limitation of not being able to remove redundant bitconverts from patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 21:01:54 +00:00
Craig Topper
98fc72940b Custom lower AVX2 variable shift intrinsics to shl/srl/sra nodes and remove the intrinsic patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 17:46:46 +00:00
Chandler Carruth
03300ecaee Move the handling of unanalyzable branches out of the loop-driven chain
formation phase and into the initial walk of the basic blocks. We
essentially pre-merge all blocks where unanalyzable fallthrough exists,
as we won't be able to update the terminators effectively after any
reorderings. This is quite a bit more principled as there may be CFGs
where the second half of the unanalyzable pair has some analyzable
predecessor that gets placed first. Then it may get placed next,
implicitly breaking the unanalyzable branch even though we never even
looked at the part that isn't analyzable. I've included a test case that
triggers this (thanks Benjamin yet again!), and I'm hoping to synthesize
some more general ones as I dig into related issues.

Also, to make this new scheme work we have to be able to handle branches
into the middle of a chain, so add this check. We always fallback on the
incoming ordering.

Finally, this starts to really underscore a known limitation of the
current implementation -- we don't consider broken predecessors when
merging successors. This can caused major missed opportunities, and is
something I'm planning on looking at next (modulo more bug reports).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144994 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 10:26:02 +00:00
Craig Topper
6bf57b0272 Test cases for SSSE3/AVX integer horizontal add/sub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 09:03:33 +00:00
Craig Topper
54f952afac Synthesize SSSE3/AVX 128-bit horizontal integer add/sub instructions from add/sub of appropriate shuffle vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144989 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 09:02:40 +00:00
Craig Topper
3113384a34 Collapse X86 PSIGNB/PSIGNW/PSIGND node types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 07:33:10 +00:00
Craig Topper
1666cb6d63 Extend VPBLENDVB and VPSIGN lowering to work for AVX2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144987 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 07:07:26 +00:00
Craig Topper
787a88ff18 Remove some unnecessary filtering checks from X86 disassembler table build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 05:48:20 +00:00
Craig Topper
60d9a9206e Remove unused parameters from the AVX maskmov classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144985 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19 04:49:22 +00:00
Andrew Trick
5865a8dfde Fix a corner case in updating LoopInfo after fully unrolling an outer loop.
The loop tree's inclusive block lists are painful and expensive to
update. (I have no idea why they're inclusive). The design was
supposed to handle this case but the implementation missed it and my
unit tests weren't thorough enough.

Fixes PR11335: loop unroll update.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144970 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-18 03:42:41 +00:00
Nadav Rotem
cbbe33fde4 Add AVX2 vpbroadcast support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-18 02:49:55 +00:00
Kostya Serebryany
5a3a9c9371 [asan] workaround for reg alloc bug 11395: don't instrument functions with large chunks of inline assembler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144962 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-18 01:41:06 +00:00
Chad Rosier
424fe0e422 Guard call to getRegForValue with isTypeLegal check to avoid unnecessary work/dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-18 01:17:34 +00:00
Devang Patel
ce35d8b5a1 DISubrange supports unsigned lower/upper array bounds, so let's not fake it in the end while emitting DWARF. If a FE needs to encode signed lower/upper array bounds then we need to extend DISubrange or ad DISignedSubrange.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 23:43:15 +00:00
Kostya Serebryany
2e7fb2f736 quick fix: remove GlobalVariable::GlobalVariable mistakenly commited at r144933. For some reason this compiles on linux
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 23:37:53 +00:00
Andrew Trick
4f3052403c Fix an overly general check in SimplifyIndvar to handle useless phi cycles.
The right way to check for a binary operation is
cast<BinaryOperator>. The original check: cast<Instruction> &&
numOperands() == 2 would match phi "instructions", leading to an
infinite loop in extreme corner case: a useless phi with operands
[self, constant] that prior optimization passes failed to remove,
being used in the loop by another useless phi, in turn being used by an
lshr or udiv.

Fixes PR11350: runaway iteration assertion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144935 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 23:36:35 +00:00
Kostya Serebryany
7cf2a04361 fall back to explicit list of allowed linkages when instrumenting globals in asan; add a test check that asan does not touch linkonce_odr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144933 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 23:14:59 +00:00
Ted Kremenek
f249449539 Fix bug in RefCountedBase/RefCountedBaseVPTR where the reference count was accidentally copied as part of the copy constructor. This could result in objects getting leaked because there reference count was too high.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144931 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 23:02:14 +00:00
Chad Rosier
944d82ba06 Add TODO comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144920 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 21:46:13 +00:00
Craig Topper
d90a191685 Fix SSE/AVX integer comparison patterns to understand that all integer vector loads are promoted to i64 vector loads so patterns need a bitconvert. Also slightly simplify the AVX2 variable shift patterns by using the predefined bitconvert pattern fragments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 07:49:38 +00:00
Chad Rosier
2fb82ce75d Dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144888 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 07:24:49 +00:00
Chad Rosier
478b06c980 When fast iseling a GEP, accumulate the offset rather than emitting a series of
ADDs.  MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs
being: (1) If we can't materialize the large constant then we'll cause fast-isel
to bail. (2) Too large of an offset can't be directly encoded in the ADD
resulting in a MOV+ADD.  Generally not a bad thing because otherwise we would
have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix
for that. (3) Conversely, too low of a threshold we'll miss opportunities to 
coalesce ADDs.
rdar://10412592



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144886 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 07:15:58 +00:00
Craig Topper
ec43d1f553 Remove seemingly unnecessary duplicate VROUND definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144885 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 07:04:00 +00:00
Chris Lattner
c78daaf0da x86/windows issues fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144878 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 01:42:23 +00:00
Eli Friedman
9d434dbff3 Add support for custom names for library functions in TargetLibraryInfo. Add a custom name for fwrite and fputs on x86-32 OSX. Make SimplifyLibCalls honor the custom
names for fwrite and fputs.

Fixes <rdar://problem/9815881>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144876 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 01:27:36 +00:00
Daniel Dunbar
d5889d8c7f llvm-build: Attempt to work around a CMake Makefile generator bug that doesn't
properly quote strings when writing the CMakeFiles/Makefile.cmake output file
(which lists the dependencies). This shows up when using CMake + MSYS Makefile
generator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144873 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 01:19:53 +00:00
Chad Rosier
3bdb3c9b51 Don't unconditionally set the kill flag.
rdar://10456186


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144872 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 01:16:53 +00:00
Eli Friedman
d224c7879a Turn on vzeroupper insertion on call boundaries for AVX; it works as far as I know, and I'd like to see wider testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 00:21:52 +00:00
Daniel Dunbar
708276d6e4 build/make/test: Get rid of unused BUGPOINT_TOPTS variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 23:56:03 +00:00
Eli Friedman
4db4addcd4 Make sure to replace the chain properly when DAGCombining a LOAD+EXTRACT_VECTOR_ELT into a single LOAD. Fixes PR10747/PR11393.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144863 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 23:50:22 +00:00
Michael J. Spencer
11ba26db13 Object/COFF: Support common symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 23:36:12 +00:00
Jim Grosbach
9b1671bae7 Remove obsolete test.
The PLD encoding is checked via the .s file now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:50:38 +00:00
Jim Grosbach
2abba8496c Generalize the fixup info for ARM mode.
We don't (yet) have the granularity in the fixups to be specific about which
bitranges are affected. That's a future cleanup, but we're not there yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144852 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:48:37 +00:00
Jim Grosbach
47a906ac23 Update test for r144842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:46:27 +00:00
Akira Hatanaka
620db8947a Lower 64-bit constant pool node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144849 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:44:38 +00:00
Akira Hatanaka
9b944a8da2 Lower 64-bit block address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144847 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:42:10 +00:00
Jim Grosbach
b84acd2468 Fix encoding of NOP used for padding in ARM mode .align.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144842 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:40:25 +00:00
Akira Hatanaka
74c76347d3 Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpool
nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144841 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:39:56 +00:00
Akira Hatanaka
4fd40b3604 64-bit jump register instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144840 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:36:01 +00:00
Evan Cheng
2b89498979 Another missing X86ISD::MOVLPD pattern. rdar://10450317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144839 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:24:44 +00:00
Jim Grosbach
40a86ee20f ARM assembly parsing for shifted register operands for MOV instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 21:50:05 +00:00
Jim Grosbach
efed3d1f58 Clean up debug printing of ARM shifted operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144836 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 21:46:50 +00:00