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2418 Commits

Author SHA1 Message Date
Chris Lattner
287df1bc03 delete a forwarding function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100815 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-08 21:34:17 +00:00
Chris Lattner
22772214de remove the TargetLoweringObjectFileMachO::getMachoSection 
api and update clients to use MCContext instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100808 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-08 20:40:11 +00:00
Sean Callanan
8f993b8c24 Added support for ARM disassembly to edis. 
I also added a rule to the ARM target's Makefile to
build the ARM-specific instruction information table
for the enhanced disassembler.

I will add the test harness for all this stuff in
a separate commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100735 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-08 00:48:21 +00:00
Ted Kremenek
28e830d25f Update CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100714 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 23:05:23 +00:00
Chris Lattner
75361b69f3 rename llvm::llvm_report_error -> llvm::report_fatal_error 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 22:58:41 +00:00
Johnny Chen
b72e59e361 Missed this one line for the previous checkin to fix build warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100697 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 22:21:03 +00:00
Johnny Chen
efd518e1fd Fixed warnings pointed out by clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100696 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 22:03:27 +00:00
Johnny Chen
7e4823c51f Fixed warnings pointed out by clang. 
Next to work on is ARMDisassemblerCore.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100695 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 21:52:48 +00:00
Johnny Chen
c22e2fcf72 Fixed 3 warnings pointed out by clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100693 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 21:23:48 +00:00
Johnny Chen
3c500e6947 Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in 
ARMDecoderEmitter.cpp, with FIXME comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100690 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 20:53:12 +00:00
Sean Callanan
90b7097f92 Added an AsmLexer for the ARM target, which uses 
a simple mapping of register names to IDs to
identify register tokens.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100685 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 20:29:34 +00:00
Dale Johannesen
375be7730a Educate GetInstrSizeInBytes implementations that 
DBG_VALUE does not generate code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100681 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 19:51:44 +00:00
Anton Korobeynikov
4b38debf59 Remove late ARM codegen optimization pass committed by accident. 
It is not ready for public yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100673 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:23:27 +00:00
Anton Korobeynikov
e1676011c6 Split A8/A9 itins - they already were too big. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100672 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:22:11 +00:00
Anton Korobeynikov
895867326e Add some crude itin approximation for VFP load / stores on A9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100671 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:22:03 +00:00
Anton Korobeynikov
67867135ec Add some crude approximation for neon load/store instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100670 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:21:58 +00:00
Anton Korobeynikov
9113052a1f Add some A8-based approximation for instructions with unknown cycle times 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100669 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:21:52 +00:00
Anton Korobeynikov
ebd4cb43c2 Move NEON-VFP domain fixer upper, so post-RA scheduler would benefit from it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100668 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:21:46 +00:00
Anton Korobeynikov
9ad709b523 Since tblgen bug was fixed (thanks Jakob!) we don't need InstrStage2 hack anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100667 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:21:41 +00:00
Anton Korobeynikov
f3da92b2f2 Fix A8 FP NEON MAC itins 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100666 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:21:33 +00:00
Anton Korobeynikov
924369d58e A9 NEON FP itins 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100665 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:21:27 +00:00
Anton Korobeynikov
ec69dfa7ca Some permute goodness for A9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100664 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:21:22 +00:00
Anton Korobeynikov
5ca13c6ee3 More shift itins for A9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100663 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:21:16 +00:00
Anton Korobeynikov
ecc6406072 More fixes for itins 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100662 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:21:10 +00:00
Anton Korobeynikov
95102073e8 Fix invalid itins for 32-bit varians of VMLAL and friends 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100661 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:21:04 +00:00
Anton Korobeynikov
7930ac19e7 Add MAC stuff for A9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100660 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:58 +00:00
Anton Korobeynikov
d76da03e91 Fix invalid NEON MAC itins on A8 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100659 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:53 +00:00
Anton Korobeynikov
dc0bab70cf Fix itins for VPAL 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100658 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:47 +00:00
Anton Korobeynikov
0a3e2b591c Fix itins for VABA 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100657 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:42 +00:00
Anton Korobeynikov
fc2b08438c Correct VMVN itinerary: operand is read in the second cycle, not in the first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100656 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:36 +00:00
Anton Korobeynikov
e715b1e43a More A9 itineraries 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100655 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:29 +00:00
Anton Korobeynikov
1c03f2493f Correct itinerary class for VPADD 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100654 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:24 +00:00
Anton Korobeynikov
4ac0af851f VP{MAX, MIN} are of IIC_VSUBi4D itin class as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:18 +00:00
Anton Korobeynikov
f8b5c63617 VHADD differs from VHSUB at least on A9 - the former reads both operands in the second cycle, while the latter reads second operand in first cycle. Introduce new itin classes to catch this behavior. Whether this is true for A8 as well is WIP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:13 +00:00
Anton Korobeynikov
268b7446cf Some easy NEON scheduling goodness for A9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100651 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:07 +00:00
Anton Korobeynikov
a31c6fb65e Define new itin classes for ARM <-> VFP reg moves to distinguish from NEON ops. Define proper scheduling itinerary for them on A9. A8 TRM does not specify latency for them at all :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100650 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:02 +00:00
Anton Korobeynikov
63401e33cb FCONST{S,D} behaves the same way as FP unary instructions. This is true for both A8 and A9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100649 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:56 +00:00
Anton Korobeynikov
bcc02d13bb Proper cycle times for locks, since wbck latency can be larger than fwd latency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100648 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:51 +00:00
Anton Korobeynikov
c492e09455 Add new itin classes for FP16 <-> FP32 conversions and make uise of them for A9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100647 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:46 +00:00
Anton Korobeynikov
391b3431e2 Make use of new reserved/required scheduling stuff: introduce VFP and NEON locks to model domain cross stalls precisly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100646 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:40 +00:00
Anton Korobeynikov
2eeeff8371 Some bits of A9 scheduling: VFP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100643 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:18 +00:00
Anton Korobeynikov
035b23a0f4 Separate const from non-const stuff during mergeing 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100642 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:13 +00:00
Anton Korobeynikov
1e7b324fe5 Some initial version of global merger 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100641 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:07 +00:00
Bob Wilson
d0910c4534 Expand SELECT and SELECT_CC for NEON vector types. 
Radar 7770501.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100568 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-06 22:02:24 +00:00
Chris Lattner
0333535054 don't use emitlabel in the arm asm printer yet, the order 
isn't well specified.  ARM really needs to have its instprinter
finished at some point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100439 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 17:52:31 +00:00
Chris Lattner
0752cda4de fix a couple problems I introduced handling symbols 
with spaces in them.  Sym->getName()  !=   OS << *Sym




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100434 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 16:32:14 +00:00
Johnny Chen
7fb053dd45 Get rid of traling whitespaces. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100404 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 04:51:50 +00:00
Johnny Chen
9d563b676c The disassembler impl. of MCDisassembler::getInstruction() was using the pattern 
uint32_t insn;
  MemoryObject.readBytes(Address, 4, (uint8_t*)&insn, NULL)

to read 4 bytes of memory contents into a 32-bit uint variable.  This leaves the
interpretation of byte order up to the host machine and causes PPC test cases of
arm-tests, neon-tests, and thumb-tests to fail.  Fixed to use a byte array for
reading the memory contents and shift the bytes into place for the 32-bit uint
variable in the ARM case and 16-bit halfword in the Thumb case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100403 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 04:46:17 +00:00
Jakob Stoklund Olesen
fddb7667ca Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.

This works well because TableGen resolves member references late:

class I : Instruction {
  AddrMode AM = AddrModeNone;
  let TSFlags{3-0} = AM.Value;
}

let AM = AddrMode4 in
def ADD : I;

TSFlags gets the expected bits from AddrMode4 in this example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 03:10:20 +00:00
Evan Cheng
cb86609421 Temporarily remove to disable building of ARM disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100380 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 01:57:50 +00:00