Commit Graph

66388 Commits

Author SHA1 Message Date
David Blaikie
5f0929577b Prototype of skeleton type units for fission
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198851 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 05:08:28 +00:00
David Blaikie
a34ec4a961 llvm-dwarfdump: type unit dwo support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198850 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 05:08:24 +00:00
David Blaikie
6fc76f3ec4 DwarfDebug: Refactor out common skeleton construction code to be reused for type unit skeletons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198846 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 04:28:46 +00:00
David Blaikie
d5a4058ba4 Reformatting for r198842
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198843 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 03:24:13 +00:00
David Blaikie
2af945d2cd DwarfUnit: Rename "Node" to "CUNode" and propagate it through DwarfTypeUnit as well.
Since we'll now also need the split dwarf file name along with the
language in DwarfTypeUnits, just use the whole DICompileUnit rather than
explicitly handling each field needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198842 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 03:23:41 +00:00
David Blaikie
75a032dc00 Revert "DwarfUnit: Move the DICompileUnit Node to the DwarfCompileUnit only"
This reverts commit r198830.

Decided to go a different way with this...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198841 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 03:03:27 +00:00
Chandler Carruth
41d9e92ec0 [PM] Rename this source file to something a bit more generic before
I add support for the new pass manager to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198838 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 02:39:45 +00:00
Chandler Carruth
560e3955c3 Put the functionality for printing a value to a raw_ostream as an
operand into the Value interface just like the core print method is.
That gives a more conistent organization to the IR printing interfaces
-- they are all attached to the IR objects themselves. Also, update all
the users.

This removes the 'Writer.h' header which contained only a single function
declaration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198836 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 02:29:41 +00:00
David Blaikie
58691befda DwarfUnit: Move the DICompileUnit Node to the DwarfCompileUnit only
It's unused in DwarfTypeUnit, as is expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198830 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 01:20:14 +00:00
Rafael Espindola
0b5675926a Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198819 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 00:32:54 +00:00
Andrew Trick
b3ea6d7ce7 llvm.experimental.stackmap: fix encoding of large constants.
In the stackmap format we advertise the constant field as signed.
However, we were determining whether to promote to a 64-bit constant
pool based on an unsigned comparison.

This fix allows -1 to be encoded as a small constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198816 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 00:22:31 +00:00
David Blaikie
07ef4fda1b Simplify/collapse/denest a conditions/blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198813 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 00:13:35 +00:00
David Blaikie
4130da81de llvm-dwarfdump: reorder dwo sections to immediately proceed their non-dwo equivalents
This makes it easier to write a test that's mostly shared between
fission and non-fission (using FileCheck's multiple prefix support).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198806 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 23:29:59 +00:00
Chandler Carruth
6b71233fb1 Remove vestigal bits of MC from the mangler. It no longer uses this, and
having the include could cause weird layering problems between the IR
and MC libraries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198796 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 21:59:22 +00:00
Hal Finkel
5bbbb37ff2 Conservatively handle multiple MMOs in MIsNeedChainEdge
MIsNeedChainEdge, which is used by -enable-aa-sched-mi (AA in misched), had an
llvm_unreachable when -enable-aa-sched-mi is enabled and we reach an
instruction with multiple MMOs. Instead, return a conservative answer. This
allows testing -enable-aa-sched-mi on x86.

Also, this moves the check above the isUnsafeMemoryObject checks.
isUnsafeMemoryObject is currently correct only for instructions with one MMO
(as noted in the comment in isUnsafeMemoryObject):

  // We purposefully do no check for hasOneMemOperand() here
  // in hope to trigger an assert downstream in order to
  // finish implementation.

The problem with this is that, had the candidate edge passed the
"!MIa->mayStore() && !MIb->mayStore()" check, the hoped-for assert would never
happen (which could, in theory, lead to incorrect behavior if one of these
secondary MMOs was volatile, for example).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198795 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 21:52:02 +00:00
Matt Arsenault
b9271b0ec5 Move declaration of variables down to first use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198794 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 21:47:14 +00:00
Ana Pazos
cb1f0ddce4 [AArch64][NEON] Added UXTL and UXTL2 instruction aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198791 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 21:02:13 +00:00
Roman Divacky
edc4b60fca Force emit a relocation for @gnu_indirect_function symbols so that the indirect
resolution works.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198780 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 18:50:32 +00:00
David Woodhouse
adc537e74b [x86] Remove OpSize16 flag from MOV32r0
It's not a real instruction any more and doesn't need encoding information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198778 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 18:38:26 +00:00
Andrea Di Biagio
638e97f135 Teach the DAGCombiner how to fold 'vselect' dag nodes according
to the following two rules:
  1) fold (vselect (build_vector AllOnes), A, B) -> A
  2) fold (vselect (build_vector AllZeros), A, B) -> B



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198777 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 18:33:04 +00:00
Richard Sandiford
e333ed2177 [DAGCombiner] Factor duplicated rotate code into a separate function
No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198768 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 15:40:47 +00:00
David Woodhouse
38b362617c [x86] Support R_386_PC8, R_386_PC16 and R_X86_64_PC8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198763 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:40 +00:00
David Woodhouse
51a64502bf [x86] Add JMP_2 and other 16-bit PC-relative branch instructions
Mark them as requiring 16-bit mode for now, since we don't yet have
relaxation support for FK_Data_2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198762 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:36 +00:00
David Woodhouse
2634d1f6da [x86] Do not relax PUSHi16 to PUSHi32 (PR18414)
They do *different* things to %esp, so they are not equivalent.

Rename PUSHi8 to PUSH32i8 and add the missing PUSH16i8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198761 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:32 +00:00
David Woodhouse
ab5b9489e9 [x86] Make AsmParser validate registers for memory operands a bit better
We can't do a perfect job here. We *have* to allow (%dx) even in 64-bit
mode, for example, because it might be used for an unofficial form of
the in/out instructions. We actually want to do a better job of validation
*later*. Perhaps *instead* of doing it where we are at the moment.

But for now, doing what validation we *can* do in the place that the code
already has its validation, is an improvement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198760 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:28 +00:00
David Woodhouse
aab59870a4 [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand
It seems there is no separate instruction class for having AdSize *and*
OpSize bits set, which is required in order to disambiguate between all
these instructions. So add that to the disassembler.

Hm, perhaps we do need an AdSize16 bit after all?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198759 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:24 +00:00
David Woodhouse
4f32ce2436 [x86] Use 16-bit addressing where possible in 16-bit mode
Where "where possible" means that it's an immediate value and it's below
0x10000. In fact GAS will either truncate or error with larger values,
and will insist on using the addr32 prefix to get 32-bit addressing. So
perhaps we should do that, in a later patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198758 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:18 +00:00
David Woodhouse
975fe2cfc3 [x86] Fix JCXZ,JECXZ_32 for 16-bit mode
JCXZ should have the 0x67 prefix only if we're in 32-bit mode, so make that
appropriately conditional. And JECXZ needs the prefix instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198757 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:12 +00:00
David Woodhouse
d7ae82f8f5 [x86] Disambiguate RET[QL] and fix aliases for 16-bit mode
I couldn't see how to do this sanely without splitting RETQ from RETL.

Eric says: "sad about the inability to roundtrip them now, but...".
I have no idea what that means, but perhaps it wants preserving in the
commit comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198756 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:07 +00:00
David Woodhouse
1c75f15a60 [x86] Disambiguate [LS][IG]DT{32,64}m and add 16-bit versions, fix aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198755 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:57:55 +00:00
David Woodhouse
ce8d7befbf [x86] Add JMP16[rm],CALL16[rm] instructions, and fix up aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198754 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:57:49 +00:00
David Woodhouse
1a19e26276 [x86] Add PUSHA16,POPA16 instructions, and fix aliases for 16-bit mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198753 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:57:45 +00:00
David Woodhouse
a493812047 [x86] Add OpSize16 to instructions that need it
This fixes the bulk of 16-bit output, and the corresponding test case
x86-16.s now looks mostly like the x86-32.s test case that it was
originally based on. A few irrelevant instructions have been dropped,
and there are still some corner cases to be fixed in subsequent patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198752 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:57:40 +00:00
Elena Demikhovsky
958cc01fff AVX-512: Added more intrinsics for pmin/pmax, pabs, blend, pmuldq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198745 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 10:54:22 +00:00
Iain Sandoe
9c0a05c7af [patch] Adjust behavior of FDE cross-section relocs for targets that don't support abs-differences.
Modern versions of OSX/Darwin's ld (ld64 > 97.17) have an optimisation present that allows the back end to omit relocations (and replace them with an absolute difference) for FDE some text section refs.

This patch allows a backend to opt-in to this behaviour by setting "DwarfFDESymbolsUseAbsDiff".  At present, this is only enabled for modern x86 OSX ports.

test changes by David Fang.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198744 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 10:22:54 +00:00
Kevin Qin
4712264fb8 [AArch64 NEON] Fix generating incorrect value type of NEON_VDUPLANE
when lower build_vector if result value type mismatch with operand
value type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198743 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 08:06:14 +00:00
Venkatraman Govindaraju
8f5124903f [SparcV9] Rename operands in some sparc64 instructions so that TableGen can encode them correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198740 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 07:47:57 +00:00
Venkatraman Govindaraju
f0e4bf2daa [Sparc] Correct the mask for fixup_sparc_br19.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198739 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 06:46:51 +00:00
Venkatraman Govindaraju
7ceaa8623c [Sparc] Add support for parsing branch instructions and conditional moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198738 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 06:14:52 +00:00
Lang Hames
42fdb1f00f Re-apply r196639: Add support for archives and object file caching under MCJIT.
I believe the bot failures on linux systems were due to overestimating the
alignment of object-files within archives, which are only guaranteed to be
two-byte aligned. I have reduced the alignment in
RuntimeDyldELF::createObjectImageFromFile accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198737 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 04:09:09 +00:00
Saleem Abdulrasool
cb914a32d6 ARM IAS: properly handle expression operands
Operands which involved label arithemetic would previously fail to parse.  This
corrects that by adding the additional case for the shift operand validation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198735 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 03:28:14 +00:00
Hao Liu
9e0fd27ce7 Fix a bug about generating undef operand when optimising shuffle vector and insert element in instruction combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198730 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 03:06:15 +00:00
David Woodhouse
476136e951 [x86] Kill gratuitous X86_{32,64}TargetMachine subclasses, use X86TargetMachine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198720 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 00:08:50 +00:00
Rafael Espindola
b56c57bcbb Move the llvm mangler to lib/IR.
This makes it available to tools that don't link with target (like llvm-ar).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198708 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 21:19:40 +00:00
Roman Divacky
7e889af768 In the ELFWriter when writing aliased (.set) symbols dont blindly
take type from the new symbol but merge them so that the type
is never "downgraded".

This is probably quite rare, except for IFUNC symbols which
we used to misassemble, losing the IFUNC type.

Fixes #18372.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 20:17:03 +00:00
Cameron McInally
67cc1dc995 Fix uninitialized variable warning in DataLayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198702 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 19:51:38 +00:00
Rafael Espindola
e3b54e2e50 Don't assert with private type info variables.
With the gnu objc runtime private strings are used. Since we only need to
produce a unique label, the fix is to just drop the asserts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198701 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 19:38:47 +00:00
Benjamin Kramer
5f9cb7b569 Emit arange padding with a single directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198700 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 19:28:14 +00:00
David Peixotto
6f9a004738 Add ARM fconsts/fconstd aliases for vmov.f32/vmov.f64
This commit adds the pre-UAL aliases of fconsts and fconstd for
vmov.f32 and vmov.f64. They use an InstAlias rather than a
MnemonicAlias to properly support the predicate operand.

We need to support encoded 8-bit constants in order to implement the
pre-UAL fconsts/fconstd aliases for vmov.f32/vmov.f64, so this
commit also fixes parsing of encoded floating point constants used
in vmov.f32/vmov.f64 instructions. Now we can support assembly code
like this:

  fconsts s0, #0x70

which is equivalent to vmov.f32 s0, #1.0.

Most of the code was already in place to support this feature.
Previously the code was trying to accept encoded 8-bit float
constants for the vmov.f32/vmov.f64 instructions.  It looks like the
support for parsing encoded floats was lost in a refactoring in
commit r148556 and we did not have any tests in place to catch it.

The change in this commit is to keep the parsed value as a 32-bit
float instead of a 64-bit double because that is what the isFPImm()
function expects to find. There is no loss of precision by using a
32-bit float here because we are still limited to an 8-bit encoded
value in the end.

Additionally, we explicitly reject encoded 8-bit floats for
vmovf.32/64. This is the same as the current behavior, but we now do
it explicitly rather than accidently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198697 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 18:19:23 +00:00
Logan Chien
1485d51a16 [arm] Fix an incorrect comment in ARMUnwindOpAsm.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198696 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 17:47:25 +00:00