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32 Commits

Author SHA1 Message Date
Chris Lattner
bcdda01210 Fix a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15409 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-01 19:31:30 +00:00
Alkis Evlogimenos
31e155e610 Align breaks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15371 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-31 10:05:44 +00:00
Chris Lattner
167cf33e1d Add breaks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15365 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-31 09:53:31 +00:00
Alkis Evlogimenos
6103c1703c Simplify code a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15364 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-31 09:44:32 +00:00
Alkis Evlogimenos
02a453074d Correctly spell 'unconditional'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15363 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-31 09:41:44 +00:00
Alkis Evlogimenos
36f506eddb Implement insertGoto and reverseBranchCondition for the X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15362 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-31 09:38:47 +00:00
Alkis Evlogimenos
8295f202d9 A big X86 instruction rename. The instructions are renamed to make 
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:

ADD8rr -> add, 8-bit register, 8-bit register

IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate

IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate

MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11995 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 08:50:03 +00:00
Chris Lattner
dce363d5ec Adjust to change in TII ctor arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11987 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 06:31:44 +00:00
Chris Lattner
1ddf475b6a These two virtual methods are never called. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11984 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:59:33 +00:00
Alkis Evlogimenos
890f92328d Move MOTy::UseType enum into MachineOperand. This eliminates the 
switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11715 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 19:23:26 +00:00
Alkis Evlogimenos
be766c7246 Remove getAllocatedRegNum(). Use getReg() instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11393 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-13 21:01:20 +00:00
Chris Lattner
6d21518718 Don't use MachineOperator::is(Phys|Virt)Register 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11276 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 20:31:28 +00:00
Chris Lattner
0bbf3052c2 Tighten up checks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11274 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 20:25:13 +00:00
Alkis Evlogimenos
a1b6f95f78 FpMOV is also a move instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11055 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-01 08:22:16 +00:00
Alkis Evlogimenos
5e30002af7 Add TargetInstrInfo::isMoveInstr() to support coalescing in register 
allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10633 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-28 17:35:08 +00:00
Brian Gaeke
d0fde30ce8 Put all LLVM code into the llvm namespace, as per bug 109. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-11-11 22:41:34 +00:00
John Criswell
b576c94c15 Added LLVM project notice to the top of every C++ source file. 
Header files will be on the way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-20 19:43:21 +00:00
Chris Lattner
abf05b2dae * Start using tablegen'd instruction descriptions 
* Fix bug in the createNOP method, which was not marking the operands of the
  generated XCHG as useanddef.  I don't think this method is actually used,
  so it wasn't breaking anything, but it should be fixed anyway...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7539 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-03 21:55:55 +00:00
Misha Brukman
12745c55e1 Reword to remove reference to how things worked in the past. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6323 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-24 01:08:43 +00:00
Misha Brukman
e9d883828a Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6320 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-05-24 00:09:50 +00:00
Chris Lattner
3501feab81 Rename MachineInstrInfo -> TargetInstrInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-01-14 22:00:31 +00:00
Chris Lattner
b339223518 Add comments, switch uses/defs to match InstrInfo.def file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5102 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-18 01:05:54 +00:00
Chris Lattner
4ce42a776a * Move information about Implicit Defs/Uses into X86InstrInfo.def. 
* Expose information about implicit defs/uses of register through the
  MachineInstrInfo.h file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4877 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-03 05:42:53 +00:00
Misha Brukman
a85d6bc2bc Added -*- C++ -*- mode to the comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4826 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 22:42:50 +00:00
Chris Lattner
f21dfcddcf Expose base opcode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4742 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 06:56:24 +00:00
Chris Lattner
6aab9cf65c Start to add more information to instr.def 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4741 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 05:37:11 +00:00
Chris Lattner
dbb61c6445 Reorganize printing interface a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4728 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 22:53:13 +00:00
Chris Lattner
b752e9a2ae Set the destination register field based on the target specific flags 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4442 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-30 01:15:31 +00:00
Chris Lattner
055c965bff Rename X86InstructionInfo to X86InstrInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4413 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-29 21:05:24 +00:00
Chris Lattner
33f53b554a Minor renaming 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4410 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-29 20:48:56 +00:00
Chris Lattner
9bbf439e38 Implement MachineInstrInfo interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4394 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-29 17:43:19 +00:00
Chris Lattner
726140821f Initial checkin of X86 backend. 
We can instruction select exactly one instruction 'ret void'.  Wow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4284 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-25 22:55:53 +00:00