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456fdaf0ce
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15365 Commits

Author SHA1 Message Date
Chris Lattner
456fdaf0ce instead of migrating it to the MC instruction encoder, just 
rip out the implementation of X86InstrInfo::GetInstSizeInBytes.
The code being ripped out just implemented a copy and hacked up
version of the (old) instruction encoder, and is buggy and 
terrible in other ways.  Since "GetInstSizeInBytes" is really 
only there to support the JIT's "NeedsExactSize" hook (which
noone is using), just rip out the code.  I will rip out the
NeedsExactSize hook next.

This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109149 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 21:05:13 +00:00
Xerxes Ranby
99ccffe87e ARMv4 JIT forgets to set the lr register when making a indirect function call. Fixes PR7608 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109125 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 17:28:34 +00:00
Gabor Greif
a399781289 undo 80 column trespassing I caused 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109092 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 10:37:47 +00:00
Chandler Carruth
30d35b8720 Mark an assert-only variable as used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109091 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 08:02:25 +00:00
Chandler Carruth
986569ac9a Fix the generated file name for CMake. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109090 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 08:00:52 +00:00
Chandler Carruth
8a89a6ae9c Attempt to fix linking issues with CMake. Please review other CMake users, 
especially on other platforms. Is there a better way to fix this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109084 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 06:27:45 +00:00
Owen Anderson
214e46eac7 Update CMake files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109081 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 06:00:01 +00:00
Eric Christopher
9a9d275dc7 Custom lower the memory barrier instructions and add support 
for lowering without sse2.  Add a couple of new testcases.

Fixes a few libgomp tests and latent bugs.  Remove a few todos.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109078 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 02:48:34 +00:00
Evan Cheng
b1c857bb7b Fix constant island pass's handling of tBR_JTr. The offset of the instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into: 
mov     pc, r1
        .align  2
LJTI0_0_0:
        .long    LBB0_14

This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109076 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 02:09:47 +00:00
Eric Christopher
90eb4024ba 80-columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109070 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 00:26:08 +00:00
Nate Begeman
0c07b64fec Make fast isel win64-aware w.r.t. call-clobbered regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109069 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 00:09:39 +00:00
Evan Cheng
4a863e2c75 More register pressure aware scheduling work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109064 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 23:53:58 +00:00
Bruno Cardoso Lopes
2b69143083 Add more 256-bit forms for a bunch of regular AVX instructions 
Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109063 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 23:53:50 +00:00
Rafael Espindola
fcbd1a749f Fixes win64. It was broken by a previous patch where I missed the !isWin64 
and then forced every register to be a vr128 on win64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109060 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 23:19:57 +00:00
Jim Grosbach
917290043f For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumb 
rdar://8202967

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109057 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 23:03:52 +00:00
Chris Lattner
908bafe6fa add some rough support for making mcinst lowering work without an 
asmprinter or mangler around.  This is option #B for killing off 
X86InstrInfo::GetInstSizeInBytes.  Option #A (killing 
"needsexactsize") was sent for consideration to llvmdev.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109056 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 23:03:35 +00:00
Eric Christopher
ab695889c6 Baby steps towards ARM fast-isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109047 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 22:26:11 +00:00
Owen Anderson
d13db2c59c Fix batch of converting RegisterPass<> to INTIALIZE_PASS(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 22:09:45 +00:00
Bruno Cardoso Lopes
e29f37f6a1 Add missing AVX convert instructions. Those instructions are not described in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109039 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 21:37:59 +00:00
Nate Begeman
c8ea673bc0 Fix a couple issues with Win64 ABI 
1) all registers were spilled as xmm, regardless of actual size
2) win64 abi doesn't do the varargs-size-in-%al thing

Still to look into:

xmm6-15 are marked as clobbered by call instructions on win64 even though they aren't.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109035 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 20:49:52 +00:00
Bruno Cardoso Lopes
928fc3b4a0 Avoid AVX instructions to be selected instead of its SSE form 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109032 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 20:38:42 +00:00
Rafael Espindola
bc56501435 Fix calling convention on ARM if vfp2+ is enabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109009 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 11:38:30 +00:00
Eric Christopher
dab4dac2a0 Pulling out previous patch, must've run the tests in 
the wrong directory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109005 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 09:23:56 +00:00
Eric Christopher
87f41370a8 Lower MEMBARRIER on x86 and support processors without SSE2. 
Fixes a pile of libgomp failures in the llvm-gcc testsuite due
to the libcall not existing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109004 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 09:05:23 +00:00
Bruno Cardoso Lopes
cf6ca03128 Add AVX only vzeroall and vzeroupper instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109002 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 08:56:24 +00:00
Evan Cheng
4f6b4674be Teach bottom up pre-ra scheduler to track register pressure. Work in progress. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108991 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 06:09:07 +00:00
Bruno Cardoso Lopes
7d7d15a159 Add new AVX vpermilps, vpermilpd and vperm2f128 instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108984 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 03:07:42 +00:00
Bruno Cardoso Lopes
4b13f3cf3d Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to support it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108983 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 02:46:58 +00:00
Bruno Cardoso Lopes
1154f426d7 Add new AVX vextractf128 instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 23:19:02 +00:00
Chris Lattner
6e8154354f make asmprinter optional, even though passing in null will cause things to explode right now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108955 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:45:33 +00:00
Chris Lattner
cb63ecba31 continue pushing dependencies around. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108952 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:35:40 +00:00
Chris Lattner
c0115b5ca1 reduce X86MCInstLower dependencies on asmprinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:30:53 +00:00
Chris Lattner
0c13cf36ad pass around MF, not MMI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108949 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:26:07 +00:00
Chris Lattner
7648bd428b cleanups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108947 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:23:57 +00:00
Chris Lattner
1a34c83caf move two asmprinter methods into the asmprinter .cpp file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 22:18:19 +00:00
Chris Lattner
4dbbe3433f prune #includes a little. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108929 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 21:17:29 +00:00
Bruno Cardoso Lopes
e1c29be6f0 Add new AVX instruction vinsertf128 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108892 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 19:44:51 +00:00
Jim Grosbach
f084a5e81d Using BIC for immediates needs an extra bump for its complexity to get 
instruction selection to prefer it when possible. rdar://7903972

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108844 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 16:07:04 +00:00
Jim Grosbach
26ede6834e Removed un-used code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108841 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 14:51:32 +00:00
Bruno Cardoso Lopes
46773793cb Fix PR7174, a couple o Mips fixes: 
- Fix a typo for PIC check during jmp table lowering
- Also fix the "first jump table basic block is not
considered only reachable by fall through" problem, use this
ad-hoc solution until I come up with something better.

Patch by stetorvs@gmail.com



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108820 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 08:37:04 +00:00
Bruno Cardoso Lopes
29e9daa750 Fix Mips PR7473. Patch by stetorvs@gmail.com 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108816 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 07:58:51 +00:00
Eric Christopher
72852a8cfb Constify some arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108812 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 06:52:21 +00:00
Bruno Cardoso Lopes
43945d99de Add AVX vbroadcast new instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108788 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 00:11:13 +00:00
Daniel Dunbar
7b81a0ef17 Update CMake files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108787 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 00:08:13 +00:00
Chris Lattner
f447a5f144 sink the arm implementations of ASmPrinter and MCInstLower 
out of the AsmPrinter directory into libarm.  Now the
ARM InstPrinters depend jsut on the MC stuff, not on vmcore
or codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108783 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 23:44:46 +00:00
Chris Lattner
aef40351f6 fix a layering problem by moving the x86 implementation 
of AsmPrinter and InstLowering into libx86 and out of the
asmprinter subdirectory.  Now X86/AsmPrinter just depends on
MC stuff, not all of codegen and LLVM IR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108782 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 23:41:57 +00:00
Bruno Cardoso Lopes
94143ee625 Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108769 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 23:32:44 +00:00
Evan Cheng
d70f57b254 ARM has to provide its own TargetLowering::findRepresentativeClass because its scalar floating point registers alias its vector registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108761 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 22:15:08 +00:00
Daniel Dunbar
77e2dd7bb2 X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same 
instruction, we only want to allow the one for the current subtarget.
 - This also fixes suffix matching for jmp instructions, because it eliminates
   the ambiguity between 'jmpl' and 'jmpq'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 20:44:16 +00:00
Jim Grosbach
e1102caf86 Since ARM emits inline jump tables as part of the ConstantIsland pass, 
it should set the jump table encloding the EK_Inline. This prevents
a second, unused, copy of the table from being emitted after the function
body. PR6581.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108730 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 17:20:38 +00:00