Commit Graph

79 Commits

Author SHA1 Message Date
Eric Christopher
be9408ec86 Remove intrinsic support for __builtin_ia32_vec_set_v16qi and
__builtin_ia32_vec_set_v4si as these should be lowered in the
front-end to inserts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76714 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 01:11:48 +00:00
Eric Christopher
248f80d488 Add intrinsic for __builtin_ia32_vec_set_v4si which turns out to be
pinsrd in sse4.1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76684 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:43:14 +00:00
Evan Cheng
236aa8a503 ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these intrinsics expect the high bits will not be modified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65499 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-26 03:12:02 +00:00
Bill Wendling
cdcc3e6e12 Modify the intrinsics pattern to separate out the "return" types from the
"parameter" types. An intrinsic can now return a multiple return values like
this:

  def add_with_overflow : Intrinsic<[llvm_i32_ty, llvm_i1_ty],
                                    [LLVMMatchType<0>, LLVMMatchType<0>]>;



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59237 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 09:08:33 +00:00
Mon P Wang
607ec1f608 Removed pinsrd and pinsrq intrinsics because the code generator does not support
them since they map to insert element


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57564 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 06:27:16 +00:00
Dale Johannesen
e397acce9d Fix SSE4.1 roundss, roundsd. While the instructions have
the same pattern as roundpd/roundps, the Intel compiler 
builtins do not:  rounds* has an extra operand.  Fixes
gcc.target/i386/sse4_1-rounds[sd]-[1234].c



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57370 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10 23:51:03 +00:00
Bill Wendling
5e249b4a14 "The original bug was a complaint that _mm_srli_si128 mis-compiled when passed
a constant vector ("{0x123, 0x456}" syntax).  The fix is to simplify the
_mm_srli_si128 macro, and  move the "* 8" from the macro into the compiler
back-end.  I can't change the existing __builtins because so many people are
using them :-(."
Patch by Stuart Hastings!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56944 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-02 05:56:52 +00:00
Nate Begeman
30a0de94e7 SSE codegen for vsetcc nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53719 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 16:51:19 +00:00
Evan Cheng
4e444436f2 Horizontal-add instructions are not commutative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52363 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 21:16:24 +00:00
Evan Cheng
6bd9567a6a - Add "Commutative" property to intrinsics. This allows tblgen to generate the commuted variants for dagisel matching code.
- Mark lots of X86 intrinsics as "Commutative" to allow load folding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52353 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 20:29:38 +00:00
Evan Cheng
a31593901d Eliminate x86.sse2.punpckh.qdq and x86.sse2.punpckl.qdq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51533 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-24 02:56:30 +00:00
Evan Cheng
e716bb1c59 Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51531 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-24 02:14:05 +00:00
Evan Cheng
3cc8f9bfef Remove x86.sse2.loadh.pd and x86.sse2.loadl.pd. These will be lowered into load and shuffle instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-24 00:07:06 +00:00
Evan Cheng
22b942aa4d Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This allow us to simplify the horribly complicated matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50601 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-03 00:52:09 +00:00
Evan Cheng
fa5a91a71e Undo 48570. Correctly match mmx shift instructions with an immediate operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48627 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 00:40:09 +00:00
Evan Cheng
dff1dcac6c Add intrinsics to match mmx shift builtin's with immediate operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48569 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 23:38:52 +00:00
Nate Begeman
d254ca2b8e __builtin_ia32_movntdqa reads memory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48431 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-16 21:15:47 +00:00
Dale Johannesen
131d5c9f4a Missed one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46733 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-05 01:12:10 +00:00
Dale Johannesen
a76619337e Do not unconditionally redefine vec_ext_v16qi and
vec_ext_v4si builtins.  This is a hack; they should
be defined here, then resolved in the X86 BE.
However there is enough other stuff missing in the
X86 BE for SSE41 that this will do for now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46727 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-04 23:27:29 +00:00
Nate Begeman
63ec90a6a8 SSE 4.1 Intrinsics and detection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46681 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-03 07:18:54 +00:00
Evan Cheng
92b7c1d94e Fix sse2.psrl.w and sse2.psrl.q definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45772 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-09 02:16:44 +00:00
Chris Lattner
234d529e58 remove attribution from a variety of miscellaneous files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45425 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 22:59:10 +00:00
Evan Cheng
56bf2f8288 Add a few more missing gcc builtin's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45278 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-21 01:30:39 +00:00
Evan Cheng
f6cb6eeb5a Type specification didn't match gcc's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45260 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-20 09:35:28 +00:00
Evan Cheng
a5cecd0a13 Remove int_x86_sse2_movl_dq. It's replaced with a string compare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45140 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-18 01:04:25 +00:00
Evan Cheng
a4d6818dbe These have matching builtin's in 4.2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45139 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-18 00:52:20 +00:00
Evan Cheng
f9b83fcf95 Bring back int_x86_sse2_movl_dq intrinsic for backward compatibility. Make sure
it's auto-upgraded to a shufflevector instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45131 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-17 22:33:23 +00:00
Evan Cheng
1d0ba37099 __builtin_ia32_movqv4si is now expanded to a shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45057 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-15 02:54:12 +00:00
Anders Carlsson
d04764a8ac All MMX shift instructions took a <2 x i32> vector as the shift amount parameter. Change this to be <1 x i64> instead, which matches the assembler instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45027 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-14 06:38:54 +00:00
Dale Johannesen
c784208a73 Add missing SSE builtins: CVTPD2PI, CVTPS2PI,
CVTTPD2PI, CVTTPS2PI, CVTPI2PD, CVTPI2PS.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43523 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-30 22:15:38 +00:00
Dale Johannesen
6e3a8f3dfb Fix argument types for PSLLQ, PSRLQ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43490 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-30 01:44:33 +00:00
Dan Gohman
66018ea1b2 There is no {rsqrt,rcp}{p,s}d.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42190 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 15:24:00 +00:00
Bill Wendling
76d708b76f Adding SSSE3 intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40982 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 06:22:27 +00:00
Bill Wendling
6a20cf0776 Add missing SSE builtins:
__builtin_ia32_cvtss2si64
    __builtin_ia32_cvttss2si64
    __builtin_ia32_cvtsi642ss
    __builtin_ia32_cvtsd2si64
    __builtin_ia32_cvttsd2si64
    __builtin_ia32_cvtsi642sd


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40411 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-23 03:07:27 +00:00
Chris Lattner
bfcd8038ce add missing mmx intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37099 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 06:03:49 +00:00
Bill Wendling
69dc5332de Add the final MMX instructions. Correct a few wrong patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36405 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 21:18:37 +00:00
Bill Wendling
bb1ee05253 Add support for our first SSSE3 instruction "pmulhrsw".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35869 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10 22:10:25 +00:00
Bill Wendling
71bfd11c67 Adding more MMX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35638 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 23:48:32 +00:00
Bill Wendling
823efee633 Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35616 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 06:00:37 +00:00
Bill Wendling
b94827769a Add support for integer comparison builtins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35384 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 20:21:31 +00:00
Bill Wendling
b172ab0533 This is dead. DEAD I tells you!!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35291 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 22:42:04 +00:00
Bill Wendling
b8440a0c39 PR1260:
Add final support to get the QT example to compile.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35290 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 22:35:46 +00:00
Bill Wendling
02ced83ce7 We generate a shufflevector instruction, so we don't need the builtin
intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35269 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 20:29:26 +00:00
Bill Wendling
a348c56fde Support added for shifts and unpacking MMX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35266 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 18:42:45 +00:00
Bill Wendling
74027e98f1 Multiplication support for MMX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:24:36 +00:00
Bill Wendling
c1fb0473ed Adding more arithmetic operators to MMX. This is an almost exact copy of
the addition. Please let me know if you have suggestions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35055 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-10 09:57:05 +00:00
Bill Wendling
2f88dcdfb3 Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that
moves, loads, etc. are recognized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 22:09:11 +00:00
Bill Wendling
229baffc4e Add the emms intrinsic for MMX support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34938 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-05 23:09:45 +00:00
Reid Spencer
90668345a1 Convert the intrinsic function definitions to use llvm_i32_ty instead of
llvm_uint_ty or llvm_int_ty. Similarly for i8, i16 and i64


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32802 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-31 22:24:55 +00:00
Evan Cheng
a7fc64222a Added X86 SSE2 intrinsics which can be represented as vector_shuffles. This is
a temporary workaround for the 2-wide vector_shuffle problem (i.e. its mask
would have type v2i32 which is not legal).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27964 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 23:34:56 +00:00