Commit Graph

89615 Commits

Author SHA1 Message Date
Joel Jones
48e841d41c The ARM NEON vector compare instructions take three arguments. However, the
assembler should also accept a two arg form, as the docuemntation specifies that
the first (destination) register is optional.

This patch uses TwoOperandAliasConstraint to add the two argument form.

It also fixes an 80-column formatting problem in:
  test/MC/ARM/neon-bitwise-encoding

<rdar://problem/12909419> Clang rejects ARM NEON assembly instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175221 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 23:18:40 +00:00
Eli Bendersky
d6f19c7163 The operand listing is very much outdated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175220 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 23:17:03 +00:00
Akira Hatanaka
eba97c573f [mips] Simplify code in function Filler::findDelayInstr.
1. Define and use function terminateSearch.
2. Use MachineBasicBlock::iterator instead of MachineBasicBlock::instr_iterator.
3. Delete the line which checks whether an instruction is a pseudo. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175219 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 23:11:24 +00:00
Preston Gurd
e2e00dffdf Mark getRawBits const.
Patch by Tyler Nowicki.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175218 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 22:49:29 +00:00
Hal Finkel
97a241b173 BBVectorize: Remove the remaining instances of std::multimap
All instances of std::multimap have now been replaced by
DenseMap<K, std::vector<V> >, and this yields a speedup of 5% on the
csa.ll test case from PR15222.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175216 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 22:38:04 +00:00
Hal Finkel
6ca6d3b1ea BBVectorize: Don't store candidate pairs in a std::multimap
This is another commit on the road to removing std::multimap from
BBVectorize. This gives an ~1% speedup on the csa.ll test case
in PR15222.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 22:37:09 +00:00
Jakub Staszak
fe9b5a4f74 Simplify code. Remove "else after return".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175212 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 21:50:09 +00:00
Chad Rosier
27d844f4d0 Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175209 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 20:44:07 +00:00
Jyotsna Verma
84a2c2bbb5 Hexagon: Change insn class to support instruction encoding.
This patch doesn't introduce any functionality changes.
It adds some new fields to the Hexagon instruction classes and
changes their layout to support instruction encoding.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175205 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:57:17 +00:00
Bill Wendling
aefd14be39 s/bool/LLVMBool/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175204 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:40:27 +00:00
Bill Wendling
296756a2b5 s/bool/LLVMBool/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175203 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:39:14 +00:00
Kay Tiong Khoo
951d361c28 death to extra whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175200 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:15:14 +00:00
Bill Wendling
31cfc70705 Add two new functions to the C API:
LLVMCreateMemoryBufferWithMemoryRange - exposes MemoryBuffer::getMemBuffer
 LLVMCreateMemoryBufferWithMemoryRangeCopy - exposes MemoryBuffer::getMemBufferCopy

Patch by Moritz Maxeiner!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175199 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:11:28 +00:00
Kay Tiong Khoo
7b672ed380 added basic support for Intel ADX instructions
-feature flag, instructions definitions, test cases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175196 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:08:21 +00:00
Michel Danzer
01115b1f50 R600/SI: Fix int_SI_fs_interp_constant
The important fix is that the constant interpolation value is stored in the
parameter slot P0, which is encoded as 2.

In addition, drop the SI_INTERP_CONST pseudo instruction, pass the parameter
slot as an operand to V_INTERP_MOV_F32 instead of hardcoding it there, and
add a special operand class for the parameter slots for type checking and
pretty printing.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175193 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 19:03:25 +00:00
Dmitry Vyukov
06121de923 include/llvm/Object/ELF.h: do debug checks only when NDEBUG
validateSymbol() is called all over the place, and it seems it's a debug check.
It significantly speedups llvm-symbolizer used in tsan/asan/msan. validateSymbol() is the second hot function and accounts for 15% of runtime.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175192 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 18:41:42 +00:00
Nadav Rotem
6cc4b8d1eb Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175190 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 18:28:52 +00:00
Nadav Rotem
b39a552949 80-col
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175189 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 18:20:48 +00:00
Jyotsna Verma
5e3100afef Hexagon: Use multiclass for absolute addressing mode loads.
This patch doesn't introduce any functionality changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175187 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 18:15:29 +00:00
Weiming Zhao
7248451c43 Re-apply r175088 for bug fix 13622: Add paired register support for
inline asm with 64-bit data on ARM

Update test case to use -mtriple=arm-linux-gnueabi


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 18:10:21 +00:00
Jyotsna Verma
1912c7624a Fix for bug 15246 -- out-of-bound error in the TableGen backend, CodeGenMapTable.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175185 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 17:58:13 +00:00
Vincent Lejeune
7867885737 R600: Do not fold single instruction with more that 3 kcache read
It fixes around 100 tfb piglit tests and 16 glean tests.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175183 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:57:19 +00:00
Vincent Lejeune
f846add9ad R600: Export instructions are no longer terminator
This allows MachineInstScheduler to reorder them, and thus make scheduling more
efficient.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175182 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:55:11 +00:00
Vincent Lejeune
abfd5f6154 R600: Fold zero/one in export instructions
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175181 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:55:06 +00:00
Vincent Lejeune
df65b0fb51 R600: Do not fold modifier/litterals in vector inst
This fixes a couple of regressions on (probably not just) cayman

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175180 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:55:01 +00:00
Tim Northover
6872de99b3 Use correct host/target CMake variables to define lit variables.
CMake and autotools disagree on what "host" means in a cross-compilation
context. Autotools (and lit) take it to be the machine the binaries being
compiled now will run on. CMake takes it to be the machine actually compiling
the binaries now.

This change makes lit.site-cfg more consistent between autotools and CMake,
allowing lit tests (particularly in ExecutionEngine) to run correctly when
cross-compiled with CMake

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175179 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:49:32 +00:00
Tim Northover
ad1b9dcb2c AArch64: switch from neverHasSideEffects to hasSideEffects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175176 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:31:12 +00:00
Tim Northover
ff9d058f28 Add deprecation of neverHasSideEffects to documentation comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175175 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:31:06 +00:00
Rafael Espindola
e186d7191c Revert r15266. This fixes llvm.org/pr15266.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175173 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:23:08 +00:00
Tim Northover
5464c301c4 AArch64: stop claiming that NEON registers are usable for now.
If vector types have legal register classes, then LLVM bypasses LegalizeTypes
on them, which causes faults currently since the code to handle them isn't in
place.

This fixes test failures when AArch64 is the default target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175172 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:22:14 +00:00
Tim Northover
5bd6cb2dab AArch64: add block comments where missing
Only comments affected. No code change at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175169 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:17:01 +00:00
Krzysztof Parzyszek
51f6ba0998 Add testcase for llvm-dwarfdump to test parsing of the pubnames data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175168 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 16:10:58 +00:00
David Chisnall
579ad50f51 On FreeBSD, we need to look in /usr/local/include so that libxml2 finds iconv.h
Patch by Jonathan Anderson!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175167 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 15:40:44 +00:00
Kristof Beyls
b1d081230e Make ARMAsmParser accept the correct alignment specifier syntax in instructions.
The parser will now accept instructions with alignment specifiers written like
    vld1.8  {d16}, [r0:64]
, while also still accepting the incorrect syntax
    vld1.8  {d16}, [r0, :64]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175164 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 14:46:12 +00:00
Dmitry Vyukov
b181919d86 llvm-symbolizer: speedup symbol lookup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175158 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 13:06:18 +00:00
Evgeniy Stepanov
79e8429e41 Workaround an MSan false positive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175156 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 12:18:32 +00:00
Elena Demikhovsky
58842c4ba1 Moved line-info.ll to DebugInfo\X86 directory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175150 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 09:07:34 +00:00
Owen Anderson
39125d9a3a Add some legality checks for SETCC before introducing it in the DAG combiner post-operand legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175149 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 09:07:33 +00:00
Elena Demikhovsky
c8c82dc1cc The test failed on Windows. I've changed the platform to run to "x86_64-apple-darwin".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175146 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 08:23:08 +00:00
Elena Demikhovsky
60b3e18d67 Fixed a bug in X86TargetLowering::LowerVectorIntExtend() (assertion failure).
Added a test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175144 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 08:20:26 +00:00
Michel Danzer
c556fcc153 R600/SI: Check for empty stack in SIAnnotateControlFlow::isTopOfStack
Fixes assertion failure in newly added lit test. Might just be a bandaid that
needs to be revisited.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175139 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 08:00:33 +00:00
Michel Danzer
d4addbe78a R600: Add lit tests for texture sampling instruction selection.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175138 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 07:43:51 +00:00
Andrew Trick
05fdb82535 Reapply "s/grep/FileCheck/ in some tests"
This reverts commit fd1335e982.

Use a triple this time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175134 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 03:45:08 +00:00
Rafael Espindola
bf7ac42663 Revert r175120 and r175121. Clang is producing the expected asm names again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175133 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 03:33:34 +00:00
Cameron Zwarich
1f258a6d53 RegisterCoalescer::reMaterializeTrivialDef() can constrain the destination
register class to match the defining instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175130 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 03:25:24 +00:00
Francois Pichet
a94d32284a Add missing typename to unbreak the MSVC 2012 build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175129 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 03:24:14 +00:00
Nick Lewycky
9d90163bc3 Teach the DataLayout aware constant folder to be much more aggressive towards
'and' instructions. This is a pattern that shows up a lot in ubsan binaries.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175128 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 03:23:37 +00:00
Reed Kotler
38f85c5b9f Remove the form field from Mips16 instruction formats and set things
up so that we can apply the direct object emitter patch. This patch
should be a nop right now and it's test is to not break what is already
there.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175126 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 03:05:25 +00:00
Andrew Trick
fd1335e982 Revert "s/grep/FileCheck/ in some tests"
This reverts commit 8b75e6bc35.

The FileCheck tests are not equivalent:

test/CodeGen/X86/tailcall-structret.ll:6:10: error: expected string not found in input
; CHECK: jmp init
         ^
<stdin>:1:2: note: scanning from here
 .section __TEXT,__text,regular,pure_instructions
 ^
<stdin>:13:2: note: possible intended match here
 jmp _init ## TAILCALL
 ^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175124 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 03:00:57 +00:00
Cameron Zwarich
1d46732281 Fix RegisterCoalescer::rematerializeTrivialDef() so that it works on flipped
CoalescerPairs. Also, make it take a CoalescerPair directly like other methods
of RegisterCoalescer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 02:51:05 +00:00