Commit Graph

77165 Commits

Author SHA1 Message Date
Duncan P. N. Exon Smith
b5026b0b83 IR: Swap order of name and value in MDEnum
Put the name before the value in assembly for `MDEnum`.  While working
on the testcase upgrade script for the new hierarchy, I noticed that it
"looks nicer" to have the name first, since it lines the names up in the
(somewhat typical) case that they have a common prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229747 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 21:16:33 +00:00
Duncan P. N. Exon Smith
a9d82a512f IR: Add MDSubprogram::replaceFunction()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229742 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 20:32:57 +00:00
Duncan P. N. Exon Smith
87356edf74 IR: Drop the scope in DI template parameters
The scope/context is always the compile unit, which we replace with
`nullptr` anyway (via `getNonCompileUnitScope()`).  Drop it explicitly.

I noticed this field was always null while writing testcase upgrade
scripts to transition to the new hierarchy.  Seems wasteful to
transition it over if it's already out-of-use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229740 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 20:30:45 +00:00
Duncan P. N. Exon Smith
f866bfc6aa Fix -DNDEBUG -Werror build after r229733
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:56:50 +00:00
Reid Kleckner
ae09ebc540 dos2unix the WinEH file and tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229735 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:52:46 +00:00
Duncan P. N. Exon Smith
510ccd20a9 IR: isScopeRef() should check isScope()
r229733 removed an invalid use of `DIScopeRef`, so now we can enforce
that a `DIScopeRef` is actually a scope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229734 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:46:02 +00:00
Duncan P. N. Exon Smith
1cfad01081 IR: Avoid DIScopeRef in DIImportedEntity::getEntity()
`DIImportedEntity::getEntity()` currently returns a `DIScopeRef`, but
the nodes it references aren't always `DIScope`s.  In particular, it can
reference global variables.

Introduce `DIDescriptorRef` to avoid the lie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229733 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:39:36 +00:00
Sanjoy Das
6da5a456f4 Partial fix for bug 22589
Don't spend the entire iteration space in the scalar loop prologue if
computing the trip count overflows.  This change also gets rid of the
backedge check in the prologue loop and the extra check for
overflowing trip-count.

Differential Revision: http://reviews.llvm.org/D7715



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229731 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:32:25 +00:00
Justin Bogner
798787cea4 InstrProf: Don't combine expansion regions with code regions
This was leading to duplicate counts when a code region happened to
overlap exactly with an expansion. The combining behaviour only makes
sense for code regions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229723 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:01:06 +00:00
David Blaikie
59935868d3 Remove unused member variables (-Wunused-private-field)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229722 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 18:52:49 +00:00
Justin Bogner
e0eae15f6c InstrProf: Handle unknown functions if they consist only of zero-regions
This comes up when we generate coverage for a function but don't end
up emitting the function at all - dead static functions or inline
functions that aren't referenced in a particular TU, for example. In
these cases we'd like to show that the function was never called,
which is trivially true.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229717 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 18:40:46 +00:00
Andrew Kaylor
a4976167c4 Adding implementation to outline C++ catch handlers for native Windows 64 exception handling.
Differential Revision: http://reviews.llvm.org/D7363



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229715 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 18:31:51 +00:00
Justin Bogner
94da968134 InstrProf: Make CoverageMapping testable and add a basic unit test
Make CoverageMapping easier to create, so that we can write targeted
unit tests for its internals, and add a some infrastructure to write
these tests. Finally, add a simple unit test for basic functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229709 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 18:01:14 +00:00
Jozef Kolek
2032d755e7 [mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator
Differential Revision: http://reviews.llvm.org/D7609


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229706 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 17:33:56 +00:00
Jozef Kolek
efea7db0ab [mips][microMIPS] Implement JALX instruction
Differential Revision: http://reviews.llvm.org/D5047


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229702 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 17:15:48 +00:00
Daniel Sanders
7eedd07d5e [mips] Add backend support for Mips32r[35] and Mips64r[35].
Summary:
These ISA's didn't add any instructions so they are almost identical to
Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA
revision in .MIPS.abiflags is 3 or 5 respectively instead of 2.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: tomatabacu, llvm-commits, atanasyan

Differential Revision: http://reviews.llvm.org/D7381


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:24:50 +00:00
Kit Barton
31840a62af This patch adds the VSX logical instructions introduced in the Power ISA 2.07. It also removes the added complexity that favors VMX versions of the three instructions.
Phabricator review: http://reviews.llvm.org/D7616

Commiting on Nemanja's behalf.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229694 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:21:46 +00:00
Tom Stellard
d0da9ebb0a R600/SI: Don't set isCodeGenOnly = 1 on all instructions
We only need to set this on pseudo instructions which won't
be used by the assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229689 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:17 +00:00
Tom Stellard
d1971ae8ba R600/SI: Add missing VOP1 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229688 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:15 +00:00
Tom Stellard
16b731f19f R600/SI: Add missing VOP2 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229687 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:14 +00:00
Tom Stellard
585290a32a R600/SI: Add definition for S_CBRANCH_G_FORK
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229686 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:13 +00:00
Tom Stellard
fc0347ac9c R600/SI: Add missing SOP1 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229685 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:11 +00:00
Tom Stellard
2ad48511fd R600/SI: Refactor SOP2 definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229684 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:09 +00:00
Vasileios Kalintiris
0563ea452c [mips] Avoid redundant sign extension of the result of binary bitwise instructions.
Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7581

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229675 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 14:57:05 +00:00
Benjamin Kramer
e8a0a78bad X86: Use bitset to manage a bag of bits. NFC.
Doesn't matter in terms of memory usage or perf here, but it's a neat
simplification.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229672 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 14:10:44 +00:00
Toma Tabacu
227affe405 [mips] [IAS] Fix using .cpsetup with local labels (PR22518).
Summary:
Parse for an MCExpr instead of an Identifier and use the symbol for relocations, not just the symbol's name.

This fixes errors when using local labels in .cpsetup (PR22518).

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D7697

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229671 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 13:46:53 +00:00
Chandler Carruth
a5cc501201 [x86] Tighten the assertions to document that canonicalization has
actually removed all but a *very* small number of choices for v2i64.
Also remove dead code handling cases that simply cannot arise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229670 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 11:46:29 +00:00
Chandler Carruth
406928ebba [x86] Switch an if which is trivially true to an assert. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229669 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 11:46:27 +00:00
Chandler Carruth
72cacedbb7 [x86] Remove some more 'bit' nomenclature from the generic shift
lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229668 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 11:46:23 +00:00
Mohit K. Bhakkad
34a3da893c [MSan][MIPS] VarArgHelper for MIPS64
Reviewers: Reviewers: eugenis, kcc, samsonov, petarj

Subscribers: dsanders, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D7182

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229667 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 11:41:24 +00:00
Chandler Carruth
3378af8802 [x86] Fold together the two shift lowering strategies. They were doing
quite literally the same work, we just need to special case the >64-bit
element shift code emission to emit the byte shift instructions and
offsets. This also makes reasoning about each of the vector lowering
strategies easier as we don't have to remember to use both forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229662 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 10:40:38 +00:00
Bradley Smith
4fe6d075d5 [ARM] Add missing M/R class CPUs
Add some of the missing M and R class Cortex CPUs, namely:

Cortex-M0+ (called Cortex-M0plus for GCC compatibility)
Cortex-M1
SC000
SC300
Cortex-R5


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229660 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 10:33:30 +00:00
Michael Kuperstein
9571ea6620 Fixes two issue in SimplifyDemandedBits of sext_in_reg:
1) We should not try to simplify if the sext has multiple uses
2) There is no need to simplify is the source value is already sign-extended.

Patch by Gil Rapaport <gil.rapaport@intel.com>

Differential Revision: http://reviews.llvm.org/D6949

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229659 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 09:43:40 +00:00
Ulrich Weigand
030d82b502 [SystemZ] Clean up warning
Removed (unreachable) default case in switch to clean up warning:

lib/Target/SystemZ/SystemZISelLowering.cpp:1974:5:
error: default label in switch which covers all enumeration values
[-Werror,-Wcovered-switch-default]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229658 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 09:42:23 +00:00
Chandler Carruth
4e8a4638e9 [x86] Refactor the bit shift code the same as I just did the byte shift
code.

While this didn't have the miscompile (it used MatchLeft consistently)
it missed some cases where it could use right shifts. I've added a test
case Craig Topper came up with to exercise the right shift matching.

This code is really identical between the two. I'm going to merge them
next so that we don't keep two copies of all of this logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229655 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 09:19:58 +00:00
Ulrich Weigand
bebd59c74b [SystemZ] Support all TLS access models - CodeGen part
The current SystemZ back-end only supports the local-exec TLS access model.
This patch adds all required CodeGen support for the other TLS models, which
means in particular:

- Expand initial-exec TLS accesses by loading TLS offsets from the GOT
  using @indntpoff relocations.

- Expand general-dynamic and local-dynamic accesses by generating the
  appropriate calls to __tls_get_offset.  Note that this routine has
  a non-standard ABI and requires loading the GOT pointer into %r12,
  so the patch also adds support for the GLOBAL_OFFSET_TABLE ISD node.

- Add a new platform-specific optimization pass to remove redundant
  __tls_get_offset calls in the local-dynamic model (modeled after
  the corresponding X86 pass).

- Add test cases verifying all access models and optimizations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229654 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 09:13:27 +00:00
Ulrich Weigand
ca1a3cf45b [SystemZ] Support all TLS access models - MC part
The current SystemZ back-end only supports the local-exec TLS access model.
This patch adds all required MC support for the other TLS models, which
means in particular:

- Support additional relocation types for
  Initial-exec model: R_390_TLS_IEENT
  Local-dynamic-model: R_390_TLS_LDO32, R_390_TLS_LDO64,
                       R_390_TLS_LDM32, R_390_TLS_LDM64, R_390_TLS_LDCALL
  General-dynamic model: R_390_TLS_GD32, R_390_TLS_GD64, R_390_TLS_GDCALL

- Support assembler syntax to generate additional relocations
  for use with __tls_get_offset calls:
    :tls_gdcall:
    :tls_ldcall:

The patch also adds a new test to verify fixups and relocations,
and removes the (already unused) FK_390_PLT16DBL/FK_390_PLT32DBL
fixup kinds.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229652 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 09:11:36 +00:00
NAKAMURA Takumi
582e77af02 Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229651 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 08:36:14 +00:00
NAKAMURA Takumi
383d8c7fdd Revert r229622: "[LoopAccesses] Make VectorizerParams global" and others. r229622 brought cyclic dependencies between Analysis and Vector.
r229622: "[LoopAccesses] Make VectorizerParams global"
  r229623: "[LoopAccesses] Stash the report from the analysis rather than emitting it"
  r229624: "[LoopAccesses] Cache the result of canVectorizeMemory"
  r229626: "[LoopAccesses] Create the analysis pass"
  r229628: "[LoopAccesses] Change debug messages from LV to LAA"
  r229630: "[LoopAccesses] Add canAnalyzeLoop"
  r229631: "[LoopAccesses] Add missing const to APIs in VectorizationReport"
  r229632: "[LoopAccesses] Split out LoopAccessReport from VectorizerReport"
  r229633: "[LoopAccesses] Add -analyze support"
  r229634: "[LoopAccesses] Change LAA:getInfo to return a constant reference"
  r229638: "Analysis: fix buildbots"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229650 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 08:34:47 +00:00
Daniel Jasper
87010b0917 NFC: Use range-based for loops and more consistent naming.
No functional changes intended.

(I plan on doing some modifications to this function and would like to
have as few unrelated changes as possible in the patch)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229649 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 08:19:16 +00:00
Daniel Jasper
66bd6852bb Remove experimental options to control machine block placement.
This reverts r226034. Benchmarking with those flags has not revealed
anything interesting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229648 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 08:18:07 +00:00
Sanjoy Das
b2c7cf6d16 Address post commit review on r229600.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229646 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 08:03:22 +00:00
Elena Demikhovsky
87483ed180 AVX-512: Added support for FP instructions with embedded rounding mode.
By Asaf Badouh <asaf.badouh@intel.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229645 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 07:59:20 +00:00
Chandler Carruth
c9520b48ae [x86] Rewrite the byte shift detection to not use boolean variables to
track state.

I didn't like this in the code review because the pattern tends to be
error prone, but I didn't see a clear way to rewrite it. Turns out that
there were bugs here, I found them when fuzz testing our shuffle
lowering for correctness on x86.

The core of the problem is that we need to consistently test all our
preconditions for the same directionality of shift and the same input
vector. Instead, formulate this as two predicates (one doesn't depend on
the input in any way), pass things like the directionality and input
vector as inputs, and loop over the alternatives.

This fixes a pattern of very rare miscompiles coming out of this code.
Turned up roughly 4 out of every 1 million v8 shuffles in my fuzz
testing. The new code is over half a million test runs with no failures
yet. I've also fuzzed every other function in the lowering code with
over 3.5 million test cases and not discovered any other miscompiles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229642 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 07:13:48 +00:00
Craig Topper
f781855732 [X86] Remove AVX512 pslldq/psrldq shift intrinsics. They aren't implemented yet and when they are they should be done with shuffles like SSE2 and AVX2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229641 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 06:24:49 +00:00
Craig Topper
ed42dcef75 [X86] Remove AVX2 and SSE2 pslldq and psrldq intrinsics. We can represent them in IR with vector shuffles now. All their uses have been removed from clang in favor of shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229640 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 06:24:44 +00:00
Saleem Abdulrasool
74539a4a13 Analysis: fix buildbots
This should fix the compilation failure on the MSVC buildbots which find a
std::make_unique and llvm::make_unique via ADL, resulting in ambiguity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229638 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 05:09:50 +00:00
Adam Nemet
5934863461 [LoopAccesses] Change LAA:getInfo to return a constant reference
As expected, this required a few more const-correctness fixes.

Based on Hal's feedback on D7684.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229634 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:44:33 +00:00
Adam Nemet
f367b60abe [LoopAccesses] Add -analyze support
The LoopInfo in combination with depth_first is used to enumerate the
loops.

Right now -analyze is not yet complete.  It only prints the result of
the analysis, the report and the run-time checks.  Printing the unsafe
depedences will require a bit more reshuffling which I'd like to do in a
follow-on to this patchset.  Unsafe dependences are currently checked
via -debug-only=loop-accesses in the new test.

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229633 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:44:30 +00:00
Adam Nemet
c548c640bc [LoopAccesses] Split out LoopAccessReport from VectorizerReport
The only difference between these two is that VectorizerReport adds a
vectorizer-specific prefix to its messages.  When LAA is used in the
vectorizer context the prefix is added when we promote the
LoopAccessReport into a VectorizerReport via one of the constructors.

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229632 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:44:25 +00:00
Adam Nemet
69c9697fa7 [LoopAccesses] Add missing const to APIs in VectorizationReport
When I split out LoopAccessReport from this, I need to create some temps
so constness becomes necessary.

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229631 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:44:20 +00:00
Adam Nemet
4166c7ff59 [LoopAccesses] Add canAnalyzeLoop
This allows the analysis to be attempted with any loop.  This feature
will be used with -analysis.  (LV only requests the analysis on loops
that have already satisfied these tests.)

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229630 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:44:08 +00:00
Adam Nemet
0cbfb71d7b [LoopAccesses] Factor out RuntimePointerCheck::needsChecking
Will be used by the new RuntimePointerCheck::print.

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229629 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:43:58 +00:00
Adam Nemet
ce5c5c0301 [LoopAccesses] Change debug messages from LV to LAA
Also add pass name as an argument to VectorizationReport::emitAnalysis.

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229628 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:43:37 +00:00
Adam Nemet
718b023033 [LoopAccesses] Create the analysis pass
This is a function pass that runs the analysis on demand.  The analysis
can be initiated by querying the loop access info via LAA::getInfo.  It
either returns the cached info or runs the analysis.

Symbolic stride information continues to reside outside of this analysis
pass. We may move it inside later but it's not a priority for me right
now.  The idea is that Loop Distribution won't support run-time stride
checking at least initially.

This means that when querying the analysis, symbolic stride information
can be provided optionally.  Whether stride information is used can
invalidate the cache entry and rerun the analysis.  Note that if the
loop does not have any symbolic stride, the entry should be preserved
across Loop Distribution and LV.

Since currently the only user of the pass is LV, I just check that the
symbolic stride information didn't change when using a cached result.

On the LV side, LoopVectorizationLegality requests the info object
corresponding to the loop from the analysis pass.  A large chunk of the
diff is due to LAI becoming a pointer from a reference.

A test will be added as part of the -analyze patch.

Also tested that with AVX, we generate identical assembly output for the
testsuite (including the external testsuite) before and after.

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229626 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:43:24 +00:00
Adam Nemet
0d1e8dd84e [LoopAccesses] Make blockNeedsPredication static
blockNeedsPredication is in LoopAccess in order to share it with the
vectorizer.  It's a utility needed by LoopAccess not strictly provided
by it but it's a good place to share it.  This makes the function static
so that it no longer required to create an LoopAccessInfo instance in
order to access it from LV.

This was actually causing problems because it would have required
creating LAI much earlier that LV::canVectorizeMemory().

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229625 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:43:19 +00:00
Adam Nemet
14cc2e25c5 [LoopAccesses] Cache the result of canVectorizeMemory
LAA will be an on-demand analysis pass, so we need to cache the result
of the analysis.  canVectorizeMemory is renamed to analyzeLoop which
computes the result.  canVectorizeMemory becomes the query function for
the cached result.

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229624 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:42:57 +00:00
Adam Nemet
8b0647f26b [LoopAccesses] Stash the report from the analysis rather than emitting it
The transformation passes will query this and then emit them as part of
their own report.  The currently only user LV is modified to do just
that.

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229623 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:42:50 +00:00
Adam Nemet
eefec589e8 [LoopAccesses] Make VectorizerParams global
As LAA is becoming a pass, we can no longer pass the params to its
constructor.  This changes the command line flags to have external
storage.  These can now be accessed both from LV and LAA.

VectorizerParams is moved out of LoopAccessInfo in order to shorten the
code to access it.

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229622 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:42:43 +00:00
Adam Nemet
38a9ebb065 [LoopAccesses] Rename LoopAccessAnalysis to LoopAccessInfo
LoopAccessAnalysis will be used as the name of the pass.

This is part of the patchset that converts LoopAccessAnalysis into an
actual analysis pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229621 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:42:35 +00:00
Akira Hatanaka
5506e22865 [InstCombine] Do not insert a GEP instruction before a landingpad instruction.
InstCombiner::visitGetElementPtrInst was using getFirstNonPHI to compute the
insertion point, which caused the verifier to complain when a GEP was inserted
before a landingpad instruction. This commit fixes it to use getFirstInsertionPt
instead.

rdar://problem/19394964


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229619 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:30:11 +00:00
Hal Finkel
8a85dee989 [BDCE] Don't forget uses of root instructions seen before the instruction itself
When visiting the initial list of "root" instructions (those which must always
be alive), for those that are integer-valued (such as invokes returning an
integer), we mark their bits as (initially) all dead (we might, obviously, find
uses of those bits later, but all bits are assumed dead until proven
otherwise). Don't do so, however, if we're already seen a use of those bits by
another root instruction (such as a store).

Fixes a miscompile of the sanitizer unit tests on x86_64.

Also, add a debug line for visiting the root instructions, and remove a debug
line which tried to print instructions being removed (printing dead
instructions is dangerous, and can sometimes crash).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229618 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 03:12:28 +00:00
Matt Arsenault
333507b7af R600/SI: Rename dst encoding field to be consistent with docs
The docs call this vdst instead of just dst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229614 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:15:37 +00:00
Matt Arsenault
4fd9c8677c R600/SI: Consistently capitalize encoding field names
Some formats capitalized these, but most didn't. Change
them all to be consistently lowercase.

Now, non-encoding fields and convenience bits are capitalized.
Also remove weird looking empty line in some of the formats.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229613 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:15:35 +00:00
Matt Arsenault
85d96c94d6 R600/SI: Set noNamedPositionallyEncodedOperands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229612 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:15:32 +00:00
Matt Arsenault
abf19e5c1b R600/SI: Fix src1_modifiers for class instructions
src1 doesn't have modifiers, but the operand was missing
resulting in an encoding build error when all fields
are required.'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229611 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:15:30 +00:00
Matt Arsenault
5177e9551c R600/SI: Fix not setting clamp / omod for v_cndmask_b32_e64
Rename the multiclass since it now applies to the output
modifiers as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229610 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:15:27 +00:00
Matt Arsenault
b1beec140e R600: Fix operand encoding error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229609 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:10:42 +00:00
Matt Arsenault
76f78b9ac2 R600/SI: Fix encoding error from glc bit on VI SMRD instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229608 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:10:40 +00:00
Matt Arsenault
9e39c99180 R600/SI: Fix operand encoding for flat instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229607 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:10:37 +00:00
Matt Arsenault
642c65e2df R600/SI: Fix error from vdst on no return atomics
Set the ignored field to 0 so we can enable
noNamedPositionallyEncodedOperands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229606 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:10:35 +00:00
Matt Arsenault
2422768a8a R600/SI: Add missing offset operand to buffer bothen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229605 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:04:38 +00:00
Matt Arsenault
fe524d5902 R600/SI: Add missing soffset operand to global atomics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229604 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:04:35 +00:00
Matt Arsenault
a0abb2055a R600/SI: Fix brace identation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229603 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 02:04:31 +00:00
Justin Bogner
09e5af7d61 Re-apply "InstrProf: Add unit tests for the profile reader and writer"
Have the InstrProfWriter return a MemoryBuffer instead of a
std::string. This fixes the alignment issues the reader would hit, and
it's a more appropriate type for this anyway.

I've also removed an ugly helper function that's not needed since
we're allowing initializer lists now, and updated some error code
checks based on MSVC's issues with r229473.

This reverts r229483, reapplying r229478.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229602 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 01:58:17 +00:00
Matthias Braun
62be98d510 LiveRangeCalc: Rename some parameters from kill to use, NFC.
Those parameters did not necessarily describe kill points but just uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229601 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 01:50:52 +00:00
Sanjoy Das
00af5b5d50 Generalize getExtendAddRecStart to work with both sign and zero
extensions.

This change also removes `DEBUG(dbgs() << "SCEV: untested prestart
overflow check\n");` because that case has a unit test now.

Differential Revision: http://reviews.llvm.org/D7645



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229600 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 01:47:07 +00:00
Eric Christopher
3a7a58d6e0 Make the Mips AsmPrinter independent of global subtarget
initialization. Initialize the subtarget once per function and
migrate EmitStartOfAsmFile to either use calls on the
TargetMachine or get information from the subtarget we'd use
for assembling.

The top-level-ness of the MIPS attribute output for assembly is,
by nature, contrary to how we'd want to do this for an LTO
situation where we have multiple cpu architectures so this
solution is good enough for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229596 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 01:01:57 +00:00
Eric Christopher
68499a2f20 Unify selectMipsCPU implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 00:55:06 +00:00
Sanjoy Das
0afc9b33fe Bugfix: SCEV incorrectly marks certain expressions as nsw
I could not come up with a test case for this one; but I don't think
`getPreStartForSignExtend` can assume `AR` is `nsw` -- there is one
place in scalar evolution that calls `getSignExtendAddRecStart(AR,
...)` without proving that `AR` is `nsw`

(line 1564)

   OperandExtendedAdd =
     getAddExpr(WideStart,
                getMulExpr(WideMaxBECount,
                           getZeroExtendExpr(Step, WideTy)));
   if (SAdd == OperandExtendedAdd) {
     // If AR wraps around then
     //
     //    abs(Step) * MaxBECount > unsigned-max(AR->getType())
     // => SAdd != OperandExtendedAdd
     //
     // Thus (AR is not NW => SAdd != OperandExtendedAdd) <=>
     // (SAdd == OperandExtendedAdd => AR is NW)

     const_cast<SCEVAddRecExpr *>(AR)->setNoWrapFlags(SCEV::FlagNW);

     // Return the expression with the addrec on the outside.
     return getAddRecExpr(getSignExtendAddRecStart(AR, Ty, this),
                          getZeroExtendExpr(Step, Ty),
                          L, AR->getNoWrapFlags());
   }

Differential Revision: http://reviews.llvm.org/D7640



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229594 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 00:43:19 +00:00
Rafael Espindola
a12aeb0ac6 Twines should be passed by const ref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229590 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 23:44:22 +00:00
Andrea Di Biagio
b3ff6a88b6 [X86][FastIsel] Teach how to select scalar integer to float/double conversions.
This patch teaches fast-isel how to select a (V)CVTSI2SSrr for an integer to 
float conversion, and how to select a (V)CVTSI2SDrr for an integer to double
conversion.

Added test 'fast-isel-int-float-conversion.ll'.

Differential Revision: http://reviews.llvm.org/D7698


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229589 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 23:40:58 +00:00
Rafael Espindola
3b75cfe179 Add r228939 back with a fix.
The problem in the original patch was not switching back to .text after printing
an eh table.

Original message:

On ELF, put PIC jump tables in a non executable section.

Fixes PR22558.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229586 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 23:34:51 +00:00
Sanjay Patel
4bf44517c8 rename variables again because these tables also deal with stores; NFC
Suggestion by Simon Pilgrim


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229574 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 22:38:06 +00:00
Duncan P. N. Exon Smith
54d7f09b71 IR: fieldIsMDNode() should be false for MDString
Simplify the code.  It has been a while since the schema has been so
"flexible".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229573 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 22:34:15 +00:00
Duncan P. N. Exon Smith
4c9121d5d9 AsmPrinter: Take range in DwarfExpression::AddExpression(), NFC
Previously `DwarfExpression::AddExpression()` relied on
default-constructing the end iterators for `DIExpression` -- once the
operands are represented explicitly via `MDExpression` (instead of via
the strange `StringRef` navigator in `DIHeaderIterator`) this won't
work.  Explicitly take an iterator for the end of the range.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229572 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 22:30:56 +00:00
Simon Pilgrim
cbc2ca5ec9 [X86][SSE] Generalised unpckl/unpckh shuffle matching
Added commuted unpckl/unpckh shuffle matching patterns as many cases containing undefined lanes fail to commute by themselves.

Differential Revision: http://reviews.llvm.org/D7564

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229571 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 22:24:32 +00:00
Sanjay Patel
0be02ef5b1 Add comment to explain a non-obvious setting; NFC.
This is paraphrased from Simon Pilgrim's comment in:
http://reviews.llvm.org/D7492



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229566 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 22:09:54 +00:00
Sanjay Patel
c3a976c935 remove function names from comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229558 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 21:55:20 +00:00
Sanjay Patel
a3a63972c5 replace meaningless variable names; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229549 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 21:37:28 +00:00
Rafael Espindola
e0a2541eb7 Add r228980 back.
Add support for having multiple sections with the same name and comdat.

Using this in combination with -ffunction-sections allows LLVM to output a .o
file with mulitple sections named .text. This saves space by avoiding long
unique names of the form .text.<C++ mangled name>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229541 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 20:48:01 +00:00
Rafael Espindola
84f0507260 Add r228889 back.
Original message:
Invert the section relocation map.

It now points from rel section to section. Use it to set sh_info, avoiding
a brittle name lookup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 20:40:59 +00:00
Rafael Espindola
8fd9fc3297 Add r228888 back.
Original message:

Use the existing SymbolTableIndex instead of doing a lookup. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229538 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 20:37:50 +00:00
Rafael Espindola
07102899ac Add r228886 back now that r229530 fixed the issue lldb was hitting.
Original message:

Create the Seciton -> Rel Section map when it is first needed. NFC.

Saves a walk over every section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229536 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 20:31:13 +00:00
Tom Stellard
ec5b9ab433 R600/SI: Fix asam errors in SIFoldOperands
We were trying to fold into implicit uses, which led to out of bounds
access of the MCInstrDesc::OpInfo arrray.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229533 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 20:11:54 +00:00
Sanjay Patel
544843cee1 prevent folding a scalar FP load into a packed logical FP instruction (PR22371)
Change the memory operands in sse12_fp_packed_scalar_logical_alias from scalars to vectors. 
That's what the hardware packed logical FP instructions define: 128-bit memory operands.
There are no scalar versions of these instructions...because this is x86.

Generating the wrong code (folding a scalar load into a 128-bit load) is still possible
using the peephole optimization pass and the load folding tables. We won't completely
solve this bug until we either fix the lowering in fabs/fneg/fcopysign and any other
places where scalar FP logic is created or fix the load folding in foldMemoryOperandImpl()
to make sure it isn't changing the size of the load.

Differential Revision: http://reviews.llvm.org/D7474


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229531 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 20:08:21 +00:00
Rafael Espindola
38c028b361 Don't deference the section_end() iterator.
Hard to test given the undefined behavior nature.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229530 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 20:07:28 +00:00
Eric Christopher
24dded2342 Make the ARM AsmPrinter independent of global subtarget
initialization. Initialize the subtarget once per function and
migrate Emit{Start|End}OfAsmFile to either use attributes on the
TargetMachine or get information from the subtarget we'd use
for assembling. One bit (getISAEncoding) touched the general
AsmPrinter and the debug output. Handle this one by passing
the function for the subprogram down and updating all callers
and users.

The top-level-ness of the ARM attribute output for assembly is,
by nature, contrary to how we'd want to do this for an LTO
situation where we have multiple cpu architectures so this
solution is good enough for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229528 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 20:02:32 +00:00
Eric Christopher
cd3a8ad3e7 80-column fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229527 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 20:02:28 +00:00
Adrian Prantl
07d4ebdc92 DIBuilder: add trackIfUnresolved() to all nodes that may be cyclic.
Tested in clang/test/CodeGenObjCCXX/debug-info-cyclic.mm

rdar://problem/19839612

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229521 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-17 19:17:39 +00:00