Commit Graph

91623 Commits

Author SHA1 Message Date
Rafael Espindola
143d223447 refactor the struct byte swapping to a helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179851 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 13:45:05 +00:00
Rafael Espindola
baecbb82d8 Only run the tests in test/Object/ARM if we have ARM support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179850 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 12:47:53 +00:00
Benjamin Kramer
e94e4ca5fd Attributes: Don't print trailing whitespace on the function attribute comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179849 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 11:43:21 +00:00
Rafael Espindola
db5f927020 Don't read one command past the end.
Thanks to Evgeniy Stepanov for reporting this.

It might be a good idea to add a command iterator abstraction to MachO.h, but
this fixes the bug for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179848 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 11:36:47 +00:00
Tim Northover
4521019c6f ARM: permit "sp" in ARM variants of MOVW/MOVT instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179847 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 09:58:09 +00:00
Jakub Staszak
a7e3701658 Revert 179826. Tests were worthless.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179845 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 09:32:30 +00:00
Eric Christopher
41201ed06f Revert "PR14606: debug info imported_module support"
This reverts commit r179836 as it seems to have caused test failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179840 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 07:47:16 +00:00
David Blaikie
bcb81360a2 PR14606: debug info imported_module support
Adding another CU-wide list, in this case of imported_modules (since they
should be relatively rare, it seemed better to add a list where each element
had a "context" value, rather than add a (usually empty) list to every scope).
This takes care of DW_TAG_imported_module, but to fully address PR14606 we'll
need to expand this to cover DW_TAG_imported_declaration too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179836 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 06:57:04 +00:00
Lang Hames
64362272b6 Add support for index resources (for a SlotIndex) to be relinquished.
When the SlotIndexes pass was introduced it was intended to support insertion
of code during register allocation. Removal of code was a minor consideration
(and raised the question of what to do about dangling SlotIndex objects pointing
to the erased index), so I opted to keep all indexes around indefinitely and
simply null out those that weren't being used.

Nowadays people are moving more code around (e.g. via HandleMove), which means
more zombie indexes. I want to start killing off indexes when we're done with
them to reclaim the resources they use up.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179834 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 04:31:49 +00:00
Michael Liao
0ee17006b1 Use 'array_lengthof' as possible to avoid magic numbers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179833 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 04:03:37 +00:00
Tom Stellard
48b809e6e5 R600: Add pattern for the BFI_INT instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179830 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 02:11:06 +00:00
Tom Stellard
ae2a8929d8 R600/SI: Use InstFlag for VOP3 modifier operands
InstFlag has a default value of 0 and will simplify the VOP3 patterns.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179829 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 02:11:00 +00:00
Tom Stellard
3abd23bac5 R600: Reorganize lit tests and document how they should be organized
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179828 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 02:10:53 +00:00
Jakub Staszak
9affd16361 Keep coding stanard. Don't use "else if" after "return".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179826 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 01:18:04 +00:00
Jakub Staszak
943baedefd Don't run expensive -O2 and -O3 in tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179825 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 01:10:45 +00:00
Eli Bendersky
5bd0767a04 Add some more stats for fast isel vs. SelectionDAG, w.r.t lowering function
arguments in entry BBs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179824 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 01:04:40 +00:00
Bill Wendling
89ec1c5c9c Use an enum instead of magic constants to improve readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179820 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19 00:05:59 +00:00
Bill Wendling
74d892433d Implement a better fix for PR15185.
If the return type is a pointer and the call returns an integer, then do the
inttoptr convertions. And vice versa.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179817 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 23:34:17 +00:00
Bill Wendling
fa2b25c573 Relax this assert. It may not hold in all cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179814 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 23:16:46 +00:00
Chad Rosier
3f1f9c3798 [ms-inline asm] Apply the condition code mnemonic aliases to both the Intel and
AT&T dialect.  Test case for r179804 as well.
rdar://13674398 and PR13340.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179813 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 23:16:12 +00:00
Bill Wendling
18014d4e4c Assert if we're trying to generate a null compact unwind entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179809 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 22:56:05 +00:00
Bill Wendling
2828608e8e Set the compact unwind encoding to 'requires EH DWARF' if we cannot generate a CU encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179808 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 22:55:29 +00:00
Hal Finkel
4029c3feed Disable PPC comparison optimization by default
This seems to cause a stage-2 LLVM compile failure (by crashing TableGen); do
I'm disabling this for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179807 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 22:54:25 +00:00
Chad Rosier
88eb89b89f [asm parser] Add support for predicating MnemonicAlias based on the assembler
variant/dialect.  Addresses a FIXME in the emitMnemonicAliases function.
Use and test case to come shortly.
rdar://13688439 and part of PR13340.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179804 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 22:35:36 +00:00
Hal Finkel
860c08cad5 Implement optimizeCompareInstr for PPC
Many PPC instructions have a so-called 'record form' which stores to a specific
condition register the result of comparing the result of the instruction with
zero (always as a signed comparison). For integer operations on PPC64, this is
always a 64-bit comparison.

This implementation is derived from the implementation in the ARM backend;
there are some differences because PPC condition registers are allocatable
virtual registers (although the record forms always use a specific one), and we
look for a matching subtraction instruction after the compare (but before the
first use) in addition to before it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179802 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 22:15:08 +00:00
Bill Wendling
a88a016f2d Make the TargetIndependent flag have the right boolean value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179798 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 21:45:04 +00:00
Benjamin Kramer
fcba22decb X86: Add an SSE2 lowering for 64 bit compares when pcmpgtq (SSE4.2) isn't available.
This pattern started popping up in vectorized min/max reductions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179797 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 21:37:45 +00:00
Eli Bendersky
8bb3b098b9 Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179793 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 20:49:17 +00:00
Bill Wendling
8a6a7bb6a6 Cleanup patch:
Semantics of parameters named Index and Idx were inconsistent between
"include/llvm/IR/Attributes.h", "lib/IR/AttributeImpl.h" and
"lib/IR/Attributes.cpp": sometimes these were fixed 1-based indexes of IR
parameters (or AttributeSet::ReturnIndex for IR return values or
AttributeSet::FunctionIndex for IR functions), other times they were the
internal slot for storage in the underlying AttributeSetImpl. I renamed usage of
the former to "Index" and usage of the latter to "Slot" ("Slot" was already
being used consistently for the latter in a subset of cases)

Patch by Stephen Lin!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179791 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 20:17:28 +00:00
Bill Wendling
bb1b63c483 This patch addresses two cleanup issues:
1. Verify::VerifyParameterAttrs in "lib/IR/Verifier.cpp" and
   AttrBuilder::removeFunctionOnlyAttrs in "lib/IR/Attributes.cpp" (only called
   by Verify::VerifyFunctionAttrs) separately maintained a list of function-only
   attribute types. I've consolidated the logic into a new function used for
   both cases in "lib/IR/Verifier.cpp", so this logic is in one place (other
   than the AsmParser front-end)

2. Various functions in "lib/IR/Verifier.cpp" passed AttributeSet around by
   reference needlessly, as it's just a handle to an immutable pimpl body.

Patch by Stephen Lin!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179790 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 20:15:25 +00:00
Dmitri Gribenko
4b15d6ae49 Fix a -Wdocumentation warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179789 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 20:13:04 +00:00
Anat Shemer
86dc3f3739 In the function InstCombiner::visitExtractElementInst() removed the limitation that extract is promoted over a cast only if the cast has only one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179786 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 19:56:44 +00:00
Tom Stellard
4bfeee1302 C API: Fix coding style
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179785 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 19:50:53 +00:00
Anat Shemer
77e95d04c4 Added a function scalarizePHI() that sclarizes a vector phi instruction if it has only 2 uses: one to promote the vector phi in a loop and the other use is an extract operation of one element at a constant location.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179783 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 19:35:39 +00:00
Bill Wendling
c0b4b6724c Fix comment. Patch by Stephen Lin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179780 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 18:30:16 +00:00
Rafael Espindola
fd7aa38e30 At Jim Grosbach's request detemplate Object/MachO.h.
We are still able to handle mixed endian objects by swapping one struct at a
time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179778 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 18:08:55 +00:00
Chris Lattner
77327fd652 Fix a comment, PR15777.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179775 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 17:42:14 +00:00
Derek Schuff
2061dcf0e4 Allow misaligned stores in x86 fast-isel.
In X86FastISel::X86SelectStore(), improperly aligned stores are rejected and
handled by the DAG-based ISel.  However, X86FastISel::X86SelectLoad() makes
no such requirement.  There doesn't appear to be an x86 architectural
correctness issue with allowing potentially unaligned store instructions.
This patch removes this restriction.

Patch by Jim Stichnot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179774 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 17:41:08 +00:00
Arnold Schwaighofer
a3fb330d05 LoopVectorizer: Recognize min/max reductions
A min/max operation is represented by a select(cmp(lt/le/gt/ge, X, Y), X, Y)
sequence in LLVM. If we see such a sequence we can treat it just as any other
commutative binary instruction and reduce it.

This appears to help bzip2 by about 1.5% on an imac12,2.

radar://12960601

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179773 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 17:22:34 +00:00
Eli Bendersky
bff177676c Fix grammar in LLVMBuild.rst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179768 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 16:39:32 +00:00
Chad Rosier
c3a9574eed [ms-inline asm] Simplify some logic and add a FIXME for unhandled unary minus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179765 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 16:28:19 +00:00
Chad Rosier
6c8afad198 Make this private method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179764 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 16:13:18 +00:00
Eli Bendersky
f841609c4a Fixes to LangRef.rst: incorrect attributes syntax and misplaced 'nobuiltin'
Patch by Stephen Lin


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179763 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 16:11:44 +00:00
Chad Rosier
05862c9788 Fix comment spacing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179761 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 15:19:45 +00:00
Benjamin Kramer
403fc14370 LoopVectorize: Use a set to avoid longer cycles in the reduction chain too.
Fixes PR15748.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179757 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 14:29:13 +00:00
Hao Liu
d050e96133 Fix for PR14824, An ARM Load/Store Optimization bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179751 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 09:11:08 +00:00
David Majnemer
7754276c4c Revert "Combine bit test + conditional or into simple math"
It is causing stage2 builds to fail, let's get them running again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179750 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 08:42:33 +00:00
David Majnemer
a40a3a5981 Combine bit test + conditional or into simple math
Simplify:
(select (icmp eq (and X, C1), 0), Y, (or Y, C2))

Into:
(or (shl (and X, C1), C3), y)

Where:
C3 = Log(C2) - Log(C1)

If:
C1 and C2 are both powers of two


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179748 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 07:30:07 +00:00
Michael Gottesman
0556900b26 [objc-arc] Do not mismatch up retains inside a for loop with releases outside said for loop in the presense of differing provenance caused by escaping blocks.
This occurs due to an alloca representing a separate ownership from the
original pointer. Thus consider the following pseudo-IR:

  objc_retain(%a)
  for (...) {
    objc_retain(%a)
    %block <- %a
    F(%block)
    objc_release(%block)
  }
  objc_release(%a)

From the perspective of the optimizer, the %block is a separate
provenance from the original %a. Thus the optimizer pairs up the inner
retain for %a and the outer release from %a, resulting in segfaults.

This is fixed by noting that the signature of a mismatch of
retain/releases inside the for loop is a Use/CanRelease top down with an
None bottom up (since bottom up the Retain-CanRelease-Use-Release
sequence is completed by the inner objc_retain, but top down due to the
differing provenance from the objc_release said sequence is not
completed). In said case in CheckForCFGHazards, we now clear the state
of %a implying that no pairing will occur.

Additionally a test case is included.

rdar://12969722

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179747 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 05:39:45 +00:00
Michael Gottesman
8a709208ed Removed trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179746 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 04:34:11 +00:00