Chris Lattner
4d43d0fd99
move FlattenVariants out of AsmMatcherEmitter into a shared
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CodeGenInstruction::FlattenAsmStringVariants method. Use it
to simplify the code in AsmWriterInst, which now no longer
needs to worry about variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 01:07:14 +00:00
Chris Lattner
52de0ef922
add a FIXME, $lane in ARM is an issue that needs to be resolved before
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this can start rejecting instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117885 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 00:51:32 +00:00
Chris Lattner
4d1189f385
reject instructions that contain a \n in their asmstring. Mark
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various X86 and ARM instructions that are bitten by this as isCodeGenOnly,
as they are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117884 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 00:46:16 +00:00
Chris Lattner
d6d9dd9f5e
fix a crash on:
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let Constraints = "$val = $dst", Defs = [EFLAGS] in, isCodeGenOnly = 1 {
we now get:
X86InstrCompiler.td:653:52: error: Expected class, def, defm, multiclass or let definition
let Constraints = "$val = $dst", Defs = [EFLAGS] in, isCodeGenOnly = 1 {
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117863 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:27:15 +00:00
Chris Lattner
150d20e8fc
fix the !eq operator in tblgen to return a bit instead of an int.
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Use this to make the X86 and ARM targets set isCodeGenOnly=1
automatically for their instructions that have Format=Pseudo,
resolving a hack in tblgen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:22:57 +00:00
Chris Lattner
a4a3a5e3c2
two changes: make the asmmatcher generator ignore ARM pseudos properly,
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and make it a hard error for instructions to not have an asm string.
These instructions should be marked isCodeGenOnly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:15:18 +00:00
Chris Lattner
39ee036f40
reapply r117858 with apparent editor malfunction fixed (somehow I
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got a dulicated line).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:10:56 +00:00
Chris Lattner
8b2f0822f3
revert r117858 while I check out a failure I missed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:05:32 +00:00
Chris Lattner
efa53760fe
the asm matcher can't handle operands with modifiers (like ${foo:bar}).
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Instead of silently ignoring these instructions, emit a hard error and
force the target author to either refactor the target or mark the
instruction 'isCodeGenOnly'.
Mark a few instructions in ARM and MBlaze as isCodeGenOnly the are
doing this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 18:48:12 +00:00
Chris Lattner
6fa152c8fb
have GetAliasRequiredFeatures get its features from
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AsmMatcherInfo so we don't have two places that know the
feature -> enum mapping. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 20:15:02 +00:00
Chris Lattner
0aed1e7701
simplify code that creates SubtargetFeatureInfo, ensuring that features
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that are only used by MnemonicAliases will be found.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117844 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 20:07:57 +00:00
Chris Lattner
d7e409da6d
fix a fixme in stringmatcher, having it generate nice looking code if the
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'tomatch' code contains \n's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:57:17 +00:00
Chris Lattner
8cf8bcc40c
fix typos and some serious bugs in feature handling (but not for
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cases that are currently exercised). Thanks to Frits van Bommel for
the great review!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117840 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:47:49 +00:00
Chris Lattner
0f899c78e1
Resolve a terrible hack in tblgen: instead of hardcoding
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"In32BitMode" and "In64BitMode" into tblgen, allow any
predicate that inherits from AssemblerPredicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:38:20 +00:00
Chris Lattner
693173feef
Implement (and document!) support for MnemonicAlias's to have Requires
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directives, allowing things like this:
def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;
Move the rest of the X86 MnemonicAliases over to the .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117830 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:23:13 +00:00
Chris Lattner
8cc0a6b788
fix build problem
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117828 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:57:07 +00:00
Chris Lattner
4fd32c6648
diagnose targets that define two alises with the same 'from' mnemonic
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with a useful error message instead of having tblgen explode with an
assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117827 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:56:12 +00:00
Chris Lattner
7fd4489de1
emit the mnemonic aliases in their own helper function instead of
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inline into MatchInstructionImpl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117826 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:48:18 +00:00
Chris Lattner
674c1dcca2
implement (and document!) the first kind of MC assembler alias, which
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just remaps one mnemonic to another. Convert a few of the X86 aliases
from .cpp to .td code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 17:36:36 +00:00
Jim Grosbach
a7c78220c4
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117724 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:13:48 +00:00
Chris Lattner
4e692ab5ee
fix the asmmatcher generator to handle targets with no RegisterPrefix
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(like ARM) correctly. With this change, we can now match "bx lr"
because we recognize lr as a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117606 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 21:28:42 +00:00
Evan Cheng
f40deed62f
Shifter ops are not always free. Do not fold them (especially to form
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complex load / store addressing mode) when they have higher cost and
when they have more than one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:41:30 +00:00
Owen Anderson
498ec20703
Provide correct encodings for NEON vcvt, which has its own special immediate encoding
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for specifying fractional bits for fixed point conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 22:49:00 +00:00
Kevin Enderby
529b1a4398
Added the x86 instruction ud2b (2nd official undefined instruction).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:46:49 +00:00
Jim Grosbach
3e55612472
First part of refactoring ARM addrmode2 (load/store) instructions to be more
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explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117409 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:37:02 +00:00
Benjamin Kramer
86c69c570c
Constify another 2 disassembler tables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117208 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:28:42 +00:00
Benjamin Kramer
4d1dca92bd
Make the disassembler tables const so they end up in read-only memory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:10:44 +00:00
Mikhail Glushenkov
a73e586495
Remove -llvmc-temp-hack from tblgen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117197 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 07:32:53 +00:00
Mikhail Glushenkov
17ef94fe1b
Syntax tweak in llvmc: (something [a,b,c]) -> (something a, b, c).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 07:32:46 +00:00
Mikhail Glushenkov
c761f7dca2
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 07:32:37 +00:00
Benjamin Kramer
a3ac427507
Make some symbols static, move classes into anonymous namespaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117111 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:35:07 +00:00
Anders Carlsson
238777eb58
Add a way to emit StringSwitch of clang attribute spellings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116899 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 01:21:53 +00:00
Oscar Fuentes
f0c55a9b97
Build with RTTI and exceptions disabled. Only in GCC for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116682 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-17 02:26:16 +00:00
Jim Grosbach
8abe32af38
ARM mode encoding information for UBFX and SBFX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 17:15:16 +00:00
Jim Grosbach
b3af5de2d9
Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern
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and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116432 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 21:00:04 +00:00
Jim Grosbach
b35ad41fef
Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 19:56:10 +00:00
Jim Grosbach
5013f7469e
Allow targets to optionally specify custom binary encoder functions for
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operand values. This is useful for operands which require additional trickery
to encode into the instruction. For example, the ARM shifted immediate and
shifted register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 22:21:57 +00:00
Cameron Esfahani
519c893c26
Fix spelling error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 00:21:05 +00:00
Jim Grosbach
a1e2194f03
The assert() should reference to machine instr operand number, too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 21:41:31 +00:00
Jim Grosbach
1a7233f9d0
Make sure to use the machine instruction operand number. It doesn't always
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map one-to-one with the CodeGenInstruction operand number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116238 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 21:31:22 +00:00
Jim Grosbach
c4bd6fbf4b
trailing whitespace cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 19:38:01 +00:00
Jim Grosbach
01855071e2
When figuring out which operands match which encoding fields in an instruction,
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try to match them by name first. If there is no by-name match, fall back to
assuming they are in order (this was the previous behavior).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116211 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 18:25:51 +00:00
Jim Grosbach
bb16824dc3
A few 80 column cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 18:13:57 +00:00
Jim Grosbach
9ed2cee105
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 18:09:59 +00:00
Daniel Dunbar
6aa526bf76
Fix -Asserts warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116030 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 02:07:22 +00:00
Jim Grosbach
bade37bb8b
Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116018 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 00:21:28 +00:00
Jim Grosbach
0e99219e03
Move checking for t2MOVCCi16 to the right place.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 22:14:01 +00:00
Nick Lewycky
366b1e1f3f
Fix typo in comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115986 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 21:55:16 +00:00
Dan Gohman
e4f1a9b8a2
Move tool_output_file into its own file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115973 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 20:32:40 +00:00
Jim Grosbach
8b892ae3d6
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115923 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 16:56:28 +00:00