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50bd470d85
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5206 Commits

Author SHA1 Message Date
Jim Grosbach
50bd470d85 Thumb2 assembly parsing and encoding for SSAX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139929 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 18:37:10 +00:00
Jim Grosbach
b105b997a4 Thumb2 assembly parsing and encoding for SSAT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139926 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 18:32:30 +00:00
Jim Grosbach
05ec8f7ac9 Thumb2 assembly parsing and encoding for SRS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139925 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 18:25:22 +00:00
Jim Grosbach
3443ed525a Thumb2 assembly parsing and encoding for SMMULL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139921 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 18:05:48 +00:00
Jim Grosbach
7ff2472b82 Thumb2 assembly parsing and encoding for SMLSLD/SMLSLDX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139909 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 17:10:44 +00:00
Jim Grosbach
231948f860 Thumb2 assembly parsing and encoding for SMLALD/SMLALDX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139906 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 16:58:03 +00:00
Jim Grosbach
db7e2e59dd Kill some dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139904 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 16:45:40 +00:00
Jim Grosbach
fb9cffea4a Tidy up a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139903 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 16:39:25 +00:00
Jim Grosbach
837fc5e9d5 Thumb2 assembly parsing and encoding for SMLAL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139902 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 16:38:00 +00:00
Jim Grosbach
eeca7582fa Remove incorrect comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139877 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 23:45:50 +00:00
Owen Anderson
98c5ddabca Don't attach annotations to MCInst's. Instead, have the disassembler return, and the printer accept, an annotation string which can be passed through if the client cares about annotations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139876 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 23:38:46 +00:00
Jim Grosbach
c075d45364 Thumb2 assembly parsing and encoding for SHASX/SHSAX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139870 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 22:34:29 +00:00
Eli Friedman
74bf18ccea Minor cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139869 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 22:26:18 +00:00
Eli Friedman
7cc156647f Use a more efficient lowering for Unordered/Monotonic atomic load/store on Thumb1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139865 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 22:18:49 +00:00
Jim Grosbach
e4e4a93e9e Thumb2 assembly parsing and encoding for SASX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139843 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 21:01:23 +00:00
Jim Grosbach
191d33fd6d Thumb2 assembly parsing and encoding for RSB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139839 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 20:54:14 +00:00
Jim Grosbach
689b86ed2e Thumb2 assembly parsing and encoding for REV16/REVSH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139828 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 19:46:13 +00:00
Owen Anderson
ede042dc8d Add support for stored annotations to MCInst, and provide facilities for MC-based InstPrinters to print them out. Enhance the ARM and X86 InstPrinter's to do so in verbose mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139820 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:36:29 +00:00
Jim Grosbach
1b69a128d6 Thumb2 assembly parsing and encoding for REV. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139813 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:13:30 +00:00
Jim Grosbach
b6e9a83349 ARM support the pre-UAL mnemonic 'qsubaddx' for 'qsax.' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139796 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 16:16:50 +00:00
Jim Grosbach
57b21e437a Thumb2 push/pop mnemonic recognition. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139794 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 15:55:04 +00:00
Jim Grosbach
0b69247b10 Thumb2 assembly parsing and encoding for PKH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139754 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 23:16:41 +00:00
Jim Grosbach
21a05e7017 ARMv7a has the PKH instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139753 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 23:16:34 +00:00
Jim Grosbach
e1d58a6556 ARM tighten up the register classes for the PKH instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139748 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 22:52:14 +00:00
Owen Anderson
8adf62034a Fix a crasher in Thumb2 MOV-immediate encoding for certain inputs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139747 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 22:46:14 +00:00
Jim Grosbach
d32872f9ca Thumb2 assembly parsing and encoding for MVN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139739 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:24:41 +00:00
Owen Anderson
34626acf7f Nested IT blocks are UNPREDICTABLE. Mark them as such when disassembling them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139736 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:06:21 +00:00
Jim Grosbach
64944f48a1 Thumb2 assembly parsing and encoding for MUL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139735 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:00:40 +00:00
Jim Grosbach
bf841cf336 Thumb2 assembly parsing and encoding for MSR/MRS. 
Fix a bug in handling default flags for both ARM and Thumb encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139721 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 20:03:46 +00:00
Jim Grosbach
c2d3164ab4 Thumb2 assembly parsing for MOV in IT block. 
Select the right 16 vs. 32 bit encoding in an IT block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139714 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 19:12:11 +00:00
Jim Grosbach
d0588e2a2e ARM fix assembly parser handling of ranges in register lists. 
Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.

rdar://8883573


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 18:08:35 +00:00
Jim Grosbach
d300b94e51 Remove unnecessary scope resolution operator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139656 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 22:56:44 +00:00
Owen Anderson
7782a58b87 Correct disassembly printing of Thumb2 post-incremented LDRD and STRD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139639 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:46:26 +00:00
Jim Grosbach
d7a2b3bea8 There's only 16 regs legal in a register list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139637 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:35:57 +00:00
Jim Grosbach
b04546ff5b Tidy up a few 80 column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139636 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:30:37 +00:00
Jim Grosbach
8f310d9786 Tidy up a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139635 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:27:44 +00:00
Owen Anderson
b6b7f515e2 Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139610 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 17:59:19 +00:00
Owen Anderson
12c7e90d36 Fix encoding of Thumb2 shifted register operands with RRX shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 17:34:32 +00:00
Eli Friedman
885f1a0c04 Zap some junk from the ARM instruction descriptions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139575 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 02:29:58 +00:00
Jim Grosbach
2d539691a1 Tidy up a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139559 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 23:36:42 +00:00
Owen Anderson
cd00dc6852 Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139542 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 21:28:46 +00:00
Owen Anderson
fd92d2e106 Fix encoding of PC-relative LDRSHW with an immediate offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139537 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 20:36:51 +00:00
Owen Anderson
a073795023 There's no need to add additional predicate operands when converting a tB to a tBfar now. Fixes nightly test failures on armv6 Thumb. <rdar://problem/10110404> 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139531 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 20:07:22 +00:00
Owen Anderson
a3157b4026 Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139522 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 18:56:30 +00:00
Jim Grosbach
1ad60c2adc Thumb2 parsing and encoding for MOV(immediate). 
Some aliases for MOV(register) also to keep existing T1 tests happy when
run in thumbv7 mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139440 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-10 00:15:36 +00:00
Owen Anderson
921d01ae1f LDM writeback is not allowed if Rn is in the target register list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139432 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 23:13:33 +00:00
Owen Anderson
112fb73502 Fix an ambiguously nested if. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139431 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 23:13:02 +00:00
Owen Anderson
cd4338fff5 Fix buildbot breakage caused by r139415. I missed one instance of a manually create ARM::tB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139429 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 23:05:14 +00:00
Owen Anderson
08fef885eb Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139422 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 22:24:36 +00:00
Owen Anderson
51f6a7abf2 Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139415 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 21:48:23 +00:00