Commit Graph

113014 Commits

Author SHA1 Message Date
Hans Wennborg
5243154a6a LowerSwitch: remove default args from CaseRange ctor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228311 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 16:50:27 +00:00
Sylvestre Ledru
586cbe8d49 revert 228308. The code has changed since the review
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228309 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 16:35:44 +00:00
Sylvestre Ledru
12819fc914 Identical code for different branches (CID 1254883)
Reviewers: kledzik, rafael

Reviewed By: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6303

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228308 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 16:30:25 +00:00
Tom Stellard
c7198528eb R600/SI: Fix bug in TTI loop unrolling preferences
We should be setting UnrollingPreferences::MaxCount to MAX_UINT instead
of UnrollingPreferences::Count.

Count is a 'forced unrolling factor', while MaxCount sets an upper
limit to the unrolling factor.

Setting Count to MAX_UINT was causing the loop in the testcase to be
unrolled 15 times, when it only had a maximum of 4 iterations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228303 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 15:32:18 +00:00
Tom Stellard
041211cd79 R600/SI: Fix bug from insertion of llvm.SI.end.cf into loop headers
The llvm.SI.end.cf intrinsic is used to mark the end of if-then blocks,
if-then-else blocks, and loops.  It is responsible for updating the
exec mask to re-enable threads that had been masked during the preceding
control flow block.  For example:

s_mov_b64 exec, 0x3                 ; Initial exec mask
s_mov_b64 s[0:1], exec              ; Saved exec mask
v_cmpx_gt_u32 exec, s[2:3], v0, 0   ; llvm.SI.if
do_stuff()
s_or_b64 exec, exec, s[0:1]         ; llvm.SI.end.cf

The bug fixed by this patch was one where the llvm.SI.end.cf intrinsic
was being inserted into the header of loops.  This would happen when
an if block terminated in a loop header and we would end up with
code like this:

s_mov_b64 exec, 0x3                 ; Initial exec mask
s_mov_b64 s[0:1], exec              ; Saved exec mask
v_cmpx_gt_u32 exec, s[2:3], v0, 0   ; llvm.SI.if
do_stuff()

LOOP:                       ; Start of loop header
s_or_b64 exec, exec, s[0:1] ; llvm.SI.end.cf <-BUG: The exec mask has the
                              same value at the beginning of each loop
			      iteration.
do_stuff();
s_cbranch_execnz LOOP

The fix is to create a new basic block before the loop and insert the
llvm.SI.end.cf there.  This way the exec mask is restored before the
start of the loop instead of at the beginning of each iteration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 15:32:15 +00:00
Bill Schmidt
202b6045bf [PowerPC] Implement the vclz instructions for PWR8
Patch by Kit Barton.

Add the vector count leading zeros instruction for byte, halfword,
word, and doubleword sizes.  This is a fairly straightforward addition
after the changes made for vpopcnt:

 1. Add the correct definitions for the various instructions in
    PPCInstrAltivec.td
 2. Make the CTLZ operation legal on vector types when using P8Altivec
    in PPCISelLowering.cpp 

Test Plan

Created new test case in test/CodeGen/PowerPC/vec_clz.ll to check the
instructions are being generated when the CTLZ operation is used in
LLVM.

Check the encoding and decoding in test/MC/PowerPC/ppc_encoding_vmx.s
and test/Disassembler/PowerPC/ppc_encoding_vmx.txt respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228301 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 15:24:47 +00:00
Rafael Espindola
29b65fa1df Add a FIXME.
Thanks to Eric for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 14:57:47 +00:00
Aaron Ballman
04688c792c Removing an unused variable warning I accidentally introduced with my last warning fix; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228295 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 13:52:42 +00:00
Aaron Ballman
ac7a1d5994 Silencing an MSVC warning about a switch statement with no cases; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228294 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 13:40:04 +00:00
Bruno Cardoso Lopes
04715c9915 [X86][MMX] Handle i32->mmx conversion using movd
Implement a BITCAST dag combine to transform i32->mmx conversion patterns
into a X86 specific node (MMX_MOVW2D) and guarantee that moves between
i32 and x86mmx are better handled, i.e., don't use store-load to do the
conversion..

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228293 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 13:23:07 +00:00
Bruno Cardoso Lopes
d4299719af [X86][MMX] Add several bitcast tests
Avoid regression in previously supported MMX code by adding different
combinations of tests which exercise MMX bitcasts. Small improvements
to these patterns should come next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228292 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 13:22:57 +00:00
Bruno Cardoso Lopes
3b5d8c5d78 [X86][MMX] Move MMX DAG node to proper file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228291 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 13:22:50 +00:00
Michael Kuperstein
acd7b00be2 Teach isDereferenceablePointer() to look through bitcast constant expressions.
This fixes a LICM regression due to the new load+store pair canonicalization.

Differential Revision: http://reviews.llvm.org/D7411

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228284 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 09:15:37 +00:00
Craig Topper
20d15157e4 [X86] Add xrstors/xsavec/xsaves/clflushopt/clwb/pcommit instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228283 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 08:51:06 +00:00
Craig Topper
b8fa51de42 [X86] Remove two feature flags that covered sets of instructions that have no patterns or intrinsics. Since we don't check feature flags in the assembler parser for any instruction sets, these flags don't provide any value. This frees up 2 of the fully utilized feature flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228282 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 08:51:02 +00:00
Matt Arsenault
81eb6ca158 R600/SI: Fix i64 truncate to i1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228273 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 06:05:13 +00:00
Larisse Voufo
27fa7bdd07 Disable enumeral mismatch warning when compiling llvm with gcc.
Tested with gcc 4.9.2.
Compiling with -Werror was producing:
.../llvm/lib/Target/X86/X86ISelLowering.cpp: In function 'llvm::SDValue lowerVectorShuffleAsBitMask(llvm::SDLoc, llvm::MVT, llvm::SDValue, llvm::SDValue, llvm::ArrayRef<int>, llvm::SelectionDAG&)':
.../llvm/lib/Target/X86/X86ISelLowering.cpp:7771:40: error: enumeral mismatch in conditional expression: 'llvm::X86ISD::NodeType' vs 'llvm::ISD::NodeType' [-Werror=enum-compare]
   V = DAG.getNode(VT.isFloatingPoint() ? X86ISD::FAND : ISD::AND, DL, VT, V,
                                        ^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228271 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 04:54:51 +00:00
Matt Arsenault
0ac74cc4e3 Add addrspacecast node to tablegen
The node is still defined oddly so that the
address spaces are not operands and not accessible
from tablegen, but as-is this can now be used to write
a ComplexPattern with an addrspacecast root node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228270 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 03:35:34 +00:00
Matt Arsenault
7575430de4 Add support for double / float to EndianStream
Also add new unit tests for endian::Writer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228269 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 03:30:08 +00:00
Michael Zolotukhin
710ce5d36b Implement new heuristic for complete loop unrolling.
Complete loop unrolling can make some loads constant, thus enabling a
lot of other optimizations. To catch such cases, we look for loads that
might become constants and estimate number of instructions that would be
simplified or become dead after substitution.

Example:
Suppose we have:
int a[] = {0, 1, 0};
v = 0;
for (i = 0; i < 3; i ++)
  v += b[i]*a[i];

If we completely unroll the loop, we would get:
v = b[0]*a[0] + b[1]*a[1] + b[2]*a[2]

Which then will be simplified to:
v = b[0]* 0 + b[1]* 1 + b[2]* 0

And finally:
v = b[1]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228265 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 02:34:00 +00:00
Cameron Esfahani
d02540a1d7 Value soft float calls as more expensive in the inliner.
Summary: When evaluating floating point instructions in the inliner, ask the TTI whether it is an expensive operation.  By default, it's not an expensive operation.  This keeps the default behavior the same as before.  The ARM TTI has been updated to return back TCC_Expensive for targets which don't have hardware floating point.

Reviewers: chandlerc, echristo

Reviewed By: echristo

Subscribers: t.p.northover, aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D6936

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228263 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 02:09:33 +00:00
Ahmed Bougacha
a7f2cf45f3 [ARM] Use patterns instead of hardcoded regs in test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228259 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 01:52:19 +00:00
Ahmed Bougacha
42ec3433ef [ARM] Make testcase more explicit. NFC.
The q8/d16 thing is silly;  I'd be happy to hear about a better
way to write those tests where simple substitution isn't enough..


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228258 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 01:45:28 +00:00
Reid Kleckner
6d3ceb23c7 Try to fix the build in MCValue.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228256 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 01:23:14 +00:00
Sean Silva
bd59cd48d5 Fixup.
Didn't see these calls in my release build locally when testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228254 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 01:13:47 +00:00
Duncan P. N. Exon Smith
c760eff69f IR: Split out getOperandAs(), NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228250 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 01:07:47 +00:00
Sean Silva
a875e3d4d6 [MC] Remove various unused MCAsmInfo parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228244 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 00:58:51 +00:00
Duncan P. N. Exon Smith
09b44e9be7 IR: Rename 'operator ==()' to 'isKeyOf()', NFC
`isKeyOf()` is a clearer name than overloading `operator==()`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228242 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 00:51:35 +00:00
Duncan P. N. Exon Smith
97ec768f7f ADT: Add int64_t interoperability to APSInt
Add some API to `APSInt` to make it easier to compare with `int64_t`.

  - `APSInt::compareValues(APSInt, APSInt)` returns 1, -1 or 0 for
    greater, lesser, or equal, doing the right thing for mismatched
    "has-sign" and bitwidths.  This is just like `isSameValue()` (and is
    now the implementation of it).
  - `APSInt::get(int64_t)` gets a signed `APSInt`.
  - `operator<(int64_t)`, etc., are implemented trivially via `get()`
    and `compareValues()`.
  - Also added `APSInt::getUnsigned(uint64_t)` to make it easier to test
    `compareValues()`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228239 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 00:17:43 +00:00
Colin LeMahieu
91568ff3aa [Hexagon] Deleting unused instructions and adding isCodeGenOnly to some defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228238 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 00:10:16 +00:00
Colin LeMahieu
69a33e427e [Hexagon] Updating load extend to i64 patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228237 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 23:55:16 +00:00
Kostya Serebryany
5d85a10810 [fuzzer] add flag prefer_small_during_initial_shuffle, be a bit more verbose
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228235 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 23:42:42 +00:00
Colin LeMahieu
2747f4aaf5 [Hexagon] Cleaning up i1 load and extension patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228232 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 23:27:48 +00:00
Colin LeMahieu
083cc71ab3 [Hexagon] Simplifying more load and store patterns and using new addressing patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228231 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 23:23:16 +00:00
Reid Kleckner
cfa2c32166 Remove useless call to isOSCygMing()
This used to do something when we modeled the Cygwin and MinGW
environments as distinct OSs, but now it is not needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228229 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 23:17:19 +00:00
Tom Stellard
26bfda9dd3 R600/SI: Enable subreg liveness by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228228 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 23:14:18 +00:00
Colin LeMahieu
18c8166405 [Hexagon] Simplifying some load and store patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228227 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 23:10:21 +00:00
Duncan P. N. Exon Smith
783e0e4b23 AsmParser: Split out LineField, NFC
Split out `LineField`, which restricts the legal line numbers.  This
will make it easier to be consistent between different node parsers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228226 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:59:18 +00:00
Colin LeMahieu
82bc37ed90 [Hexagon] Converting absolute-address load patterns to use AddrGP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228225 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:54:51 +00:00
Colin LeMahieu
0f9cf365b2 [Hexagon] Converting atomic store/load to use AddrGP addressing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228223 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:40:36 +00:00
Reid Kleckner
304821b21b Don't warn or note if bash is missing
We haven't needed bash on Windows to run the test suite for a long time
now.

Patch by Michael Edwards!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228221 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:36:52 +00:00
Colin LeMahieu
243f011835 [Hexagon] Simplifying some store patterns. Adding AddrGP addressing forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228220 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:36:28 +00:00
Filipe Cabecinhas
cec4461c47 Handle LLVM_USE_SANITIZER=Address;Undefined (and the other way around)
Summary:
Handle LLVM_USE_SANITIZER=Address;Undefined to enable ASan and UBSan
If UBSan is compatible with more of the other sanitizers, maybe we should
deal with this in a better way where we allow combining UBSan with any of
the other sanitizers.

Reviewers: samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7024

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228219 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:33:31 +00:00
Kostya Serebryany
46c638cfc8 [fuzzer] add -runs=N to limit the number of runs per session. Also, make sure we do some mutations w/o cross over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228214 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:20:09 +00:00
Duncan P. N. Exon Smith
8054a41a27 Fix GCC error caused by r228211
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228213 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:13:28 +00:00
Duncan P. N. Exon Smith
890324873f IR: Reduce boilerplate in DenseMapInfo overrides, NFC
Minimize the boilerplate required for the `MDNode` subclass
`DenseMapInfo<>` overrides in `LLVMContextImpl`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228212 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:08:30 +00:00
Duncan P. N. Exon Smith
89aee384c1 AsmParser: Move MDField details to source file, NFC
Move all the types of `MDField` to an anonymous namespace in the source
file.  This also eliminates the duplication of `ParseMDField()`
declarations in the header for each new field type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228211 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:05:21 +00:00
Duncan P. N. Exon Smith
99dc945c08 AsmParser: Simplify assertion, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228209 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:02:18 +00:00
Duncan P. N. Exon Smith
7ec73f04a8 AsmParser: Remove dead code, NFC
This condition is checked in the generic `ParseMDField()`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228208 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 22:00:59 +00:00
Duncan P. N. Exon Smith
321b43e7cc AsmParser: Simplify MDUnsignedField
We only need `uint64_t` for storage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228205 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 21:57:52 +00:00