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5422a0f166
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19762 Commits

Author SHA1 Message Date
Justin Holewinski
5422a0f166 PTX: Use .param space for device function return values on SM 2.0+, and attempt 
to fix up parameter passing on SM < 2.0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140309 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:46 +00:00
Justin Holewinski
05591be5ed PTX: Fix style issues 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140308 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:43 +00:00
Justin Holewinski
297984d7c6 PTX: Fixup codegen to handle emission of virtual registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140307 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:40 +00:00
Justin Holewinski
40466cc758 PTX: Customize codegen passes in backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140306 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:37 +00:00
Justin Holewinski
247ee00bce PTX: Add new PTX-specific register allocator that keeps virtual registers 
instead of allocating physical registers.

This is part of a work-in-progress overhaul of the PTX register allocation scheme.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140305 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:33 +00:00
Craig Topper
adf01b3f18 Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140299 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 07:01:50 +00:00
Akira Hatanaka
bb7d289aeb Add definition of 64-bit floating registers used for Mips64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140297 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 03:48:47 +00:00
Benjamin Kramer
2c2ccbf108 The SSE version differences for fmin/fmax are more involved than I thought. 
- x87: no min or max.
- SSE1: min/max for single precision scalars and vectors.
- SSE2: min/max for single and double precision scalars and vectors.
- AVX: as SSE2, but also supports the wider ymm vectors. (this is covered by the isTypeLegal check)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140296 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 03:27:22 +00:00
Akira Hatanaka
e33ca9ce1f Add enums and functions for symbols Mips64 uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140295 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 03:09:07 +00:00
Benjamin Kramer
74f3501d15 X86: Don't form min/max nodes if the target is missing SSE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140294 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 03:01:42 +00:00
Akira Hatanaka
459cad2dfd Mips64 aligns stack on 16-byte boundary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140292 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 02:53:37 +00:00
Akira Hatanaka
c56f5ea4c3 Remove unnecessary condition check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140291 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 02:41:29 +00:00
Owen Anderson
6126870193 Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140284 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 23:53:44 +00:00
Owen Anderson
e136872970 Print out immediate offset versions of PC-relative load/store instructions as [pc, #123] rather than simply #123. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140283 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 23:44:46 +00:00
Benjamin Kramer
15c9a1f60c X86Disassembler: if verbose logging is going to nulls(), disable logging completely. 
Otherwise we'll spend a ridiculous amount of time pretty printing debug output and then discarding it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140276 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 21:47:35 +00:00
Wesley Peck
91b60c1487 Fix some simple copy-paste errors in MBlaze ASM Parser and Makefile. 
patch contributed by Jia Liu!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140273 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 19:23:46 +00:00
Owen Anderson
519020adf1 These do not need to be conditional on the presence of CommentStream, as they have a fallback path now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140267 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 17:58:45 +00:00
Akira Hatanaka
0e64f810a5 Undo a change made in r140254. 
MipsArchVersion needs to be initialized to Mips32.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140261 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 17:31:45 +00:00
Nadav Rotem
64ac73bb15 fix comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140258 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 17:14:40 +00:00
Akira Hatanaka
47c40a2cf9 MipsArchVersion does not need to be in the initialization list and MipsABI 
should be initialized to UnknownABI.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140254 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 16:41:43 +00:00
Nadav Rotem
9c6cdf4c1c Insert a sanity check on the combining of x86 truncing-store nodes. This comes to replace the problematic check that was removed in r139995. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140246 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 08:45:10 +00:00
Richard Trieu
23946fcaae Change: 
assert(!"error message");

To:

  assert(0 && "error message");

which is more consistant across the code base.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140234 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 03:09:09 +00:00
Akira Hatanaka
2464810ac2 Add a base class for Mips TargetMachines and add Mips64 TargetMachines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140233 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 03:00:58 +00:00
Akira Hatanaka
8c1b4bf066 Set ABI if it hasn't been set on the command line. 
Check if architecture & ABI combination is valid.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140230 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 02:45:29 +00:00
Akira Hatanaka
50fa74e8d2 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140229 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 02:24:25 +00:00
Andrew Trick
3be654f808 Lower ARM adds/subs to add/sub after adding optional CPSR operand. 
This is still a hack until we can teach tblgen to generate the
optional CPSR operand rather than an implicit CPSR def. But the
strangeness is now limited to the selection DAG. ADD/SUB MI's no
longer have implicit CPSR defs, nor do we allow flag setting variants
of these opcodes in machine code. There are several corner cases to
consider, and getting one wrong would previously lead to nasty
miscompilation. It's not the first time I've debugged one, so this
time I added enough verification to ensure it won't happen again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140228 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 02:20:46 +00:00
Andrew Trick
e23dc9c0ef whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140227 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 02:17:37 +00:00
Owen Anderson
317eaf1993 In the disassembler C API, be careful not to confuse the comment streamer that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140217 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 00:25:23 +00:00
Akira Hatanaka
5663344127 Change the names of functions isMips* to hasMips*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140214 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 23:53:09 +00:00
Bruno Cardoso Lopes
f4b841d4e2 Revert r140097, working on a better approach 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140203 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 23:19:29 +00:00
Bruno Cardoso Lopes
149f29f1fd Simplify max/minp[s|d] dagcombine matching 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140199 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 22:34:45 +00:00
Bruno Cardoso Lopes
4e42335972 Tidy up a bit more, fix tab and remove trailing whitespaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140186 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 21:45:26 +00:00
Bruno Cardoso Lopes
448d986858 The wrong relocation was being emitted for several SSSE3 instructions. 
This fixes PR10963. Thanks to Benjamin for finding the wrong tablegen
declaration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140184 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 21:39:21 +00:00
Bruno Cardoso Lopes
77169a9197 Tidy up code! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140183 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 21:39:06 +00:00
Evan Cheng
0d18174f0f Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140181 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 21:38:18 +00:00
Akira Hatanaka
1daa5bea58 Initial Mips64 support. Patch by Liu with some modifications. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140178 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 20:28:08 +00:00
Andrew Trick
83a8031336 Restore hasPostISelHook tblgen flag. 
No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140160 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 18:22:31 +00:00
Craig Topper
3699261d3f Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140140 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 07:38:59 +00:00
Andrew Trick
4815d56bb2 ARM isel bug fix for adds/subs operands. 
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140134 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 03:17:40 +00:00
Andrew Trick
3af7a67629 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140133 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 03:06:13 +00:00
Jim Grosbach
50f1c37123 Thumb2 assembly parsing and encoding for UXTAB/UXTAB16/UXTH/UXTB/UXTB16/UXTH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140125 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 00:46:54 +00:00
Jim Grosbach
6053cd956f Thumb2 assembly parsing and encoding for USAX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140119 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 00:30:45 +00:00
Jim Grosbach
8c9898454c Remove incorrect comments. These are not disassmebly only patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140116 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 00:26:34 +00:00
Jim Grosbach
ab3bf97fe0 Thumb2 assembly parsing and encoding for UQASX/UQSAX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140111 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 00:18:52 +00:00
Jim Grosbach
abb8aacef2 Thumb1 convenience aliases for disassembler round-trip testing. CPS instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140108 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 00:10:37 +00:00
Jim Grosbach
26215425da Thumb CPS definition is not disassembler only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140106 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 00:00:06 +00:00
Jim Grosbach
0efe213ed5 Thumb2 range check on CPS mode immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140105 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 23:58:31 +00:00
Owen Anderson
d9346fbb06 tMOVSr is not allowed in an IT block either. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140104 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 23:57:20 +00:00
Owen Anderson
9f666b5f2e CPS instructions are UNPREDICTABLE inside IT blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140102 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 23:47:10 +00:00
Jim Grosbach
32f36899e9 Tidy up comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140099 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 23:38:34 +00:00