Commit Graph

112556 Commits

Author SHA1 Message Date
Chandler Carruth
54e0791182 [LPM] Clean up the use of TLS in pretty stack trace and disable it
entirely when threads are not enabled. This should allow anyone who
needs to bootstrap or cope with a host loader without TLS support to
limp along without threading support.

There is still some bug in the PPC TLS stuff that is not worked around.
I'm getting access to a machine to reproduce and debug this further.
There is some chance that I'll have to add a terrible workaround for
PPC.

There is also some problem with iOS, but I have no ability to really
evaluate what the issue is there. I'm leaving it to folks maintaining
that platform to suggest a path forward -- personally I don't see any
useful path forward that supports threading in LLVM but does so without
support for *very basic* TLS. Note that we don't need more than some
pointers, and we don't need constructors, destructors, or any of the
other fanciness which remains widely unimplemented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227411 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 01:23:04 +00:00
Reid Kleckner
866fe5889e Remove unused variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227408 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 00:55:44 +00:00
Reid Kleckner
f77571aeac Add a Windows EH preparation pass that zaps resumes
If the personality is not a recognized MSVC personality function, this
pass delegates to the dwarf EH preparation pass. This chaining supports
people on *-windows-itanium or *-windows-gnu targets.

Currently this recognizes some personalities used by MSVC and turns
resume instructions into traps to avoid link errors.  Even if cleanups
are not used in the source program, LLVM requires the frontend to emit a
code path that resumes unwinding after an exception.  Clang does this,
and we get unreachable resume instructions. PR20300 covers cleaning up
these unreachable calls to resume.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D7216

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227405 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 00:41:44 +00:00
Eric Christopher
bd2a700208 Remove getSubtargetImpl from AArch64ISelLowering and cache the
correct subtarget by passing it in during the constructor as
TargetLowering is Subtarget specific.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227402 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 00:19:42 +00:00
Eric Christopher
3dd7e82123 Remove getSubtargetImpl from ARMISelLowering and cache the
correct subtarget by passing it in during the constructor as
TargetLowering is Subtarget specific.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227401 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 00:19:39 +00:00
Eric Christopher
92185fdb9f Small cleanup in ARMFastISel initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227400 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 00:19:37 +00:00
Eric Christopher
a6deca3e1b Migrate ARM except for TTI, AsmPrinter, and frame lowering
away from getSubtargetImpl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227399 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 00:19:33 +00:00
Manuel Jacob
c8d6db0fc0 Add nullptr checks for TargetSelectionDAGInfo in SelectionDAG.
TSI is not guaranteed be non-null in SelectionDAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227397 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 23:50:40 +00:00
Kostya Serebryany
1f3043175c [fuzzer] add option -save_minimized_corpus
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227395 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 23:48:39 +00:00
Chandler Carruth
41e59785c1 [LPM] Fix the PPC attribute to be spelled 'global-dynamic'. This should
let the build bot make finish compiling stage2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227391 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 23:10:57 +00:00
Philip Reames
61a76b2d4a Teach SplitBlockPredecessors how to handle landingpad blocks.
Patch by: Igor Laevsky <igor@azulsystems.com>

"Currently SplitBlockPredecessors generates incorrect code in case if basic block we are going to split has a landingpad. Also seems like it is fairly common case among it's users to conditionally call either SplitBlockPredecessors or SplitLandingPadPredecessors. Because of this I think it is reasonable to add this condition directly into SplitBlockPredecessors."

Differential Revision: http://reviews.llvm.org/D7157



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227390 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 23:06:47 +00:00
Kostya Serebryany
408796c672 Add lit-style tests for the Fuzzer library
Summary: Add test targets and the lit-style runner.

Test Plan: Run the tests on bot.

Reviewers: samsonov

Reviewed By: samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227389 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 22:49:25 +00:00
Sanjay Patel
d5502c5f13 fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227386 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 22:37:32 +00:00
Chris Bieneman
75a1a5c24b Build fix for Visual Studio. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227385 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 22:25:00 +00:00
Frederic Riss
3ddec31300 [dsymutil] Gather the DIE tree child->parent relationships.
The libDebugInfo DIE parsing doesn't store these relationships, we have to
recompute them. This commit introduces the CompileUnit bookkeeping class to
store this data. It will be expanded with more fields in the future.

No tests as this produces no visible output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227382 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 22:15:14 +00:00
Frederic Riss
33c9f17f2c Add DWARFUnit::getNumDIEs() and getDIEIndex()
Parsed DIEs are stored in a vector and that makes it easy to get their
indices. Having easy access to a DIE's index makes it possible to use
arrays or vectors to efficiently store/access DIE related information.

There's no test for that new functionality (I don't see how to test
it standalone), but it'll be used in a subsequent dsymutil commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227381 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 22:15:07 +00:00
Colin LeMahieu
24373e35a4 [Hexagon] Updating several V5 intrinsics and adding FP tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 22:08:16 +00:00
Simon Pilgrim
d0e8688ebc Spelling fixes. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227376 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 22:03:52 +00:00
Simon Pilgrim
5d8772fef5 Line endings fix. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227374 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 21:56:52 +00:00
Zoran Jovanovic
7624914c14 [mips][microMIPS] Implement SWM and LWM aliases
Differential Revision: http://reviews.llvm.org/D5820


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227373 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 21:52:27 +00:00
Kostya Serebryany
b0f9090173 [fuzzer] instructions for building/running clang-format-fuzzer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227357 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 19:51:58 +00:00
Sanjay Patel
143826f71b invert check for less indentation; use local vars to reduce duplication; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227355 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 19:44:21 +00:00
Colin LeMahieu
795ab51720 [Hexagon] Updating many V4 intrinsic patterns. Adding missing instruction and deleting unused classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227353 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 19:39:09 +00:00
Chandler Carruth
2aefa011df [LPM] Try to work around a bug with local-dynamic TLS on PowerPC 64.
Sadly, this precludes optimizing it down to initial-exec or local-exec
when statically linking, and in general makes the code slower on PPC 64,
but there's nothing else for it until we can arrange to produce the
correct bits for the linker.

Lots of thanks to Ulirch for tracking this down and Bill for working on
the long-term fix to LLVM so that we can relegate this to old host
clang versions.

I'll be watching the PPC build bots to make sure this effectively
revives them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227352 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 19:29:22 +00:00
Philip Reames
afe3498413 Remove gc.root's performCustomLowering
This is a refactoring to restructure the single user of performCustomLowering as a specific lowering pass and remove the custom lowering hook entirely.

Before this change, the LowerIntrinsics pass (note to self: rename!) was essentially acting as a pass manager, but without being structured in terms of passes. Instead, it proxied calls to a set of GCStrategies internally. This adds a lot of conceptual complexity (i.e. GCStrategies are stateful!) for very little benefit. Since there's been interest in keeping the ShadowStackGC working, I extracting it's custom lowering pass into a dedicated pass and just added that to the pass order. It will only run for functions which opt-in to that gc.

I wasn't able to find an easy way to preserve the runtime registration of custom lowering functionality. Given that no user of this exists that I'm aware of, I made the choice to just remove that. If someone really cares, we can look at restoring it via dynamic pass registration in the future.

Note that despite the large diff, none of the lowering code actual changes. I added the framing needed to make it a pass and rename the class, but that's it.

Differential Revision: http://reviews.llvm.org/D7218



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227351 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 19:28:03 +00:00
Chris Bieneman
b268ba8022 Moving AddLiteralOption's declaration higher up in the header to make gcc happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227348 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 19:17:09 +00:00
Colin LeMahieu
a5062b38a9 [Hexagon] Adding XTYPE/MPY intrinsic tests and some missing multiply instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227347 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 19:16:17 +00:00
Chris Bieneman
61b9b31ef1 Refactoring llvm command line parsing and option registration.
Summary:
The primary goal of this patch is to remove the need for MarkOptionsChanged(). That goal is accomplished by having addOption and removeOption properly sort the options.

This patch puts the new add and remove functionality on a CommandLineParser class that is a placeholder. Some of the functionality in this class will need to be merged into the OptionRegistry, and other bits can hopefully be in a better abstraction.

This patch also removes the RegisteredOptionList global, and the need for cl::Option objects to be linked list nodes.

The changes in CommandLineTest.cpp are required because these changes shift when we validate that options are not duplicated. Before this change duplicate options were only found during certain cl API calls (like cl::ParseCommandLine). With this change duplicate options are found during option construction.

Reviewers: dexonsmith, chandlerc, pete

Reviewed By: pete

Subscribers: pete, majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D7132

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227345 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 19:00:25 +00:00
Alex Rosenberg
57e7477132 Assume code ownership for the PS4 to ensure patches get reviewed, per the Developer Policy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227340 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 18:33:39 +00:00
Bjorn Steinbrink
dd4a5df6e1 Fix build breakage caused by memory leaks in llvm-c-test
I accidently introduced those in r227319.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227339 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 18:32:31 +00:00
Colin LeMahieu
4925c39604 [Hexagon] Deleting a lot of old variants of intrinsics and updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227338 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 18:29:11 +00:00
Frederic Riss
b616a18f02 [dsymutil] Add DwarfLinker class.
It's an empty shell for now. It's main method just opens the debug
map objects and parses their Dwarf info. Test that we at least do
that correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227337 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 18:27:01 +00:00
Colin LeMahieu
1135b0df02 [Hexagon] Converting XTYPE/BIT intrinsic patterns and adding tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227335 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 18:06:23 +00:00
Sanjay Patel
9598bbc542 use SDValue methods directly instead of getNode()->* ; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227334 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 18:01:31 +00:00
Rafael Espindola
f43ce56642 Simplify code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227333 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 17:54:19 +00:00
Colin LeMahieu
a5070baf7e [Hexagon] Replacing XTYPE/SHIFT intrinsic patternss. Adding tests and missing instructions with tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227330 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 17:37:59 +00:00
Jozef Kolek
a8c8e06c02 [mips][microMIPS] Implement LWGP instruction
Differential Revision: http://reviews.llvm.org/D6650


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227325 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 17:27:26 +00:00
Colin LeMahieu
4b032d5f15 [Hexagon] Replacing intrinsics for halfword adds and max/min word/dword.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227322 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 17:06:40 +00:00
Colin LeMahieu
0f5f7c0c1b [Hexagon] Replacing old intrinsic tests with organized versions that match the reference manual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227321 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 16:58:05 +00:00
Bjorn Steinbrink
920382c5aa Fix LLVMSetMetadata and LLVMAddNamedMetadataOperand for single value MDNodes
Summary:
MetadataAsValue uses a canonical format that strips the MDNode if it
contains only a single constant value. This triggers an assertion when
trying to cast the value to a MDNode.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7165

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227319 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 16:35:59 +00:00
Simon Atanasyan
9c49a6d449 [ELFYAML] Provide explicit value for relocation addendums in the test
The `Addend` is an optional field of the `Relocation` YAML record. But
we do not provide its default value while reading it from a YAML file
and so it might keep uninitialized.

I am going to fix the code by a separate commit. We might either make
this field mandatory (at least for .rela sections) or specify 0 as
a default value explicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227318 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 16:22:50 +00:00
Michael Kuperstein
837fe4388b [x32] Change the condition from bitness to LP64 for TCRETURNdi64.
TCRETURNmi64, which was mistakenly changed in r227307 will wait for another day.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227317 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 16:11:35 +00:00
Tom Stellard
ff340f98e3 R600: Move DataLayout to AMDGPUTargetMachine
This is a follow up to r227113.

It is now required to use the amdgcn target for SI and newer GPUs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227316 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 16:04:26 +00:00
Tom Stellard
9813f8be5d R600: Use a Southern Islands GPU as the default for the amdgcn target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227314 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 15:38:42 +00:00
Hal Finkel
11e00a5be6 Correct the AggressiveAntiDepBreaker's handling of subregisters defining super registers
As the AggressiveAntiDepBreaker iterated backward through a scheduling region,
we must leave super registers live through subregister definitions so that all
relevant subregister definitions are renamed together. The problem was that we
were also discarding sub-register use locations as the sub-registers are
redefined. The result is that we'd rename the super register along with some,
but not all, subregister definitions.

  R0_D = {R0_L, R1_L}
  R0_L = {R0_S, R1_S}

  %R0_L<def> = TRLi9 16, pred:8, pred:%noreg
  %R1_L<def> = LSRLrr %R1_L<kill>, %R0_S, pred:8, pred:%noreg
  %R0_L<def> = LSRLrr %R2_L, %R0_S, pred:8, pred:%noreg, %R0_L<imp-use,kill>
  %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg
  %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg
  %R4_D<def> = ASRDrr %R0_D<kill>, %R6_S

  Anti:   %R4_D<def> = ASRDrr %R0_D<kill>, %R6_S
   Def Groups: R4_D=g213->g215(via R4_S)->g214(via R4_L)->g216(via R5_S)->g216(via R4_L)->g217(via R5_L)
   Use Groups: R0_D=g0->g218(last-use) R1_L->g219(last-use) R6_S=g204->g220(last-use)
  Anti:   %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg
   Def Groups: R0_L=g208->g209(via R0_S)->g218(via R0_D)->g210(via R1_S)->g210(via R0_D)
   Antidep reg: R0_L (real dependency)
   Use Groups: R0_L=g210->g224(last-use) R0_S->g225(last-use) R1_S->g226(last-use)
  Anti:   %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg
   Def Groups: R1_L=g219->g210(via R0_D)
   Antidep reg: R1_L (real dependency)
   Use Groups: R1_L=g210->g229(last-use)
  Anti:   %R0_L<def> = LSRLrr %R2_L, %R0_S, pred:8, pred:%noreg, %R0_L<imp-use,kill>
   Def Groups: R0_L=g224->g225(via R0_S)->g210(via R0_D)->g226(via R1_S)->g226(via R0_D)
   Antidep reg: R0_L Use Groups: R2_L=g192 R0_S=g226->g230(last-use) R0_L=g226->g231(last-use) R1_S->g232(last-use)
  Anti:   %R1_L<def> = LSRLrr %R1_L<kill>, %R0_S, pred:8, pred:%noreg
   Def Groups: R1_L=g229->g226(via R0_D)
   Antidep reg: R1_L Use Groups: R1_L=g226->g233(last-use) R0_S=g230
  Anti:   %R0_L<def> = TRLi9 16, pred:8, pred:%noreg
   Def Groups: R0_L=g231->g230(via R0_S)->g226(via R0_D)->g232(via R1_S)->g232(via R0_D)
   Antidep reg: R0_L
   Rename Candidates for Group g232:
    R0_D: elcInt64Regs :: R0_D R1_D R2_D R3_D R4_D R5_D R8_D R9_D R10_D R11_D R12_D R13_D R14_D R15_D R16_D R17_D R18_D R19_D R20_D R21_D R22_D R23_D R24_D R25_D
    R0_L: elcIntRegs :: R0_L R1_L R2_L R3_L R4_L R5_L R8_L R9_L R10_L R11_L R12_L R13_L R14_L R15_L R16_L R17_L R18_L R19_L R20_L R21_L R22_L R23_L R24_L R25_L
    R0_S: elcShrtRegs elcShrtRegs :: R0_S R1_S R2_S R3_S R4_S R5_S R8_S R9_S R10_S R11_S R12_S R13_S R14_S R15_S R16_S R17_S R18_S R19_S R20_S R21_S R22_S R23_S R24_S R25_S
   Find Registers: [R12_D: R12_D R12_L R12_S]
   Breaking anti-dependence edge on R0_L: R0_D->R12_D(1 refs) R0_L->R12_L(2 refs) R0_S->R12_S(2 refs)
   Use Groups:
  ...

  %R12_L<def> = TRLi9 16, pred:8, pred:%noreg
  %R1_L<def> = LSRLrr %R1_L<kill>, %R12_S, pred:8, pred:%noreg
  %R0_L<def> = LSRLrr %R2_L<kill>, %R12_S, pred:8, pred:%noreg, %R12_L<imp-use>
  %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg
  %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg
  %R4_D<def> = ASRDrr %R12_D<kill>, %R6_S

With this change, we now produce:

  Anti:   %R4_D<def> = ASRDrr %R0_D<kill>, %R6_S
   Def Groups: R4_D=g213->g215(via R4_S)->g214(via R4_L)->g216(via R5_S)->g216(via R4_L)->g217(via R5_L)
   Use Groups: R0_D=g0->g218(last-use) R1_L->g219(last-use) R6_S=g204->g220(last-use)
  Anti:   %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg
   Def Groups: R0_L=g208->g209(via R0_S)->g218(via R0_D)->g210(via R1_S)->g210(via R0_D)
   Antidep reg: R0_L (real dependency)
   Use Groups: R0_L=g210
  Anti:   %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg
   Def Groups: R1_L=g219->g210(via R0_D)
   Antidep reg: R1_L (real dependency)
   Use Groups: R1_L=g210
  Anti:   %R0_L<def> = LSRLrr %R2_L, %R0_S, pred:8, pred:%noreg, %R0_L<imp-use,kill>
   Def Groups: R0_L=g210->g210(via R0_D)->g210(via R0_D)
   Antidep reg: R0_L Use Groups: R2_L=g192 R0_S=g210 R0_L=g210
  Anti:   %R1_L<def> = LSRLrr %R1_L<kill>, %R0_S, pred:8, pred:%noreg
   Def Groups: R1_L=g210->g210(via R0_D)
   Antidep reg: R1_L Use Groups: R1_L=g210 R0_S=g210
  Anti:   %R0_L<def> = TRLi9 16, pred:8, pred:%noreg
   Def Groups: R0_L=g210->g210(via R0_D)->g210(via R0_D)
   Antidep reg: R0_L
   Rename Candidates for Group g210:
    R0_D: elcInt64Regs :: R0_D R1_D R2_D R3_D R4_D R5_D R8_D R9_D R10_D R11_D R12_D R13_D R14_D R15_D R16_D R17_D R18_D R19_D R20_D R21_D R22_D R23_D R24_D R25_D
    R0_L: elcIntRegs elcIntAIRegs elcIntRegs elcIntRegs elcIntRegs elcIntRegs :: R0_L R1_L R2_L R3_L R4_L R5_L R8_L R9_L R10_L R11_L R12_L R13_L R14_L R15_L R16_L R17_L R18_L R19_L R20_L R21_L R22_L R23_L R24_L R25_L
    R1_L: elcIntRegs elcIntRegs elcIntRegs elcIntRegs elcIntRegs :: R0_L R1_L R2_L R3_L R4_L R5_L R8_L R9_L R10_L R11_L R12_L R13_L R14_L R15_L R16_L R17_L R18_L R19_L R20_L R21_L R22_L R23_L R24_L R25_L
    R0_S: elcShrtRegs elcShrtRegs :: R0_S R1_S R2_S R3_S R4_S R5_S R8_S R9_S R10_S R11_S R12_S R13_S R14_S R15_S R16_S R17_S R18_S R19_S R20_S R21_S R22_S R23_S R24_S R25_S
   Find Registers: [R12_D: R12_D R12_L R13_L R12_S]
   Breaking anti-dependence edge on R0_L: R0_D->R12_D(1 refs) R0_L->R12_L(7 refs) R1_L->R13_L(5 refs) R0_S->R12_S(2 refs)
   Use Groups:
  ...

  %R12_L<def> = TRLi9 16, pred:8, pred:%noreg
  %R13_L<def> = LSRLrr %R13_L<kill>, %R12_S, pred:8, pred:%noreg
  %R12_L<def> = LSRLrr %R2_L<kill>, %R12_S<kill>, pred:8, pred:%noreg, %R12_L<imp-use,kill>
  %R13_L<def> = ANDLri %R13_L<kill>, 2047, pred:8, pred:%noreg
  %R12_L<def> = ANDLri %R12_L<kill>, 2047, pred:8, pred:%noreg
  %R4_D<def> = ASRDrr %R12_D, %R6_S, %R12_L<imp-def>, %R12_S<imp-def>, %R13_S<imp-def>

As demonstrated by this example, this is also somewhat unfortunate, because
there is actually no need to rename the super register in this case (it is
fully covered by later subregister definitions), but we don't seem to track
enough information here to exploit that either.

Thanks to Daniil Troshkov for reporting the issue. The debug outputs in this
commit message are from Daniil.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227311 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 14:44:14 +00:00
Michael Kuperstein
0906c8fc1c [X86] Reduce some 32-bit imuls into lea + shl
Reduce integer multiplication by a constant of the form k*2^c, where k is in {3,5,9} into a lea + shl. Previously it was only done for imulq on 64-bit platforms, but it makes sense for imull and 32-bit as well.

Differential Revision: http://reviews.llvm.org/D7196

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227308 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 14:08:22 +00:00
Michael Kuperstein
e5b95695ea [x32] Enable sibcall optimization on x32.
This includes two things:
1) Fix TCRETURNdi and TCRETURN64di patterns to check the right thing (LP64 as opposed to target bitness).
2) Allow LEA64_32 in MatchingStackOffset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227307 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 13:38:48 +00:00
Sean Silva
a8104c5ab0 [docs] Use slightly more proper .rst markup
Again, I'd like to emphasize to everyone that this sort of markup change
is *not* what you should be concerned about when writing docs. Focus on
*content*.

I applaud Chandler for focusing on the fantastic content of this new
section!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227305 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 10:36:41 +00:00
Sean Silva
a5f199122a [docs] [cleanup] No need for a comment around C++11 override
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227304 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 10:26:29 +00:00
Elena Demikhovsky
b9d3801cd2 AVX-512: Added FMA intrinsics with rounding mode
By Asaf Badouh and Elena Demikhovsky

Added special nodes for rounding: FMADD_RND, FMSUB_RND..
It will prevent merge between nodes with rounding and other standard nodes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227303 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 10:21:27 +00:00