Chris Lattner
56ecbf3013
SSE4 is apparently public now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36185 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 00:02:37 +00:00
Jeff Cohen
c398709525
In the event that some really old non-Intel or -AMD CPU is encountered...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36177 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 21:59:44 +00:00
Jeff Cohen
22114c319a
Before assuming that the original code didn't work for Athlon64, the person who
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replaced it with a FIXME should have determined what did work. Then he would have
realized that the code was in fact correct, and would have avoided breaking it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36173 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 21:48:58 +00:00
Anton Korobeynikov
bed2946a96
Removed tabs everywhere except autogenerated & external files. Add make
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target for tabs checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 18:10:23 +00:00
Chris Lattner
7c162645ae
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36028 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-14 23:06:09 +00:00
Chris Lattner
6c284d716e
Fix mmx paddq, add support for the 'y' register class, though it isn't tested.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35940 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-12 04:14:49 +00:00
Chris Lattner
a1b253f58e
Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35926 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 22:29:46 +00:00
Chris Lattner
b062000c23
done
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35884 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 05:34:00 +00:00
Bill Wendling
bb1ee05253
Add support for our first SSSE3 instruction "pmulhrsw".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35869 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10 22:10:25 +00:00
Chris Lattner
bae3bd7c19
new micro optzn
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35867 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10 21:14:01 +00:00
Chris Lattner
eb8c74ddf2
remove some dead hooks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35845 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 23:31:19 +00:00
Chris Lattner
b445d0cbb9
remove some dead target hooks, subsumed by isLegalAddressingMode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 22:27:04 +00:00
Chris Lattner
0f65cad57f
move a bunch of register constraints from being handled by
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getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint. This allows us to let the llvm register allocator
allocate, which gives us better code. For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:
_run_init_process:
subl $4, %esp
movl %ebx, (%esp)
xorl %ebx, %ebx
movl $11, %eax
movl %ebx, %ecx
movl %ebx, %edx
# InlineAsm Start
push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
# InlineAsm End
Now we get:
_run_init_process:
xorl %ecx, %ecx
movl $11, %eax
movl %ecx, %edx
# InlineAsm Start
push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
# InlineAsm End
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35804 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 05:49:22 +00:00
Chris Lattner
e5a24ec782
implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 values
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used with x constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35803 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 05:31:48 +00:00
Chris Lattner
ad043e85f8
implement CodeGen/X86/inline-asm-x-scalar.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35799 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 05:11:28 +00:00
Bill Wendling
71bfd11c67
Adding more MMX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35638 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 23:48:32 +00:00
Chris Lattner
8ceb0fd2d3
make a new missing features section
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35637 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 23:41:34 +00:00
Bill Wendling
92ca81601c
Updated
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35634 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 23:37:20 +00:00
Bill Wendling
c9c9d2d554
Changed to new MMX_ recipes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35617 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 06:18:31 +00:00
Bill Wendling
823efee633
Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35616 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 06:00:37 +00:00
Chris Lattner
3e9f1d09c0
fix breakage from last night, simplify code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35560 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-01 20:49:36 +00:00
Anton Korobeynikov
ad7baee241
Consistency with native compilers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35532 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31 13:11:52 +00:00
Bill Wendling
577c7d9dca
Fix comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35531 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31 09:36:12 +00:00
Bill Wendling
db5c993121
Match GCC's MMX calling convention.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35523 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31 01:03:53 +00:00
Chris Lattner
c9addb7488
implement the new addressing mode description hook.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35521 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 23:15:24 +00:00
Bill Wendling
e2501b303c
Add MMX calling conventions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35489 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 00:35:22 +00:00
Bill Wendling
03179060ee
Made this into a bug report: PR1286
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35439 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 19:07:34 +00:00
Anton Korobeynikov
f6e9353e1a
Oops :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35438 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 18:38:33 +00:00
Anton Korobeynikov
33bf8c44dd
Don't allow MatchAddress recurse too much. This trims exponential
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behaviour in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35437 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 18:36:33 +00:00
Chris Lattner
6ef3307062
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35435 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 18:17:19 +00:00
Chris Lattner
995f55036f
Compile CodeGen/X86/lea-3.ll:test2 to:
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_test3:
leaq (,%rdi,4), %rax
orq %rdi, %rax
ret
instead of:
_test2:
movq %rdi, %rax
shlq $2, %rax
orq %rdi, %rax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35434 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 18:12:31 +00:00
Chris Lattner
e9a61234ce
Dan pointed out that this is done, remove it!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35430 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 17:26:52 +00:00
Bill Wendling
a80d7bd665
Remove cruft I put in there...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35394 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 01:02:54 +00:00
Chris Lattner
f2177b89a1
Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the
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system assembler not groking legal instructions like "leal (,%esi,8), %ecx".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35393 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 00:58:40 +00:00
Bill Wendling
826f36ff80
Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35392 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 00:57:11 +00:00
Bill Wendling
6dc29ece6e
Add the "unpack low packed data" instructions. This should be the last of
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the MMX instructions that are needed...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35389 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 21:20:36 +00:00
Bill Wendling
ccc44add81
Fix so that pandn is emitted instead of an xor/and combo. Add integer
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comparison operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35385 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 20:22:40 +00:00
Bill Wendling
ab5b49d92e
Promote to v1i64 type...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35353 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 08:03:33 +00:00
Bill Wendling
aadcea33d1
Updated.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35352 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 07:55:58 +00:00
Bill Wendling
eebc8a1bc5
Add support for the v1i64 type. This makes better code for this:
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#include <mmintrin.h>
extern __m64 C;
void baz(__v2si *A, __v2si *B)
{
*A = C;
_mm_empty();
}
We get this:
_baz:
call "L1$pb"
"L1$pb":
popl %eax
movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
movq (%eax), %mm0
movl 4(%esp), %eax
movq %mm0, (%eax)
emms
ret
GCC gives us this:
_baz:
pushl %ebx
call L3
"L00000000001$pb":
L3:
popl %ebx
subl $8, %esp
movl L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
movl (%eax), %edx
movl 4(%eax), %ecx
movl 16(%esp), %eax
movl %edx, (%eax)
movl %ecx, 4(%eax)
emms
addl $8, %esp
popl %ebx
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35351 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 07:53:08 +00:00
Chris Lattner
4234f57fa0
switch TargetLowering::getConstraintType to take the entire constraint,
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not just the first letter. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:14:49 +00:00
Chris Lattner
1439352ece
Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35320 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:01:03 +00:00
Chris Lattner
188b9fe834
enforce the proper range for the i386 N constraint.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35319 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 01:57:35 +00:00
Chris Lattner
7cd5e07f3d
Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35318 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 01:44:57 +00:00
Anton Korobeynikov
3b5ee73a13
Autodetect MMX & SSE stuff for AMD processors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35292 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 23:46:48 +00:00
Bill Wendling
b8440a0c39
PR1260:
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Add final support to get the QT example to compile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35290 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 22:35:46 +00:00
Bill Wendling
02ced83ce7
We generate a shufflevector instruction, so we don't need the builtin
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intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35269 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 20:29:26 +00:00
Bill Wendling
a348c56fde
Support added for shifts and unpacking MMX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35266 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 18:42:45 +00:00
Dale Johannesen
fa4bce2b76
repair x86 performance, dejagnu problems from previous change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:51:52 +00:00
Dale Johannesen
aceaf5d26e
add generation of unnecessary push/pop around calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35241 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:16:39 +00:00