Commit Graph

708 Commits

Author SHA1 Message Date
Tom Stellard
0f2e653317 R600/SI: Expand all v8[if]32 operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201371 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-13 23:34:15 +00:00
Tom Stellard
9757ba1206 R600/SI: Add a pattern for i32 anyext
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201370 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-13 23:34:13 +00:00
Tom Stellard
130f271259 R600/SI: Completely Disable TypeRewriter on compute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201369 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-13 23:34:12 +00:00
Tom Stellard
1a52c2b25a R600/SI: Split global vector loads with more than 4 elements
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201368 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-13 23:34:10 +00:00
Benjamin Kramer
eee40f92a9 R600: Always implement both versions of isTruncateFree and add a sanity check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201222 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-12 10:17:54 +00:00
Matt Arsenault
69bc4ddf10 R600/SI: Fix assertion on infinite loops.
This isn't the most useful case to fix in the real world,
but bugpoint runs into this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201177 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-11 21:12:38 +00:00
Matt Arsenault
700bba297b R600: Implement isTruncateFree
Truncation is just accessing a subregister for any multiple of
the register size, so it's free.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201107 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-10 19:57:42 +00:00
Tom Stellard
42faffddb9 R600/SI: Initialize M0 and emit S_WQM_B64 whenever DS instructions are used
DS instructions that access local memory can only uses addresses that
are less than or equal to the value of M0.  When M0 is uninitialized,
then we experience undefined behavior.

This patch also changes the behavior to emit S_WQM_B64 on pixel shaders
no matter what kind of DS instruction is used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201097 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-10 16:58:30 +00:00
Tom Stellard
835f1c01bf R600/SI: Only use S_WQM_B64 in pixel shaders
This doesn't change any functionality, since we only have two shader
types (compute and pixel) that use local memory.  We're just changing
the logic to match the documentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201096 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-10 16:58:27 +00:00
Tom Stellard
226bd876c6 R600/SI: Add a MUBUF store pattern for Reg+Imm offsets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200935 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-06 18:36:41 +00:00
Tom Stellard
603cd56372 R600/SI: Add a MUBUF store pattern for Imm offsets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200934 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-06 18:36:39 +00:00
Tom Stellard
becac0f183 R600/SI: Add a MUBUF load pattern for Reg+Imm offsets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200933 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-06 18:36:38 +00:00
Tom Stellard
22274378d5 R600/SI: Use immediates offsets for SMRD instructions whenever possible
There was a problem with the old pattern, so we were copying some
larger immediates into registers when we could have been encoding
them in the instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200932 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-06 18:36:34 +00:00
Matt Arsenault
bb7bf85f3c Add address space argument to allowsUnalignedMemoryAccess.
On R600, some address spaces have more strict alignment
requirements than others.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200887 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-05 23:15:53 +00:00
Michel Danzer
cf4061a601 R600/SI: Add pattern for zero-extending i1 to i32
Fixes opencl-example if_* tests with radeonsi.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74469

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200830 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-05 09:48:05 +00:00
Duncan P. N. Exon Smith
483727da48 cleanup: scc_iterator consumers should use isAtEnd
No functional change.  Updated loops from:

    for (I = scc_begin(), E = scc_end(); I != E; ++I)

to:

    for (I = scc_begin(); !I.isAtEnd(); ++I)

for teh win.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200789 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-04 19:19:07 +00:00
Rafael Espindola
5e47632b8f Every target uses .align. Simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200782 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-04 18:39:51 +00:00
Tom Stellard
7d9ed1cac5 R600/SI: Expand i1 BR_CC
This fixes a crashes in the OpenCV test suite and also the scrypt
kernel in bfgminer.

I was unable to come up with a reduced test case for this.

https://bugs.freedesktop.org/show_bug.cgi?id=72785

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200776 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-04 17:18:43 +00:00
Tom Stellard
0c7a6b6477 R600/SI: Don't assume copies will be coalesced in SIFixSGPRCopies
There is no lit test for this, because it would be too big and
complicated, but it does fix a crash in the Arithm/Absdiff.* OpenCV test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200775 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-04 17:18:42 +00:00
Tom Stellard
83918a2ad2 R600/SI: Custom lower i64 ISD::SELECT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200774 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-04 17:18:40 +00:00
Tom Stellard
4ee42eaec9 R600: Enable vector fpow.
The OpenCL specs say: "The vector versions of the math functions operate
component-wise. The description is per-component."

Patch by: Jan Vesely

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200773 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-04 17:18:37 +00:00
Michel Danzer
de2e0bc366 R600/SI: Fix fneg for 0.0
V_ADD_F32 with source modifier does not produce -0.0 for this. Just
manipulate the sign bit directly instead.

Also add a pattern for (fneg (fabs ...)).

Fixes a bunch of bit encoding piglit tests with radeonsi.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200743 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-04 07:12:38 +00:00
Matt Arsenault
2a3e343d86 Add DEBUG_TYPE to SIAnnotateControlFlow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200720 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-03 22:58:05 +00:00
Matt Arsenault
b2abb9752e R600/SI: Fix insertelement with dynamic indices.
This didn't work for any integer vectors, and didn't
work with some sizes of float vectors. This should now
work with all sizes of float and i32 vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200619 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-02 00:05:35 +00:00
Rafael Espindola
9d96045528 Remove the last hasRawTextSupport call from R600.
There is nothing wrong with printing the disassembly section when printing
text. An hypothetical assembler would then produce a .o just like our
direct object emission produces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200583 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 22:14:06 +00:00
Rafael Espindola
b8f1606076 Replace another use with hasRawTextSupport+EmitRawText with emitRawComment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200582 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 22:08:19 +00:00
Rafael Espindola
f7af9eac1b Use emitRawComment to avoid a call to hasRawTextSupport.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200581 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 21:54:49 +00:00
David Woodhouse
eab5cc34c6 Delete MCSubtargetInfo data members from target MCCodeEmitter classes
The subtarget info is explicitly passed to the EncodeInstruction
method and we should use that subtarget info to influence any
encoding decisions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200350 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 23:13:25 +00:00
David Woodhouse
4faa861f19 Propagate MCSubtargetInfo through TableGen's getBinaryCodeForInstr()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200349 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 23:13:18 +00:00
David Woodhouse
2ddea4b44d Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200348 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 23:13:07 +00:00
David Woodhouse
4396f5d9d2 Change MCStreamer EmitInstruction interface to take subtarget info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200345 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 23:12:42 +00:00
Michel Danzer
f555fb410e R600/SI: Add pattern for truncating i32 to i1
Fixes half a dozen piglit tests with radeonsi.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200283 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 03:01:16 +00:00
Michel Danzer
7018cd5af7 R600/SI: Add intrinsic for BUFFER_LOAD_DWORD* instructions
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200196 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27 07:20:51 +00:00
Michel Danzer
b3bfe7f18c R600/SI: Add intrinsic for S_SENDMSG instruction
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200195 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27 07:20:44 +00:00
Rafael Espindola
888177e91b Add back spaces I missed in the conversion to emitRawComments.
Sorry about that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200171 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27 00:19:41 +00:00
Rafael Espindola
e881f38db6 Use emitRawComment instead of EmitRawText.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200170 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-27 00:16:00 +00:00
Rafael Espindola
550d791907 Pass a MCSubtargetInfo down to the TargetStreamer creation.
With this the target streamers will be able to know the target features that
are in use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200135 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-26 06:38:58 +00:00
Rafael Espindola
aa75693ea4 Construct the MCStreamer before constructing the MCTargetStreamer.
This has a few advantages:
* Only targets that use a MCTargetStreamer have to worry about it.
* There is never a MCTargetStreamer without a MCStreamer, so we can use a
  reference.
* A MCTargetStreamer can talk to the MCStreamer in its constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200129 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-26 06:06:37 +00:00
Juergen Ributzka
8346f147ab Add final and owerride keywords to TargetTransformInfo's subclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200021 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 18:22:59 +00:00
Alp Toker
ae43cab6ba Fix known typos
Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200018 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 17:20:08 +00:00
Tom Stellard
63875e620f R600: Remove successive JUMP in AnalyzeBranch when AllowModify is true
This fixes a crash in the OpenCV OpenCL test suite.

There is no lit test for this, because the test would be very large
and could easily be invalidated by changes to the scheduler
or other parts of the compiler.

Patch by:  Vincent Lejeune

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199919 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 18:49:34 +00:00
Tom Stellard
35f321dde5 R600: Disable the BFE pattern
This pattern uses an SDNodeXForm, which isn't being emitted for some
reason.  I can get it to work by attaching the PatLeaf that has the
XForm to the argument in the output pattern, but this results in an
immediate being used in a register operand, which the backend can't
handle yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199918 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 18:49:33 +00:00
Tom Stellard
cbf79028c3 R600: Correctly handle vertex fetch clauses the precede ENDIFs
The control flow finalizer would sometimes use an ALU_POP_AFTER
instruction before the vetex fetch clause instead of using a POP
instruction after it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199917 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 18:49:31 +00:00
Tom Stellard
01df2fa3c4 R600: Unconditionally unroll loops that contain GEPs with alloca pointers
Implement the getUnrollingPreferences() function for
AMDGPUTargetTransformInfo so that loops that do address calculations
on pointers derived from alloca are unconditionally unrolled.

Unrolling these loops makes it more likely that SROA will be able to
eliminate the allocas, which is a big win for R600 since memory
allocated by alloca (private memory) is really slow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199916 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 18:49:28 +00:00
Tom Stellard
7d3b9d96b6 R600: Recommit 199842: Add work-around for the CF stack entry HW bug
The unit test is now disabled on non-asserts builds.

The CF stack can be corrupted if you use CF_ALU_PUSH_BEFORE,
CF_ALU_ELSE_AFTER, CF_ALU_BREAK, or CF_ALU_CONTINUE when the number of
sub-entries on the stack is greater than or equal to the stack entry
size and sub-entries modulo 4 is either 0 or 3 (on cedar the bug is
present when number of sub-entries module 8 is either 7 or 0)

We choose to be conservative and always apply the work-around when the
number of sub-enries is greater than or equal to the stack entry size,
so that we can safely over-allocate the stack when we are unsure of the
stack allocation rules.

reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199905 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 16:18:02 +00:00
Tom Stellard
8a4f11e3b6 Revert "R600: Add work-around for the CF stack entry HW bug"
This reverts commit 35b8331cad6eb512a2506adbc394201181da94ba.

The -debug-only flag for llc doesn't appear to be available in
all build configurations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199845 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 22:20:54 +00:00
Tom Stellard
efa1355495 R600: Add work-around for the CF stack entry HW bug
The CF stack can be corrupted if you use CF_ALU_PUSH_BEFORE,
CF_ALU_ELSE_AFTER, CF_ALU_BREAK, or CF_ALU_CONTINUE when the number of
sub-entries on the stack is greater than or equal to the stack entry
size and sub-entries modulo 4 is either 0 or 3 (on cedar the bug is
present when number of sub-entries module 8 is either 7 or 0)

We choose to be conservative and always apply the work-around when the
number of sub-enries is greater than or equal to the stack entry size,
so that we can safely over-allocate the stack when we are unsure of the
stack allocation rules.

reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199842 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 21:55:46 +00:00
Tom Stellard
39210ac1c6 R600: Add some missing CF instruction definitions to the .td files.
reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199841 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 21:55:44 +00:00
Tom Stellard
5c0c884e42 R600: Refactor stack size calculation
reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199840 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 21:55:43 +00:00
Tom Stellard
f2194d3ab3 R600: CF_PUSH is the same on Evergreen and Cayman
reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199839 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 21:55:41 +00:00