..
InstPrinter
MCTargetDesc
CommentColumn is always 40. Simplify.
2014-01-16 07:04:11 +00:00
TargetInfo
AMDGPU.h
R600: Register AMDGPUCFGStructurizer pass
2013-12-11 17:51:47 +00:00
AMDGPU.td
R600: Recommit 199842: Add work-around for the CF stack entry HW bug
2014-01-23 16:18:02 +00:00
AMDGPUAsmPrinter.cpp
R600: Add stack size to .AMDGPUcsdata section
2014-01-22 21:55:35 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
R600: Take alignment into account when calculating the stack offset
2014-01-22 19:24:23 +00:00
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
AMDGPUInstructions.td
R600/SI: Fixing handling of condition codes
2013-11-22 23:07:58 +00:00
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp
AMDGPUISelLowering.cpp
R600: Add support for global addresses with constant initializers
2014-01-22 19:24:21 +00:00
AMDGPUISelLowering.h
R600: Add support for global addresses with constant initializers
2014-01-22 19:24:21 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
R600: Recommit 199842: Add work-around for the CF stack entry HW bug
2014-01-23 16:18:02 +00:00
AMDGPUSubtarget.h
R600: Recommit 199842: Add work-around for the CF stack entry HW bug
2014-01-23 16:18:02 +00:00
AMDGPUTargetMachine.cpp
[cleanup] Move the Dominators.h and Verifier.h headers into the IR
2014-01-13 09:26:24 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
R600: Unconditionally unroll loops that contain GEPs with alloca pointers
2014-01-23 18:49:28 +00:00
AMDILBase.td
AMDILCFGStructurizer.cpp
[PM] Pull the generic graph algorithms and data structures for dominator
2014-01-13 10:52:56 +00:00
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelLowering.cpp
AMDILRegisterInfo.td
CMakeLists.txt
LLVMBuild.txt
Makefile
Processors.td
R600: Recommit 199842: Add work-around for the CF stack entry HW bug
2014-01-23 16:18:02 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600: Correctly handle vertex fetch clauses the precede ENDIFs
2014-01-23 18:49:31 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td
R600: Add some missing CF instruction definitions to the .td files.
2014-01-22 21:55:44 +00:00
R600Intrinsics.td
R600ISelLowering.cpp
R600/SI: Add support for i8 and i16 private loads/stores
2014-01-22 19:24:14 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
Factor MI-Sched in preparation for post-ra scheduling support.
2013-12-28 21:56:47 +00:00
R600MachineScheduler.h
Factor MI-Sched in preparation for post-ra scheduling support.
2013-12-28 21:56:47 +00:00
R600OptimizeVectorRegisters.cpp
Re-sort all of the includes with ./utils/sort_includes.py so that
2014-01-07 11:48:04 +00:00
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
SIAnnotateControlFlow.cpp
[PM] Split DominatorTree into a concrete analysis result object which
2014-01-13 13:07:17 +00:00
SIDefines.h
SIFixSGPRCopies.cpp
SIInsertWaits.cpp
SIInstrFormats.td
SIInstrInfo.cpp
Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies.
2013-12-17 04:50:45 +00:00
SIInstrInfo.h
SIInstrInfo.td
R600/SI: Make private pointers be 32-bit.
2013-12-19 05:32:55 +00:00
SIInstructions.td
R600/SI: Make private pointers be 32-bit.
2013-12-19 05:32:55 +00:00
SIIntrinsics.td
SIISelLowering.cpp
R600: Add support for global addresses with constant initializers
2014-01-22 19:24:21 +00:00
SIISelLowering.h
SILowerControlFlow.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td
SISchedule.td
SITypeRewriter.cpp
Re-sort all of the includes with ./utils/sort_includes.py so that
2014-01-07 11:48:04 +00:00
