Commit Graph

18484 Commits

Author SHA1 Message Date
David Sehr
81ee0f7368 Add a test that .align directives on capable processors use long NOPs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176490 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 16:46:54 +00:00
Vincent Lejeune
cae6801b7d R600: Turn BUILD_VECTOR into Reg_Sequence
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176487 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 15:04:49 +00:00
Vincent Lejeune
f49cf1c320 R600: Use MUL_IEEE for trig/fdiv intrinsic
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176485 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 15:04:37 +00:00
NAKAMURA Takumi
a0a790b0b7 llvm/test/CodeGen/Mips/mips64-f128.ll: Add explicit -mtriple=mips64el-unknown-unknown to appease win32.
FIXME: Is it expected for win32 to affect mips targets?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176471 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 02:18:59 +00:00
NAKAMURA Takumi
466508bab1 llvm/test/CodeGen/Thumb/iabs.ll: Add explicit -mtriple=thumb-unknown-unknown to appease win32 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176470 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 02:18:52 +00:00
David Sehr
6c4265a541 The current X86 NOP padding uses one long NOP followed by the remainder in
one-byte NOPs.  If the processor actually executes those NOPs, as it sometimes
does with aligned bundling, this can have a performance impact.  From my
micro-benchmarks run on my one machine, a 15-byte NOP followed by twelve
one-byte NOPs is about 20% worse than a 15 followed by a 12.  This patch
changes NOP emission to emit as many 15-byte (the maximum) as possible followed
by at most one shorter NOP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176464 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 00:02:23 +00:00
Lang Hames
880e8c0ad4 Check isDiscardableIfUnused, rather than hasLocalLinkage, when bumping
GlobalValue linkage up to ExternalLinkage in the ExtractGV pass. This
prevents linkonce and linkonce_odr symbols from being DCE'd.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176459 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 22:40:44 +00:00
Akira Hatanaka
1ae08e0077 [mips] Print move instructions.
"move $4, $5" is printed instead of "or $4, $5, $zero".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176455 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 22:25:01 +00:00
Jack Carter
0b9675d631 Mips specific inline assembler constraint 'R'
'R' An address that can be sued in a non-macro load or store.
This patch includes a positive test case.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176452 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 21:33:15 +00:00
Eli Bendersky
75d0ad4215 Reapply r176381, writing the CHECKs in a more forgiving manner to account for
running llvm-objdump on Darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176443 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 18:20:31 +00:00
Preston Gurd
9a2cfffdb6 Bypass Slow Divides
* Only apply divide bypass optimization when not optimizing for size. 
* Fixed bug caused by constant for 0 value of type Int32,
  used dividend type to generate the constant instead.
* For atom x86-64 apply the divide bypass to use 16-bit divides instead of
  64-bit divides when operand values are small enough.
* Added lit tests for 64-bit divide bypass.

Patch by Tyler Nowicki!




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176442 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 18:13:57 +00:00
Jim Grosbach
7bf504c58f ARM: Creating a vector from a lane of another.
The VDUP instruction source register doesn't allow a non-constant lane
index, so make sure we don't construct a ARM::VDUPLANE node asking it to
do so.

rdar://13328063
http://llvm.org/bugs/show_bug.cgi?id=13963

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176413 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 20:16:24 +00:00
Arnold Schwaighofer
21c0aa74bd ARM NEON: Fix v2f32 float intrinsics
Mark them as expand, they are not legal as our backend does not match them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176410 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 19:38:33 +00:00
Nuno Lopes
b443a0aeac recommit r172363 & r171325 (reverted in r172756)
This adds minimalistic support for PHI nodes to llvm.objectsize() evaluation

fingers crossed so that it does break clang boostrap again..

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176408 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 11:36:24 +00:00
Arnold Schwaighofer
5f0d9dbdf4 X86 cost model: Adjust cost for custom lowered vector multiplies
This matters for example in following matrix multiply:

int **mmult(int rows, int cols, int **m1, int **m2, int **m3) {
  int i, j, k, val;
  for (i=0; i<rows; i++) {
    for (j=0; j<cols; j++) {
      val = 0;
      for (k=0; k<cols; k++) {
        val += m1[i][k] * m2[k][j];
      }
      m3[i][j] = val;
    }
  }
  return(m3);
}

Taken from the test-suite benchmark Shootout.

We estimate the cost of the multiply to be 2 while we generate 9 instructions
for it and end up being quite a bit slower than the scalar version (48% on my
machine).

Also, properly differentiate between avx1 and avx2. On avx-1 we still split the
vector into 2 128bits and handle the subvector muls like above with 9
instructions.
Only on avx-2 will we have a cost of 9 for v4i64.

I changed the test case in test/Transforms/LoopVectorize/X86/avx1.ll to use an
add instead of a mul because with a mul we now no longer vectorize. I did
verify that the mul would be indeed more expensive when vectorized with 3
kernels:

for (i ...)
   r += a[i] * 3;
for (i ...)
  m1[i] = m1[i] * 3; // This matches the test case in avx1.ll
and a matrix multiply.

In each case the vectorized version was considerably slower.

radar://13304919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 04:02:52 +00:00
Nadav Rotem
5290baacb8 PR14448 - prevent the loop vectorizer from vectorizing the same loop twice.
The LoopVectorizer often runs multiple times on the same function due to inlining.
When this happens the loop vectorizer often vectorizes the same loops multiple times, increasing code size and adding unneeded branches.
With this patch, the vectorizer during vectorization puts metadata on scalar loops and marks them as 'already vectorized' so that it knows to ignore them when it sees them a second time.

PR14448.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 01:33:49 +00:00
Michael Gottesman
aa1fa29423 Revert "Rewrite a test to count emitted instructions without using -stats"
This reverts commit aac7922b8f. I am reverting the
commit since it broke the phase 1 public buildbot for a few hours.

http://lab.llvm.org:8013/builders/clang-x86_64-darwin11-nobootstrap-RA/builds/2137

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176394 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-02 00:53:20 +00:00
Akira Hatanaka
ee767fe2d2 [mips] Fix inefficient code generation.
This patch eliminates the need to emit a constant move instruction when this
pattern is matched:

(select (setgt a, Constant), T, F)

The pattern above effectively turns into this:

(conditional-move (setlt a, Constant + 1), F, T)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176384 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 21:52:08 +00:00
Eli Bendersky
aac7922b8f Rewrite a test to count emitted instructions without using -stats
Also removed the comments of "should produce..." because they completely
don't match the actually produced output.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176381 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 21:34:37 +00:00
Akira Hatanaka
c3c3810f51 Set properties for f128 type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176378 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 21:11:44 +00:00
Eli Bendersky
df861b3ac4 Rewrite a test to check actual output rather than intermediate implementation
detail.

The was this test was written, it was relying on an implementation detail
(fixups) and hence was very brittle (relying, among other things, on the
exact ordering of statistics printed by MC).

The test was rewritten to check a more observable output difference. While it
doesn't cover 100% of the things the original test covered, it's a good
practice to write regression tests this way. If we want to check that
internal details and invariants hold, such tests should be expressed as unit
tests.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176377 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 20:54:00 +00:00
Edwin Vane
4385988d26 No need to force-create clang-tools-extra lit.site.cfg
The make (all) target takes care of creating lit configs and auto-generating
tests. The problem with the original 'lit.site.cfg' target is it's not
recursive and doesn't fully create everything necessary for testing
clang-tools-extra.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176374 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 19:58:58 +00:00
Michael Liao
2843222033 Add regression tests (WORKSFORME)
- These tests wont't crash on trunk but would be better to add them so that
  they don't break again in the future.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176369 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 19:23:37 +00:00
Chad Rosier
7590022f40 Generate an error message instead of asserting or segfaulting when we can't
handle indirect register inputs.
rdar://13322011

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176367 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 19:12:05 +00:00
Benjamin Kramer
5d79bb8770 LoopVectorize: Don't hang forever if a PHI only has skipped PHI uses.
Fixes PR15384.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176366 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 19:07:31 +00:00
Michael Liao
a6b20ced76 Fix PR10475
- ISD::SHL/SRL/SRA must have either both scalar or both vector operands
  but TLI.getShiftAmountTy() so far only return scalar type. As a
  result, backend logic assuming that breaks.
- Rename the original TLI.getShiftAmountTy() to
  TLI.getScalarShiftAmountTy() and re-define TLI.getShiftAmountTy() to
  return target-specificed scalar type or the same vector type as the
  1st operand.
- Fix most TICG logic assuming TLI.getShiftAmountTy() a simple scalar
  type.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176364 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 18:40:30 +00:00
Chad Rosier
b8f307b2d6 Add support for using non-pic code for arm and thumb1 when emitting the sjlj
dispatch code.  As far as I can tell the thumb2 code is behaving as expected.
I was able to compile and run the associated test case for both arm and thumb1.
rdar://13066352


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 18:30:38 +00:00
Christian Konig
5f58358c90 R600/SI: fix sampler tests after fixing wait insertions
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176359 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 17:39:05 +00:00
Jyotsna Verma
ef94c6c85e Hexagon: Add constant extender support framework.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 17:37:13 +00:00
Akira Hatanaka
aa49f35240 [mips] Remove unused option. Fix 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176330 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 02:17:02 +00:00
Akira Hatanaka
1f0aca857b [mips] Add the capability to search delay slot filling instructions in
successor basic blocks.

Currently this is off by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176329 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 02:03:51 +00:00
Akira Hatanaka
e760675b0e [mips] Add capability to search in the forward direction for instructions that
can fill the delay slot.

Currently, this is off by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176320 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 00:50:52 +00:00
Akira Hatanaka
a56f411961 [mips] Define class MemDefsUses.
This class tracks dependence between memory instructions using underlying
objects of memory operands. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176313 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 00:16:31 +00:00
Quentin Colombet
c5a4c25b87 Fix a bug in instcombine for fmul in fast math mode.
The instcombine recognized pattern looks like:
a = b * c
d = a +/- Cst
or
a = b * c
d = Cst +/- a

When creating the new operands for fadd or fsub instruction following the related fmul, the first operand was created with the second original operand (M0 was created with C1) and the second with the first (M1 with Opnd0).

The fix consists in creating the new operands with the appropriate original operand, i.e., M0 with Opnd0 and M1 with C1.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176300 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28 21:12:40 +00:00
Benjamin Kramer
8611d4449a Cost model support for lowered math builtins.
We make the cost for calling libm functions extremely high as emitting the
calls is expensive and causes spills (on x86) so performance suffers. We still
vectorize important calls like ceilf and friends on SSE4.1. and fabs.

Differential Revision: http://llvm-reviews.chandlerc.com/D466

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176287 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28 19:09:33 +00:00
Tim Northover
54a1cf75d2 AArch64: remove post-encoder method from FCMP (immediate) instructions.
The work done by the post-encoder (setting architecturally unused bits to 0 as
required) can be done by the existing operand that covers the "#0.0". This
removes at least one use of the discouraged PostEncoderMethod uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176261 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28 14:46:14 +00:00
Tim Northover
6ff20f205b AArch64: be more careful resorting to inefficient addressing for weak vars.
If an otherwise weak var is actually defined in this unit, it can't be
undefined at runtime so we can use normal global variable sequences (ADRP/ADD)
to access it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176259 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28 14:36:31 +00:00
Tim Northover
5366ab21f4 AArch64: don't drop GlobalAddress offset when handling extern_weak decls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176258 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28 14:36:24 +00:00
Tim Northover
279b9184c2 AArch64: Use cbnz instead of cmp/b.ne pair for atomic operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176253 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28 13:52:07 +00:00
Evgeniy Stepanov
5e81213969 [msan] Implement sanitize_memory attribute.
Shadow checks are disabled and memory loads always produce fully initialized
values in functions that don't have a sanitize_memory attribute. Value and
argument shadow is propagated as usual.

This change also updates blacklist behaviour to match the above.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176247 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28 11:25:14 +00:00
Renato Golin
4a4fb84d4b Corrections for XFAIL armv5 tests
Most of the tests that behave differently on llvm-arm-linux buildbot
did so becase the triple wasn't set correctly to armv5, so we can
revert most of the special behaviour added previously. Some tests
still need the special treatment, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176243 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28 10:05:10 +00:00
Manman Ren
21a08a1189 Debug Info: for static member variables, always put AT_MIPS_linkage_name to the
definition DIE (TAG_variable), and put AT_MIPS_linkage_name to TAG_member when
DarwinGDBCompat is true.

Darwin GDB needs AT_MIPS_linkage_name at both places to work.

Follow-up patch to r176143.
rdar://problem/13291234


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176220 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27 23:21:02 +00:00
Jim Grosbach
b302a4e6b5 ARM: FMA is legal only if VFP4 is available.
rdar://13306723

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176212 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27 21:31:12 +00:00
Tim Northover
d65dfd8342 ARM: permit full range of valid ADR immediates.
This fixes an issue where trying to assemlbe valid ADR instructions would cause
LLVM to hit a failed assertion.

Patch by Keith Walker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176189 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27 16:43:09 +00:00
Benjamin Kramer
2fe71f8f7e LoopVectorize: Vectorize math builtin calls.
This properly asks TargetLibraryInfo if a call is available and if it is, it
can be translated into the corresponding LLVM builtin. We don't vectorize sqrt()
yet because I'm not sure about the semantics for negative numbers. The other
intrinsic should be exact equivalents to the libm functions.

Differential Revision: http://llvm-reviews.chandlerc.com/D465

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176188 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27 15:24:19 +00:00
Meador Inge
8df7c39976 IR: Don't constant fold GEP bitcasts between different address spaces
PR15262 reported a bug where the following instruction:

  i8 getelementptr inbounds i8* bitcast ([4 x i8] addrspace(12)* @buf to i8*),
                                i32 2

was getting folded into:

  addrspace(12)* getelementptr inbounds ([4 x i8] addrspace(12)* @buf, i32 0,
                                        i32 2)

This caused instcombine to crash because the original instruction and
the folded instruction have different types.  The issue was fixed by
disallowing bitcasts between different address spaces to be folded away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176156 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27 02:26:42 +00:00
Manman Ren
5e5974f51a SelectionDAG: If llvm.donothing has a landingpad, we should clear
CurrentCallSite to avoid an assertion failure:
assert(MMI.getCurrentCallSite() == 0 && "Overlapping call sites!");

rdar://problem/13228754


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176154 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27 02:11:57 +00:00
Manman Ren
06df83c25a Debug Info: for static member variables, add AT_MIPS_linkage_name to the
definition DIE, to make old GDB happy.

We have a regression for old GDB when Clang uses DW_TAG_member to declare
static members inside a class, instead of DW_TAG_variable. This patch will fix
this regression.

rdar://problem/13291234


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176143 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27 00:02:32 +00:00
Michael Ilseman
616025007a Constant fold vector bitcasts of halves similarly to how floats and doubles are folded. Test case included.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176131 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 22:51:07 +00:00
Manman Ren
d61c840fcd Revert r176120 as it caused a failure at static-member.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176129 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 22:35:53 +00:00