Evan Cheng
|
6848be1a27
|
Change RET node to include signness information of the return values. i.e.
RET chain, value1, sign1, value2, sign2, ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-26 23:10:12 +00:00 |
|
Rafael Espindola
|
a1334cdfb2
|
On ARM, alignment is in bits
Add lr as a hard coded operand of bx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28494 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-26 10:56:17 +00:00 |
|
Rafael Espindola
|
2f99b6bd96
|
implement initial version of ARMAsmPrinter::printOperand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28470 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-25 12:57:06 +00:00 |
|
Rafael Espindola
|
c3c1a86aa0
|
port the ARM backend to use ISD::CALL instead of LowerCallTo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28469 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-25 11:00:18 +00:00 |
|
Evan Cheng
|
6a3d5a62f0
|
Assert if InflightSet is not cleared after instruction selecting a BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28459 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-25 00:24:28 +00:00 |
|
Evan Cheng
|
afe358e7d4
|
Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
non-deterministic behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-24 20:46:25 +00:00 |
|
Chris Lattner
|
d74ea2bbd8
|
Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov! This is a step towards closing PR786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-24 17:04:05 +00:00 |
|
Rafael Espindola
|
4b442b528a
|
implement minimal versions of
ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28431 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-23 02:48:20 +00:00 |
|
Owen Anderson
|
d988b32aba
|
Make all of the TargetMachine subclasses use the new string TargetData methods.
This is part of the on-going work on PR 761.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28414 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-20 00:24:56 +00:00 |
|
Rafael Espindola
|
dc124a234a
|
implement movri
add a stub LowerFORMAL_ARGUMENTS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28388 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-18 21:45:49 +00:00 |
|
Evan Cheng
|
0f3ac8d8d4
|
getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-18 00:12:58 +00:00 |
|
Evan Cheng
|
c01d497255
|
Remove PointerType from class Target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28368 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-17 21:20:27 +00:00 |
|
Rafael Espindola
|
1c8f0536b3
|
add an abort after every assert(0)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28310 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-15 22:34:39 +00:00 |
|
Rafael Espindola
|
7bc59bc395
|
added a skeleton of the ARM backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28301 91177308-0d34-0410-b5e6-96231b3b80d8
|
2006-05-14 22:18:28 +00:00 |
|