Commit Graph

623 Commits

Author SHA1 Message Date
Evan Cheng
65b2e3df0d Fix some test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46998 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-12 07:22:46 +00:00
Dale Johannesen
b3c4eb46d6 Alignment of struct containing vectors depends on
whether SSE is present, on Darwin anyway.  Make it
explicit.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46909 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-09 19:04:25 +00:00
Evan Cheng
5fd79d0560 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-08 21:20:40 +00:00
Evan Cheng
33663fc104 Added missing entries in X86 load / store folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46866 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-08 00:12:56 +00:00
Evan Cheng
be3bf42331 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-07 08:53:49 +00:00
Evan Cheng
a58891ff1e Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46776 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-05 22:50:29 +00:00
Chris Lattner
7cf9abff23 Add target triples to these so they don't fail on linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46496 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-29 06:26:07 +00:00
Chris Lattner
3bd39d4ca8 Implement some dag combines that allow doing fneg/fabs/fcopysign in integer
registers if used by a bitconvert or using a bitconvert.  This allows us to
avoid constant pool loads and use cheaper integer instructions when the
values come from or end up in integer regs anyway.  For example, we now 
compile CodeGen/X86/fp-in-intregs.ll to:

_test1:
	movl	$2147483648, %eax
	xorl	4(%esp), %eax
	ret
_test2:
	movl	$1065353216, %eax
	orl	4(%esp), %eax
	andl	$3212836864, %eax
	ret

Instead of:
_test1:
	movss	4(%esp), %xmm0
	xorps	LCPI2_0, %xmm0
	movd	%xmm0, %eax
	ret
_test2:
	movss	4(%esp), %xmm0
	andps	LCPI3_0, %xmm0
	movss	LCPI3_1, %xmm1
	andps	LCPI3_2, %xmm1
	orps	%xmm0, %xmm1
	movd	%xmm1, %eax
	ret

bitconverts can happen due to various calling conventions that require
fp values to passed in integer regs in some cases, e.g. when returning
a complex.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46414 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-27 17:42:27 +00:00
Chris Lattner
b8f43875c3 New test to verify that "merging 4 loads into a vec load" continues to work and
continues to infer alignment info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46403 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 20:06:45 +00:00
Chris Lattner
1329cb8d89 Infer alignment of loads and increase their alignment when we can tell they are
from the stack.  This allows us to compile stack-align.ll to:

_test:
	movsd	LCPI1_0, %xmm0
	movapd	%xmm0, %xmm1
***	andpd	4(%esp), %xmm1
	andpd	_G, %xmm0
	addsd	%xmm1, %xmm0
	movl	20(%esp), %eax
	movsd	%xmm0, (%eax)
	ret

instead of:

_test:
	movsd	LCPI1_0, %xmm0
**	movsd	4(%esp), %xmm1
**	andpd	%xmm0, %xmm1
	andpd	_G, %xmm0
	addsd	%xmm1, %xmm0
	movl	20(%esp), %eax
	movsd	%xmm0, (%eax)
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46401 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 19:45:50 +00:00
Chris Lattner
216f3f6522 remove a useless xfailed test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46400 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 19:35:46 +00:00
Bill Wendling
824a721560 If there's no instructions being emitted on X86 for a function, emit a
nop. Emit the nop directly for PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46398 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-26 09:03:52 +00:00
Chris Lattner
af723b9ae4 Add target-specific dag combines for FAND(x,0) and FOR(x,0). This allows
us to compile:

double test(double X) {
  return copysign(0.0, X);
}

into:

_test:
	andpd	LCPI1_0(%rip), %xmm0
	ret

instead of:
_test:
	pxor	%xmm1, %xmm1
	andpd	LCPI1_0(%rip), %xmm1
	movapd	%xmm0, %xmm2
	andpd	LCPI1_1(%rip), %xmm2
	movapd	%xmm1, %xmm0
	orpd	%xmm2, %xmm0
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-25 05:46:26 +00:00
Chris Lattner
d43d00cf3a Significantly simplify and improve handling of FP function results on x86-32.
This case returns the value in ST(0) and then has to convert it to an SSE
register.  This causes significant codegen ugliness in some cases.  For 
example in the trivial fp-stack-direct-ret.ll testcase we used to generate:

_bar:
	subl	$28, %esp
	call	L_foo$stub
	fstpl	16(%esp)
	movsd	16(%esp), %xmm0
	movsd	%xmm0, 8(%esp)
	fldl	8(%esp)
	addl	$28, %esp
	ret

because we move the result of foo() into an XMM register, then have to
move it back for the return of bar.

Instead of hacking ever-more special cases into the call result lowering code
we take a much simpler approach: on x86-32, fp return is modeled as always 
returning into an f80 register which is then truncated to f32 or f64 as needed.
Similarly for a result, we model it as an extension to f80 + return.

This exposes the truncate and extensions to the dag combiner, allowing target
independent code to hack on them, eliminating them in this case.  This gives 
us this code for the example above:

_bar:
	subl	$12, %esp
	call	L_foo$stub
	addl	$12, %esp
	ret

The nasty aspect of this is that these conversions are not legal, but we want
the second pass of dag combiner (post-legalize) to be able to hack on them.
To handle this, we lie to legalize and say they are legal, then custom expand
them on entry to the isel pass (PreprocessForFPConvert).  This is gross, but
less gross than the code it is replacing :)

This also allows us to generate better code in several other cases.  For 
example on fp-stack-ret-conv.ll, we now generate:

_test:
	subl	$12, %esp
	call	L_foo$stub
	fstps	8(%esp)
	movl	16(%esp), %eax
	cvtss2sd	8(%esp), %xmm0
	movsd	%xmm0, (%eax)
	addl	$12, %esp
	ret

where before we produced (incidentally, the old bad code is identical to what
gcc produces):

_test:
	subl	$12, %esp
	call	L_foo$stub
	fstpl	(%esp)
	cvtsd2ss	(%esp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	16(%esp), %eax
	movsd	%xmm0, (%eax)
	addl	$12, %esp
	ret

Note that we generate slightly worse code on pr1505b.ll due to a scheduling 
deficiency that is unrelated to this patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-24 08:07:48 +00:00
Chris Lattner
7323999b31 take these with a pr #
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46303 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-24 06:35:44 +00:00
Evan Cheng
2928650262 Let each target decide byval alignment. For X86, it's 4-byte unless the aggregare contains SSE vector(s). For x86-64, it's max of 8 or alignment of the type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46286 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-23 23:17:41 +00:00
Evan Cheng
2cbdd27305 SSE varargs arguments are passed in memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46262 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-22 23:26:53 +00:00
Dale Johannesen
9929207fde Test is correct again for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46172 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-18 19:53:31 +00:00
Chris Lattner
ddf89566a9 This commit changes:
1. Legalize now always promotes truncstore of i1 to i8. 
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
   X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
   safe.

The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:

_foo:
	fldt	20(%esp)
	fldt	4(%esp)
	faddp	%st(1)
	movl	36(%esp), %eax
	fstps	(%eax)
	ret

instead of:

_foo:
	subl	$4, %esp
	fldt	24(%esp)
	fldt	8(%esp)
	faddp	%st(1)
	fstps	(%esp)
	movl	40(%esp), %eax
	movss	(%esp), %xmm0
	movss	%xmm0, (%eax)
	addl	$4, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-17 19:59:44 +00:00
Evan Cheng
839b759c38 When a live virtual register is being clobbered by an implicit def, it is spilled
and the spill is its kill. However, if the local allocator has determined the
register has not been modified (possible when its value was reloaded), it would
not issue a restore. In that case, mark the last use of the virtual register as
kill.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46111 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-17 02:08:17 +00:00
Evan Cheng
02c4285643 Fixes a nasty dag combiner bug that causes a bunch of tests to fail at -O0.
It's not safe to use the two value CombineTo variant to combine away a dead load.
e.g. 
v1, chain2 = load chain1, loc
v2, chain3 = load chain2, loc
v3         = add v2, c 
Now we replace use of v1 with undef, use of chain2 with chain1.
ReplaceAllUsesWith() will iterate through uses of the first load and update operands:
v1, chain2 = load chain1, loc
v2, chain3 = load chain1, loc
v3         = add v2, c 
Now the second load is the same as the first load, SelectionDAG cse will ensure
the use of second load is replaced with the first load.
v1, chain2 = load chain1, loc
v3         = add v1, c
Then v1 is replaced with undef and bad things happen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46099 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-16 23:11:54 +00:00
Duncan Sands
339e14fbdc Trampoline support for x86-64. This looks like
it should work, but I have no machine to test
it on.  Committed because it will at least
cause no harm, and maybe someone can test it
for me!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-16 22:55:25 +00:00
Chris Lattner
f763288705 make sure to use a cpu that has sse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46060 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-16 06:32:02 +00:00
Chris Lattner
7ff79c2d9d My previous commit had an incomplete message, it should have been:
make the 'fp return in ST(0)' optimization smart enough to
look through token factor nodes.  THis allows us to compile 
testcases like CodeGen/X86/fp-stack-retcopy.ll into:

_carg:
	subl	$12, %esp
	call	L_foo$stub
	fstpl	(%esp)
	fldl	(%esp)
	addl	$12, %esp
	ret

instead of:

_carg:
	subl	$28, %esp
	call	L_foo$stub
	fstpl	16(%esp)
	movsd	16(%esp), %xmm0
	movsd	%xmm0, 8(%esp)
	fldl	8(%esp)
	addl	$28, %esp
	ret

Still not optimal, but much better and this is a trivial patch.  Fixing 
the rest requires invasive surgery that is is not llvm 2.2 material.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46054 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-16 05:56:59 +00:00
Chris Lattner
e07704fc84 verify x86 generates ud2 for llvm.trap
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46023 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-15 22:22:02 +00:00
Dale Johannesen
ef68e75618 Disable for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45881 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-11 20:47:33 +00:00
Duncan Sands
007f9847c4 Output sinl for a long double FSIN node, not sin.
Likewise fix up a bunch of other libcalls.  While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere.  This fixes 9 Ada ACATS failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45833 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-10 10:28:30 +00:00
Evan Cheng
9c9cec4372 Codegen improvement has reduced one spill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45814 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-10 02:54:40 +00:00
Evan Cheng
19107563af Special copy SUnit's do not have SDNode's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45787 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-09 23:01:55 +00:00
Evan Cheng
92b7c1d94e Fix sse2.psrl.w and sse2.psrl.q definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45772 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-09 02:16:44 +00:00
Chris Lattner
07649d9265 Make load->store deletion a bit smarter. This allows us to compile this:
void test(long long *P) { *P ^= 1; }

into just:

_test:
	movl	4(%esp), %eax
	xorl	$1, (%eax)
	ret

instead of code like this:

_test:
	movl	4(%esp), %ecx
        xorl    $1, (%ecx)
	movl	4(%ecx), %edx
	movl	%edx, 4(%ecx)
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45762 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-08 23:08:06 +00:00
Duncan Sands
2815cbb9c7 Crashes llc when using Chris's new legalization logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45758 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-08 21:51:53 +00:00
Nate Begeman
337c213c18 Update test to catch recent x86 insert regression and improvements
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45705 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 17:49:23 +00:00
Chris Lattner
e9d666e7fb fix this to use a valid triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45509 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-02 22:21:45 +00:00
Chris Lattner
e2620add35 verify that aligned common support doesn't break.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45495 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-02 19:48:24 +00:00
Chris Lattner
03c079d5fc One readme entry is done, one is really easy (Evan, want to investigate
eliminating the llvm.x86.sse2.loadl.pd intrinsic?), one shuffle optzn
may be done (if shufps is better than pinsw, Evan, please review), and
we already know about LICM of simple instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45407 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 19:31:47 +00:00
Chris Lattner
18f07f49c5 upgrade this test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45406 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 19:24:06 +00:00
Chris Lattner
63079f0757 Fold comparisons against a constant nan, and optimize ORD/UNORD
comparisons with a constant.  This allows us to compile isnan to:

_foo:
	fcmpu cr7, f1, f1
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 

instead of:

LCPI1_0:					;  float
	.space	4
_foo:
	lis r2, ha16(LCPI1_0)
	lfs f0, lo16(LCPI1_0)(r2)
	fcmpu cr7, f1, f0
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45405 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 08:37:08 +00:00
Chris Lattner
69bfbdfaee this xform is implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45404 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 08:19:39 +00:00
Chris Lattner
d60eedca01 Codegen:
as:

_bar:
	pushl	%esi
	subl	$8, %esp
	movl	16(%esp), %esi
	call	L_foo$stub
	fstps	(%esi)
	addl	$8, %esp
	popl	%esi
	#FP_REG_KILL
	ret

instead of:

_bar:
	pushl	%esi
	subl	$8, %esp
	movl	16(%esp), %esi
	call	L_foo$stub
	fstpl	(%esi)
	cvtsd2ss	(%esi), %xmm0
	movss	%xmm0, (%esi)
	addl	$8, %esp
	popl	%esi
	#FP_REG_KILL
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45401 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 06:57:38 +00:00
Chris Lattner
112dedc520 avoid going through a stack slot to convert from fpstack to xmm reg
if we are just going to store it back anyway.  This improves things 
like:
double foo();
void bar(double *P) { *P = foo(); }



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45399 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 06:41:28 +00:00
Chris Lattner
8d2a922814 one fewer uncond branch with my codegenprepare hack for single-mbb backedges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45360 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-26 17:23:47 +00:00
Evan Cheng
636e5a216c Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45167 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-18 19:38:14 +00:00
Evan Cheng
beec823d4b FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45157 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-18 08:42:10 +00:00
Evan Cheng
7a831ce85f Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45058 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-15 03:00:47 +00:00
Evan Cheng
152804e9c1 Fix ctlz and cttz. llvm definition requires them to return number of bits in of the src type when value is zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45029 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-14 08:30:15 +00:00
Evan Cheng
18efe269b1 Implement ctlz and cttz with bsr and bsf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45024 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-14 02:13:44 +00:00
Evan Cheng
f9785f92b6 Be extra careful with extension use optimation. Now turned on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44981 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-13 03:32:53 +00:00
Evan Cheng
1314b00cf2 Fold some and + shift in x86 addressing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44970 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-13 00:43:27 +00:00
Evan Cheng
6e141fd048 Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 23:12:09 +00:00