Commit Graph

13700 Commits

Author SHA1 Message Date
Chris Lattner
7ff7e67458 Ask legalize to promote all vector shuffles to be v16i8 instead of having to
handle all 4 PPC vector types.   This simplifies the matching code and allows
us to eliminate a bunch of patterns.  This also adds cases we were missing,
such as CodeGen/PowerPC/vec_splat.ll:splat_h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27400 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 17:25:31 +00:00
Chris Lattner
4352cc9e21 * Add supprot for SCALAR_TO_VECTOR operations where the input needs to be
promoted/expanded (e.g. SCALAR_TO_VECTOR from i8/i16 on PPC).
* Add support for targets to request that VECTOR_SHUFFLE nodes be promoted
  to a canonical type, for example, we only want v16i8 shuffles on PPC.
* Move isShuffleLegal out of TLI into Legalize.
* Teach isShuffleLegal to allow shuffles that need to be promoted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27399 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 17:23:26 +00:00
Chris Lattner
1f239300d3 Signed shr by a constant is not the same as sdiv by 2^k
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27395 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 06:11:42 +00:00
Evan Cheng
21760460b9 cmpps / cmppd encoding bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27393 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 03:04:07 +00:00
Chris Lattner
08da55eeff Constant fold bitconvert(undef)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27391 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 01:02:22 +00:00
Evan Cheng
6e96740c6c Compact some intrinsic definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27388 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 00:10:53 +00:00
Chris Lattner
684ad7702f Plug in the byte and short splats
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27387 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 00:05:13 +00:00
Chris Lattner
b68314480d Revert accidentally committed hunks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27386 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 23:58:04 +00:00
Chris Lattner
01cae0799d Make sure to mark unsupported SCALAR_TO_VECTOR operations as expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27385 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 23:55:43 +00:00
Evan Cheng
97ac5fadb7 Some SSE1 intrinsics: min, max, sqrt, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27384 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 23:49:17 +00:00
Chris Lattner
0aab36f5b2 revert previous patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27383 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 23:14:49 +00:00
Evan Cheng
20e3ed102b Use movlpd to: store lower f64 extracted from v2f64.
Use movhpd to: store upper f64 extracted from v2f64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27382 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 22:30:54 +00:00
Chris Lattner
4f91a4c497 Force use of a frame-pointer if there is anything on the stack that is aligned
more than the OS keeps the stack aligned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27381 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 22:03:29 +00:00
Chris Lattner
4672f71ac4 The stack alignment is now computed dynamically, just verify it is correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 21:39:57 +00:00
Chris Lattner
7dca8e2d73 Remove unused method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27379 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 21:39:03 +00:00
Evan Cheng
11e15b38e9 - More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc.
- Some bug fixes and naming inconsistency fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27377 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 20:53:28 +00:00
Chris Lattner
630ebaf1f2 Align vectors to the size in bytes, not bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27376 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 19:28:50 +00:00
Chris Lattner
97c2073270 Add a missing check, this fixes UnitTests/Vector/sumarray.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27375 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 17:29:28 +00:00
Chris Lattner
a4c5d8c6b4 Add a missing check, which broke a bunch of vector tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 17:21:50 +00:00
Chris Lattner
c461a51234 Add the full set of min/max instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27372 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 15:58:28 +00:00
Andrew Lenharth
f87e7931fd support x * (c1 + c2) where c1 and c2 are pow2s. special case for c2 == 4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27370 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 04:19:17 +00:00
Andrew Lenharth
afe3f49815 mul by const conversion sequences. more coming soon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27368 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 03:18:59 +00:00
Andrew Lenharth
cf4fb61f6c back this out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27367 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 03:16:50 +00:00
Andrew Lenharth
50a0d426e8 This should be a win of every arch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27364 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 21:42:45 +00:00
Andrew Lenharth
ccd9f98bcb This makes McCat/12-IOtest go 8x faster or so
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27363 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 21:08:39 +00:00
Andrew Lenharth
ed5d1afffb This will be needed soon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27362 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 20:13:57 +00:00
Chris Lattner
220d2b89d6 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27360 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 07:20:00 +00:00
Chris Lattner
bbe77de450 Inform the dag combiner that the predicate compares only return a low bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27359 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 06:26:07 +00:00
Chris Lattner
1b5232a937 relax assertion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27358 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 06:19:46 +00:00
Chris Lattner
1482b5fc7a Allow targets to compute masked bits for intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27357 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 06:15:09 +00:00
Chris Lattner
350bec0fb9 Add a little dag combine to compile this:
int %AreSecondAndThirdElementsBothNegative(<4 x float>* %in) {
entry:
        %tmp1 = load <4 x float>* %in           ; <<4 x float>> [#uses=1]
        %tmp = tail call int %llvm.ppc.altivec.vcmpgefp.p( int 1, <4 x float> < float 0x7FF8000000000000, float 0.000000e+00, float 0.000000e+00, float 0x7FF8000000000000 >, <4 x float> %tmp1 )           ; <int> [#uses=1]
        %tmp = seteq int %tmp, 0                ; <bool> [#uses=1]
        %tmp3 = cast bool %tmp to int           ; <int> [#uses=1]
        ret int %tmp3
}

into this:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        lvx v0, 0, r3
        lvx v1, r5, r4
        vcmpgefp. v0, v1, v0
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        mtspr 256, r2
        blr

instead of this:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        lvx v0, 0, r3
        lvx v1, r5, r4
        vcmpgefp. v0, v1, v0
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        xori r3, r3, 1
        cntlzw r3, r3
        srwi r3, r3, 5
        mtspr 256, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27356 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 06:11:11 +00:00
Chris Lattner
4132afb0d2 vector casts of casts are eliminable. Transform this:
%tmp = cast <4 x uint> %tmp to <4 x int>                ; <<4 x int>> [#uses=1]
        %tmp = cast <4 x int> %tmp to <4 x float>               ; <<4 x float>> [#uses=1]

into:

        %tmp = cast <4 x uint> %tmp to <4 x float>              ; <<4 x float>> [#uses=1]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27355 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 05:43:13 +00:00
Chris Lattner
a3124a3d1e vector casts never reinterpret bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27354 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 05:40:28 +00:00
Chris Lattner
a1c3538537 Allow transforming this:
%tmp = cast <4 x uint>* %testData to <4 x int>*         ; <<4 x int>*> [#uses=1]
        %tmp = load <4 x int>* %tmp             ; <<4 x int>> [#uses=1]

to this:

        %tmp = load <4 x uint>* %testData               ; <<4 x uint>> [#uses=1]
        %tmp = cast <4 x uint> %tmp to <4 x int>                ; <<4 x int>> [#uses=1]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27353 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 05:37:12 +00:00
Chris Lattner
82ed58f9c4 Turn altivec lvx/stvx intrinsics into loads and stores. This allows the
elimination of one load from this:

int AreSecondAndThirdElementsBothNegative( vector float *in ) {
#define QNaN 0x7FC00000
const vector unsigned int testData = (vector unsigned int)( QNaN, 0, 0, QNaN );
vector float test = vec_ld( 0, (float*) &testData );
return ! vec_any_ge( test, *in );
}

Now generating:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        addi r6, r1, -16
        lvx v0, r5, r4
        stvx v0, 0, r6
        lvx v1, 0, r3
        vcmpgefp. v0, v0, v1
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        xori r3, r3, 1
        cntlzw r3, r3
        srwi r3, r3, 5
        mtspr 256, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27352 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 05:30:25 +00:00
Chris Lattner
02b72556d7 Remove done item
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27351 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 05:28:54 +00:00
Chris Lattner
4aab2f4ab5 Implement promotion for EXTRACT_VECTOR_ELT, allowing v16i8 multiplies to work with PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27349 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 05:06:04 +00:00
Chris Lattner
c55bfd0265 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27348 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:59:11 +00:00
Chris Lattner
bc70cf8be9 Implement the Expand action for binary vector operations to break the binop
into elements and operate on each piece.  This allows generic vector integer
multiplies to work on PPC, though the generated code is horrible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27347 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:57:31 +00:00
Chris Lattner
e58a780166 Intrinsics that just load from memory can be treated like loads: they don't
have to serialize against each other.  This allows us to schedule lvx's
across each other, for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27346 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:41:14 +00:00
Chris Lattner
7224f84c15 Adjust to change in Intrinsics.gen interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27344 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:35:01 +00:00
Chris Lattner
edab1b9133 Constant fold all of the vector binops. This allows us to compile this:
"vector unsigned char mergeLowHigh = (vector unsigned char)
( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 );
vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));"

aka:

void %test2(<16 x sbyte>* %P) {
  store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P
  ret void
}

into this:

_test2:
        mfspr r2, 256
        oris r4, r2, 32768
        mtspr 256, r4
        li r4, lo16(LCPI2_0)
        lis r5, ha16(LCPI2_0)
        lvx v0, r5, r4
        stvx v0, 0, r3
        mtspr 256, r2
        blr

instead of this:

_test2:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI2_0)
        lis r5, ha16(LCPI2_0)
        vspltisb v0, 8
        lvx v1, r5, r4
        vxor v0, v1, v0
        stvx v0, 0, r3
        mtspr 256, r2
        blr

... which occurs here:
http://developer.apple.com/hardware/ve/calcspeed.html


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27343 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:25:57 +00:00
Chris Lattner
5e46a19ec8 Add a new -view-legalize-dags command line option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27342 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 03:07:27 +00:00
Chris Lattner
6258fb2592 Implement constant folding of bit_convert of arbitrary constant vbuild_vector nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27341 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 02:53:43 +00:00
Chris Lattner
5e08a11039 These entries already exist
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27340 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 02:51:27 +00:00
Chris Lattner
97d23335ad Add some missing node names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27339 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 02:41:18 +00:00
Chris Lattner
5295122b0d New note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27337 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 01:47:20 +00:00
Chris Lattner
4460f4058f Constant fold casts from things like <4 x int> -> <4 x uint>, likewise int<->fp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27336 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 01:38:28 +00:00
Chris Lattner
541f91b17c Custom lower all BUILD_VECTOR's so that we can compile vec_splat_u8(8) into
"vspltisb v0, 8" instead of a constant pool load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27335 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 00:43:36 +00:00
Chris Lattner
f8814cf8b8 Prefer larger register classes over smaller ones when a register occurs in
multiple register classes.  This fixes PowerPC/2006-04-01-FloatDoubleExtend.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27334 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 00:24:45 +00:00
Chris Lattner
3805dea3fe add valuemapper support for inline asm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27332 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01 23:17:11 +00:00
Chris Lattner
c3837d4917 Implement vnot using VNOR instead of using 'vspltisb v0, -1' and vxor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27331 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01 22:41:47 +00:00
Chris Lattner
ae1ab3989c Fix InstCombine/2006-04-01-InfLoop.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27330 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01 22:05:01 +00:00
Chris Lattner
64daab56c2 Fold A^(B&A) -> (B&A)^A
Fold (B&A)^A == ~B & A

This implements InstCombine/xor.ll:test2[56]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27328 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01 08:03:55 +00:00
Chris Lattner
60a05cc118 Fix Transforms/IndVarsSimplify/2006-03-31-NegativeStride.ll and
PR726 by performing consistent signed division, not consistent unsigned
division when evaluating scev's.  Do not touch udivs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27326 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01 04:48:52 +00:00
Chris Lattner
eaa7c06d86 ADd a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27324 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01 04:08:29 +00:00
Chris Lattner
6e6b0da303 If we can look through vector operations to find the scalar version of an
extract_element'd value, do so.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27323 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 23:01:56 +00:00
Chris Lattner
348ba3f9bf Shrinkify some more intrinsic definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27322 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 22:41:56 +00:00
Evan Cheng
67d3d4c085 An entry about packed type alignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27321 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 22:35:14 +00:00
Chris Lattner
6cea814f2c Pull operand asm string into base class, shrinkifying intrinsic definitions.
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27320 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 22:34:05 +00:00
Evan Cheng
e668bdaa52 TargetData.cpp::getTypeInfo() was returning alignment of element type as the
alignment of a packed type. This is obviously wrong. Added a workaround that
returns the size of the packed type as its alignment. The correct fix would
be to return a target dependent alignment value provided via TargetLowering
(or some other interface).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27319 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 22:33:42 +00:00
Chris Lattner
f1d0c623c6 Delete identity shuffles, implementing CodeGen/Generic/vector-identity-shuffle.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27317 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 22:16:43 +00:00
Chris Lattner
b5c4d17a6c Fix 80 column violations :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27315 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 21:57:36 +00:00
Evan Cheng
653159f4aa Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed
INSERT_VECTOR_ELT to insert a 16-bit value in a 128-bit vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27314 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 21:55:24 +00:00
Evan Cheng
4b1734f70b Added support for SSE3 horizontal ops: haddp{s|d} and hsub{s|d}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 21:29:33 +00:00
Chris Lattner
7376a5e129 fix a pasto
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 21:19:06 +00:00
Chris Lattner
a9cb441642 Add vperm support for all datatypes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27307 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 20:00:35 +00:00
Chris Lattner
e3fea5a1c1 Rearrange code a bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27306 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 19:52:36 +00:00
Chris Lattner
32a988a095 Add, sub and shuffle are legal for all vector types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27305 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 19:48:58 +00:00
Evan Cheng
b067a1e7e6 Add support to use pextrw and pinsrw to extract and insert a word element
from a 128-bit vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27304 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 19:22:53 +00:00
Evan Cheng
1eda6e7924 Add vector_extract and vector_insert nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27303 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 19:21:16 +00:00
Chris Lattner
9f7e127133 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27302 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 19:00:22 +00:00
Chris Lattner
6fa4cdf92e constant fold extractelement with undef operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27301 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 18:31:40 +00:00
Chris Lattner
1f13c88939 extractelement(undef,x) -> undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27300 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 18:25:14 +00:00
Chris Lattner
c741ea424a Do not endian swap split vector loads. This fixes UnitTests/Vector/sumarray-dbl on PPC.
Now all UnitTests/Vector/* tests pass on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27299 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 18:22:37 +00:00
Chris Lattner
d9731af75b Do not endian swap the operands to a store if the operands came from a vector.
This fixes UnitTests/Vector/simple.c with altivec.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27298 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 18:20:46 +00:00
Chris Lattner
29cd7db310 Remove dead *extloads. This allows us to codegen vector.ll:test_extract_elt
to:

test_extract_elt:
        alloc r3 = ar.pfs,0,1,0,0
        adds r8 = 12, r32
        ;;
        ldfs f8 = [r8]
        mov ar.pfs = r3
        br.ret.sptk.many rp

instead of:

test_extract_elt:
        alloc r3 = ar.pfs,0,1,0,0
        adds r8 = 28, r32
        adds r9 = 24, r32
        adds r10 = 20, r32
        adds r11 = 16, r32
        ;;
        ldfs f6 = [r8]
        ;;
        ldfs f6 = [r9]
        adds r8 = 12, r32
        adds r9 = 8, r32
        adds r14 = 4, r32
        ;;
        ldfs f6 = [r10]
        ;;
        ldfs f6 = [r11]
        ldfs f8 = [r8]
        ;;
        ldfs f6 = [r9]
        ;;
        ldfs f6 = [r14]
        ;;
        ldfs f6 = [r32]
        mov ar.pfs = r3
        br.ret.sptk.many rp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27297 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 18:10:41 +00:00
Chris Lattner
e4b953939c Delete dead loads in the dag. This allows us to compile
vector.ll:test_extract_elt2 into:

_test_extract_elt2:
        lfd f1, 32(r3)
        blr

instead of:

_test_extract_elt2:
        lfd f0, 56(r3)
        lfd f0, 48(r3)
        lfd f0, 40(r3)
        lfd f1, 32(r3)
        lfd f0, 24(r3)
        lfd f0, 16(r3)
        lfd f0, 8(r3)
        lfd f0, 0(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27296 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 18:06:18 +00:00
Chris Lattner
1597221eac Implement PromoteOp for VEXTRACT_VECTOR_ELT. Thsi fixes
Generic/vector.ll:test_extract_elt on non-sse X86 systems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27294 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 17:55:51 +00:00
Chris Lattner
2ae2e98d4f Scalarized vector stores need not be legal, e.g. if the vector element type
needs to be promoted or expanded.  Relegalize the scalar store once created.
This fixes CodeGen/Generic/vector.ll:test1 on non-SSE x86 targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27293 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 17:37:22 +00:00
Jeff Cohen
4c5701d271 Fix build breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27292 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 07:22:05 +00:00
Chris Lattner
33497cc992 note to self: *save* file, then check it in
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27291 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 06:04:53 +00:00
Chris Lattner
4468c22458 Implement an item from the readme, folding vcmp/vcmp. instructions with
identical instructions into a single instruction.  For example, for:

void test(vector float *x, vector float *y, int *P) {
  int v = vec_any_out(*x, *y);
  *x = (vector float)vec_cmpb(*x, *y);
  *P = v;
}

we now generate:

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v0, v1, v0
        mfcr r4, 2
        stvx v0, 0, r3
        rlwinm r3, r4, 27, 31, 31
        xori r3, r3, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr

instead of:

_test:
        mfspr r2, 256
        oris r6, r2, 57344
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v2, v1, v0
        mfcr r4, 2
***     vcmpbfp v0, v1, v0
        rlwinm r4, r4, 27, 31, 31
        stvx v0, 0, r3
        xori r3, r4, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr

Testcase here: CodeGen/PowerPC/vcmp-fold.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27290 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 06:02:07 +00:00
Chris Lattner
9492151e32 compactify some more instruction definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27288 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 05:38:32 +00:00
Chris Lattner
5f7b01963f Compactify comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27287 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 05:32:57 +00:00
Chris Lattner
a17b1557ad Lower vector compares to VCMP nodes, just like we lower vector comparison
predicates to VCMPo nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27285 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 05:13:27 +00:00
Chris Lattner
8f5d316ff2 These are done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27284 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 04:53:21 +00:00
Chris Lattner
536a9d5ea5 Add a new method to verify intrinsic function prototypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27282 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 04:46:47 +00:00
Chris Lattner
7e02151ce2 Make sure to pass enough values to phi nodes when we are dealing with
decimated vectors.  This fixes UnitTests/Vector/sumarray-dbl.c


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27280 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 02:12:18 +00:00
Chris Lattner
70c2a61e0a Significantly improve handling of vectors that are live across basic blocks,
handling cases where the vector elements need promotion, expansion, and when
the vector type itself needs to be decimated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27278 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 02:06:56 +00:00
Chris Lattner
a6c9de4293 Was returning the wrong type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27277 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 01:50:09 +00:00
Chris Lattner
36f4b0da9d Mark INSERT_VECTOR_ELT as expand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27276 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 01:48:55 +00:00
Evan Cheng
33e85ca7b6 Expand all INSERT_VECTOR_ELT (obviously bad) for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27275 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 01:30:39 +00:00
Evan Cheng
eb0b461cf4 Expand INSERT_VECTOR_ELT to store vec, sp; store elt, sp+k; vec = load sp;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27274 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 01:27:51 +00:00
Chris Lattner
79227e2906 Modify the TargetLowering::getPackedTypeBreakdown method to also return the
unpromoted element type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27273 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 00:46:36 +00:00
Evan Cheng
fb47a9b1c8 Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27272 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 00:33:57 +00:00
Evan Cheng
ef698ca30d Ok for vector_shuffle mask to contain undef elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27271 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 00:30:29 +00:00
Chris Lattner
dc87929609 Implement TargetLowering::getPackedTypeBreakdown
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27270 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 00:28:56 +00:00
Chris Lattner
8768bf6ee3 Add the rest of the vmul instructions and the vmulsum* instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27268 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-30 23:39:06 +00:00
Chris Lattner
3c4f4e9f1b Use a new tblgen feature to significantly shrinkify instruction definitions that
directly correspond to intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27266 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-30 23:21:27 +00:00