Commit Graph

676 Commits

Author SHA1 Message Date
Chris Lattner
67f453aae7 Finish implementing a readme entry: when inserting an i64 variable
into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle.  This allows us to compile
vec_set-B.ll into:

_test3:
	movl	$1234567, %eax
	andl	4(%esp), %eax
	movd	%eax, %xmm0
	ret

instead of:

_test3:
	subl	$28, %esp
	movl	$1234567, %eax
	andl	32(%esp), %eax
	movl	%eax, (%esp)
	movl	$0, 4(%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48090 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 05:42:06 +00:00
Chris Lattner
62098040a1 Implement a readme entry, compiling
#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:
	movl	$1, %eax
	movd	%eax, %xmm0
	ret

instead of a constant pool load.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48063 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 01:05:04 +00:00
Chris Lattner
da8de316a8 make this test harder
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48061 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 00:30:06 +00:00
Chris Lattner
f3ba434781 Teach SD some vector identities, allowing us to compile vec_set-9 into:
_test3:
	movd	%rdi, %xmm1
	#IMPLICIT_DEF %xmm0
	punpcklqdq	%xmm1, %xmm0
	ret

instead of:

_test3:
	#IMPLICIT_DEF %rax
	movd	%rax, %xmm0
	movd	%rdi, %xmm1
	punpcklqdq	%xmm1, %xmm0
	ret

This is still not ideal.  There is no reason to two xmm regs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48058 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 23:43:36 +00:00
Evan Cheng
27b7db549e Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 00:58:38 +00:00
Chris Lattner
d1108222fd mark frem as expand for all legal fp types on x86, regardless of whether
we're using SSE or not.  This fixes PR2122.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-07 06:36:32 +00:00
Chris Lattner
ec4a5672f8 Generalize FP constant shrinking optimization to apply to any vt
except ppc long double.  This allows us to shrink constant pool
entries for x86 long double constants, which in turn allows us to
use flds/fldl instead of fldt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47938 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 06:48:13 +00:00
Evan Cheng
6fd599fa69 Add a target lowering hook to control whether it's worthwhile to compress fp constant.
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47931 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 01:30:59 +00:00
Evan Cheng
a26e0fe1b4 Really fix the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47882 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 08:01:56 +00:00
Evan Cheng
6a2286a045 Fix broken test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47881 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 07:59:13 +00:00
Evan Cheng
f92dd28ab7 Add PR1501 test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47874 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 00:47:45 +00:00
Chris Lattner
767486b1d5 Evan implemented these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47828 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-02 18:05:14 +00:00
Evan Cheng
e526d8a955 Set to default: x86 no longer fold and into test if it has more than one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47711 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 07:46:38 +00:00
Evan Cheng
21b3f31f8f Fix a bug in dead spill slot elimination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 19:57:11 +00:00
Chris Lattner
e416b7d407 actually run llc, thanks Dan :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 17:46:54 +00:00
Evan Cheng
be680dcea6 Don't track max alignment during stack object allocations since they can be deleted later. Let PEI compute it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47668 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 10:04:56 +00:00
Chris Lattner
b09916bdfb Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead
stack slot and store if the  SINT_TO_FP is actually legal.  This allows
us to compile:

double a(double b) {return (unsigned)b;}

to:

_a:
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	ret

instead of:

_a:
	subq	$8, %rsp
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	addq	$8, %rsp
	ret

crazy.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47660 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 05:57:41 +00:00
Chris Lattner
d0ba2a9c14 Compile x86-64-and-mask.ll into:
_test:
	movl	%edi, %eax
	ret

instead of:

_test:
        movl    $4294967295, %ecx
        movq    %rdi, %rax
        andq    %rcx, %rax
        ret

It would be great to write this as a Pat pattern that used subregs 
instead of a 'pseudo' instruction, but I don't know how to do that
in td files.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47658 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 05:47:54 +00:00
Evan Cheng
d36531249a Spiller now remove unused spill slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47657 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 03:04:06 +00:00
Evan Cheng
4d535cadf1 Enable -coalescer-commute-instrs by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47623 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 20:40:22 +00:00
Dan Gohman
d4cf992230 Avoid aborting on invalid shift counts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47612 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 18:50:50 +00:00
Eli Friedman
9ec8095485 Fix for pr2093: direct operands aren't necessarily addresses, so don't
try to simplify them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47610 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 18:37:49 +00:00
Evan Cheng
c886c460e4 This is possible:
vr1 = extract_subreg vr2, 3
...
vr3 = extract_subreg vr1, 2
The end result is vr3 is equal to vr2 with subidx 2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47592 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 08:03:41 +00:00
Evan Cheng
9bf12b5583 Fix PR2076. CodeGenPrepare now sinks address computation for inline asm memory
operands into inline asm block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47589 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 02:42:37 +00:00
Evan Cheng
249ded3fa8 Rematerialization logic was overly conservative when it comes to loads from fixed stack slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47529 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 03:38:34 +00:00
Evan Cheng
aaa1d4265e Update test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47527 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 02:57:25 +00:00
Evan Cheng
18924f11c1 Remat of pic loads are now on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47525 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 02:08:30 +00:00
Evan Cheng
28c9fc630c Really. Why doesn't every arch support MMX?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47513 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 00:56:14 +00:00
Evan Cheng
530d47f4f2 Test case for PR2082.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47501 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 20:38:49 +00:00
Evan Cheng
d8850a512e Allow re-materialization of pic load (controlled by -remat-pic-load for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47476 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 09:25:47 +00:00
Chris Lattner
d2b1fb27df copy mmx values from/to memory with GPRs on x86-32
instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47474 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 05:18:04 +00:00
Chris Lattner
149a4e56fc Start using GPR's to copy around mmx value instead of mmx regs.
GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47470 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 02:09:43 +00:00
Chris Lattner
0fe71e9bb1 Treat clobber operands like early clobbers: if we have
any, we force sdisel to do all regalloc for an asm.  This
leads to gross but correct codegen.

This fixes the rest of PR2078.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47454 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-21 19:43:13 +00:00
Tanya Lattner
33eefffb2b Remove llvm-upgrade and update tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47432 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-21 07:42:26 +00:00
Chris Lattner
7cbeb2431c Fix a (harmless) but where vregs were added to the used reg lists for
inline asms.

Fix PR2078 by marking aliases of registers used when a register is 
marked used.  This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-21 04:55:52 +00:00
Evan Cheng
359026e39a XFAIL this for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47355 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-20 02:38:58 +00:00
Chris Lattner
b476f98ca9 this test requires sse2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47331 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 18:07:46 +00:00
Chris Lattner
ce2bcc8839 Don't fold and's into test instructions if they have multiple uses.
This compiles test-nofold.ll into:

_test:
	movl	$15, %ecx
	andl	4(%esp), %ecx
	testl	%ecx, %ecx
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

instead of:
_test:
	movl	4(%esp), %eax
	movl	%eax, %ecx
	andl	$15, %ecx
	testl	$15, %eax
	movl	$42, %eax
	cmove	%ecx, %eax
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47330 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 17:37:35 +00:00
Chris Lattner
22c31769fb rename tests to avoid a test- prefix when they aren't related to the test instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 17:33:52 +00:00
Nick Lewycky
7ad3920e31 Don't spew stats to stderr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47308 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 03:11:47 +00:00
Nick Lewycky
9103ba1003 Fix up the run line for this new test.
llc: for the -info-output-file option:  requires a value!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47306 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 02:58:36 +00:00
Evan Cheng
acfab64631 New test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47302 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 02:09:58 +00:00
Evan Cheng
efec751a1b - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47290 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-18 23:04:32 +00:00
Dan Gohman
339ffedca9 Don't mark scalar integer multiplication as Expand on x86, since x86
has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.

This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47277 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-18 17:55:26 +00:00
Andrew Lenharth
22c5c1b2df llvm.memory.barrier, and impl for x86 and alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-16 01:24:58 +00:00
Evan Cheng
de7f560744 This test is not interesting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-15 23:06:21 +00:00
Chris Lattner
423be627e6 Fix a miscompilation from Dan's recent apintification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 18:48:56 +00:00
Chris Lattner
8b0cb7bcc6 This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47106 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 05:39:46 +00:00
Evan Cheng
5598b70a78 Fix test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47102 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 01:32:53 +00:00
Chris Lattner
86ca3cacc5 In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this
node as soon as we create it in SDISel.  Previously we would lower it in
legalize.  The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them.  This causes us to miss some optimizations because 
datatype expansion also happens here.

Exposing the loads early allows us to do optimizations on them.  For example
we now compile arg-cast.ll to:

_foo:
	movl	$2147483647, %eax
	andl	8(%esp), %eax
	ret

where we previously produced:

_foo:
	subl	$12, %esp
	movsd	16(%esp), %xmm0
	movsd	%xmm0, (%esp)
	movl	$2147483647, %eax
	andl	4(%esp), %eax
	addl	$12, %esp
	ret

It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47054 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 07:39:09 +00:00