6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-02 02:55:35 +00:00
Code Issues Projects Releases Wiki Activity
72,309 Commits 39 Branches 0 Tags 277 MiB
6db2c2fe21
Commit Graph

18358 Commits

Author SHA1 Message Date
Stuart Hastings
6db2c2fe21 Revert 131467 due to buildbot complaint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131469 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 16:59:46 +00:00
Stuart Hastings
504421e327 Fix an obscure issue in X86_64 parameter passing: if a tiny byval is 
passed as the fifth parameter, insure it's passed correctly (in R9).
rdar://problem/6920088


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131467 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 16:45:55 +00:00
Nadav Rotem
86694297ff Fix a bug in PerformEXTRACT_VECTOR_ELTCombine. The code created an ADD SDNode 
with two different types, in cases where the index and the ptr had different
types.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131461 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 08:31:57 +00:00
Eric Christopher
6abb7bae10 Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131459 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 08:16:14 +00:00
Eric Christopher
c324f72ab7 Support XOR and AND optimization with no return value. 
Finishes off rdar://8470697


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131458 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 08:10:18 +00:00
Eric Christopher
811c2b7110 Couple less magic numbers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131457 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 07:50:41 +00:00
Eric Christopher
8102bf003e Make this code a little less magic number laden. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131456 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 07:47:55 +00:00
Chris Lattner
5d4718b1c7 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131455 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 07:22:33 +00:00
Eli Friedman
c93943b6fe Back out r131444 and r131438; they're breaking nightly tests. I'll look into 
it more tomorrow.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131451 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 02:36:59 +00:00
Eli Friedman
cdc9a20561 Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131438 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 00:13:47 +00:00
Jim Grosbach
0c72076190 Kill some dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131431 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 22:24:07 +00:00
Eli Friedman
57f4b03621 Remove dead code. Fix associated test to use FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131424 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 21:28:22 +00:00
Eli Friedman
482feb33b2 Make fast-isel work correctly s/uadd.with.overflow intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131420 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 21:06:17 +00:00
Rafael Espindola
6469540adf sets bit 0 of the function address of thumb function in .symtab 
("T is 1 if the target symbol S has type STT_FUNC and the
symbol addresses a Thumb instruction ;it is 0 otherwise."
from "ELF for the ARM Architecture" 4.7.1.2)

Patch by Koan-Sin Tan!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131406 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 16:17:21 +00:00
Eli Friedman
d0118a2371 Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic from the x86 code to the generic code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131332 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-14 00:47:51 +00:00
Rafael Espindola
a3f88148e6 Don't produce a vmovntdq if we don't have AVX support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131330 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-14 00:30:01 +00:00
Eli Friedman
d25d16c901 Zap useless code; this hasn't done anything useful since fast-isel switched to being bottom-up (a very long time ago). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131329 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-14 00:19:32 +00:00
Julien Lerouge
eea6c95d5d Fix a source of non determinism in FindUsedTypes, use a SetVector instead of a 
set.

rdar://9423996


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131283 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-13 05:20:42 +00:00
Akira Hatanaka
01765eb0a1 Fix setting of isCommutable flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131233 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-12 17:42:08 +00:00
Eric Christopher
c493a1f317 Turn this into a table, this will make more sense shortly. 
Part of rdar://8470697


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131200 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-11 21:44:58 +00:00
Owen Anderson
18901d63bf Fix encoding of Thumb BLX register instructions. Patch by Koan-Sin Tan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131189 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-11 17:00:48 +00:00
Nadav Rotem
4301222525 Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a splat vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131179 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-11 08:12:09 +00:00
Bill Wendling
61512ba251 Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp 
intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131174 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-11 01:11:55 +00:00
Eric Christopher
b38fe4b52d Optimize atomic lock or that doesn't use the result value. 
Next up: xor and and.

Part of rdar://8470697


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131171 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-10 23:57:45 +00:00
Eric Christopher
988397dcbc Refactor lock versions of binary operators to be a little less 
cut and paste.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131139 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-10 18:36:16 +00:00
Jason W Kim
f4351ceb93 First cut at getting debugging support for ARM/MC/ELF/.o 
DWARF stuff also gets fixed up by ELFARMAsmBackend::ApplyFixup(),
but the offset is not guaranteed to be mod 4 == 0 as in text/data. 




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131137 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-10 18:07:25 +00:00
Justin Holewinski
0d10970789 PTX: add PTX 2.3 setting in PTX sub-target. 
Patch by Wei-Ren Chen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131123 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-10 12:32:11 +00:00
Eric Christopher
49ac3d7da9 Fix td file comments for Mips. 
Patch by Liu <proljc@gmail.com>!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131086 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-09 18:16:46 +00:00
Mon P Wang
183c627d89 Fixed MC encoding for index_align for VLD1/VST1 (single element from one lane) for size 32 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131085 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-09 17:47:27 +00:00
Benjamin Kramer
f51190b697 X86: Add a bunch of peeps for add and sub of SETB. 
"b + ((a < b) ? 1 : 0)" compiles into
	cmpl	%esi, %edi
	adcl	$0, %esi
instead of
	cmpl	%esi, %edi
	sbbl	%eax, %eax
	andl	$1, %eax
	addl	%esi, %eax

This saves a register, a false dependency on %eax
(Intel's CPUs still don't ignore it) and it's shorter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131070 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-08 18:36:07 +00:00
Jakob Stoklund Olesen
ca66226e7e Eliminate the ARM sub-register indexes that are not needed by the sources. 
Tablegen will invent its own names for these indexes, and the register file is a
bit simpler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131059 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-07 21:22:42 +00:00
Eric Christopher
33c110e602 Fix the non-MC encoding of pkhbt and pkhtb. 
Patch by Stephen Hines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131045 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-07 04:37:27 +00:00
Akira Hatanaka
325e66d81a 1. Keep lines in 80 columns. 
2. Remove unused function.
3. Correct indentation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131028 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-06 22:11:29 +00:00
Eli Friedman
fc5d305597 Make the logic for determining function alignment more explicit. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131012 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-06 20:34:06 +00:00
Rafael Espindola
f2b0423200 Dead code elimination. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130984 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-06 14:56:22 +00:00
Justin Holewinski
ab0145d2a9 PTX: add PTX 2.3 language target 
Patch by Wei-Ren Chen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130980 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-06 11:40:36 +00:00
Rafael Espindola
108709d4d1 Move PPC Linux to CFI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130951 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-05 21:34:33 +00:00
Eli Friedman
297015913a PR9848: pandn is not commutative. 
No test because I can't think of any way to write one that won't break quickly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130932 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-05 17:45:31 +00:00
Bill Wendling
087aad44cb Remove a flag that would set the ".eh" symbol as .globl. MachO was the only one 
who used this flag, and it now emits CFI and doesn't emit this anymore. All
other targets left this flag "false".
<rdar://problem/8486371>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130918 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-05 06:49:15 +00:00
Jakob Stoklund Olesen
4f5de9bb40 Fix X86RegisterInfo::getMatchingSuperRegClass for sub_8bit_hi. 
It is OK for B to be any GR8_ABCD_H superclass, the returned register class
doesn't have to map surjectively onto B.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130892 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 23:54:54 +00:00
Jakob Stoklund Olesen
21f7902a89 Implement SystemZRegisterInfo::getMatchingSuperRegClass to enable cross-class joins. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130857 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 19:02:04 +00:00
Devang Patel
64915dec28 Do not emit location expression size twice. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130854 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 19:00:57 +00:00
Rafael Espindola
6af0b762db Fix cmake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130850 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 18:46:56 +00:00
Akira Hatanaka
6b7588e6c4 Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130847 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 17:54:27 +00:00
Jakob Stoklund Olesen
b89383aeff Implement MSP430RegisterInfo::getMatchingSuperRegClass to enable cross-class 
coalescing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130814 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 01:01:36 +00:00
Jakob Stoklund Olesen
2944b4fe05 Mark ultra-super-registers QQQQ as call-clobbered instead of the D sub-registers. 
LiveVariables doesn't understand that clobbering D0 and D1 completely overwrites
Q0, so if Q0 is live-in to a function, its live range will extend beyond a
function call that only clobbers D0 and D1. This shows up in the
ARM/2009-11-01-NeonMoves test case.

LiveVariables should probably implement the much stricter rules for physreg
liveness that RAFast imposes - a physreg is killed by the first use of any
alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130801 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 22:31:24 +00:00
Bill Wendling
9493a285d1 Replace the "movnt" intrinsics with a native store + nontemporal metadata bit. 
<rdar://problem/8460511>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130791 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 21:11:17 +00:00
Akira Hatanaka
9ff1b9b259 Fix function MipsRegisterInfo::getRegisterNumbering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130774 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 18:41:54 +00:00
Bob Wilson
e1a56ae747 Temporarily disable use of divmod compiler-rt functions for iOS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130766 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 17:33:22 +00:00
Bruno Cardoso Lopes
0a69ba309f Fold ARM coprocessor intrinsics patterns into the instructions defs whenever 
it's possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130764 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 17:29:29 +00:00