Eli Friedman
6e6014cfb3
Revert r130454; apparently this doesn't actually work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130462 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 23:55:14 +00:00
Eli Friedman
2f7fcd7198
Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
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rdar://problem/9338332 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 23:03:25 +00:00
Daniel Dunbar
f86500bc4f
Target/X86/MC: Add an option for disabling arith relaxation, for my own testing
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purposes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130438 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 21:23:31 +00:00
Eli Friedman
d227eedf82
fast-isel sret calls, try 2. We actually do need to do something on x86-32. rdar://problem/9303592 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130429 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 20:19:12 +00:00
Eli Friedman
6cf31b0a1a
Revert r130348; causing buildbot issues on x86-32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 18:06:10 +00:00
Eric Christopher
7a20a37bac
Be more layout aware here and swap the successor and branch condition
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if it means we get a fallthrough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 16:52:09 +00:00
Rafael Espindola
bfa27cc5d7
Add a getExprForPersonalitySymbol method to MCAsmInfo. Use it when
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converting the symbol passed to .cfi_personality into bytes is the file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130400 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 16:09:09 +00:00
Eric Christopher
8f232d307a
Let the immediate leaf pattern take transforms and switch the signed
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immediate patterns in arm to using the pattern.
Handles rdar://9299434
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130386 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 05:49:04 +00:00
Chris Lattner
4c19b17a17
move PR9803 to this readme.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130385 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 05:33:16 +00:00
Devang Patel
c26f5447e3
Teach dwarf writer to handle complex address expression for .debug_loc entries.
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This fixes clang generated blocks' variables' debug info.
Radar 9279956.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 02:22:40 +00:00
Justin Holewinski
2d525c5532
PTX: support for select_cc and fixes for setcc
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- expansion of SELECT_CC into SETCC
- force SETCC result type to i1
- custom selection for handling i1 using SETCC
Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:19:56 +00:00
Justin Holewinski
9c86533347
PTX: support for select
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- selection of SELP instruction
- new selp.ll test
Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130357 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:19:55 +00:00
Justin Holewinski
ef342fc751
PTX: mov fix and rounding correction for cvt
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- fix typo in MOV
- correct fp rounding on CVT
- new cvt.ll test
Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:19:54 +00:00
Justin Holewinski
8ff9cd203f
PTX: support for fneg
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- selection of FNEG instruction
- new fneg.ll test
Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130355 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:19:53 +00:00
Justin Holewinski
4fea05acfa
PTX: support for zext loads and trunc stores
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- expansion of EXTLOAD and TRUNCSTORE instructions
Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:19:52 +00:00
Justin Holewinski
5a3cb924c6
PTX: support for bitwise operations on predicates
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- selection of bitwise preds (AND, OR, XOR)
- new bitwise.ll test
Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:19:51 +00:00
Justin Holewinski
9583a86ba8
PTX: patch to AsmPrinter
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- immediate value cast as long not int
- handles initializer for constant array
Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130352 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:19:50 +00:00
Eli Friedman
8211a6a61d
fast-isel sret. We actually don't need to do anything special on x86. :) rdar://problem/9303592 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 23:58:52 +00:00
Rafael Espindola
60246a9622
Remove unnecessary argument.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130343 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 23:17:57 +00:00
Rafael Espindola
7afec9cc0f
Rename getPersonalityPICSymbol to getCFIPersonalitySymbol, document it, and
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give it a bit more responsibility. Also implement it for MachO.
If hacked to use cfi, 32 bit MachO will produce
.cfi_personality 155, L___gxx_personality_v0$non_lazy_ptr
and 64 bit will produce
.cfi_presonality ___gxx_personality_v0
The general idea is that .cfi_personality gets passed the final symbol. It is
up to codegen to produce it if using indirect representation (like 32 bit
MachO), but it is up to MC to decide which relocations to create.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 23:08:15 +00:00
Eli Friedman
2790ba8e5a
Make the fast-isel code for literal 0.0 a bit shorter/faster, since 0.0 is common. rdar://problem/9303592 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 22:41:55 +00:00
Kevin Enderby
e23aea28f9
Fix a bug in the case that there is no add or subtract symbol and the offset
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value is zero so it does not add a NULL expr operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130330 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 21:02:27 +00:00
Devang Patel
0be77dff11
Revert r130178. It turned out to be not the optimal path to emit complex location expressions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130326 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 20:29:27 +00:00
Eli Friedman
d5089a9794
Refactor out code to fast-isel a memcpy operation with a small constant
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length. (I'm planning to use this to implement byval.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130274 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 01:45:07 +00:00
Eli Friedman
547eb4fd56
Fix an edge case involving branches in fast-isel on x86.
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rdar://problem/9303306 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130272 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 01:34:27 +00:00
Chris Lattner
325eeb1cd7
Transform: "icmp eq (trunc (lshr(X, cst1)), cst" to "icmp (and X, mask), cst"
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when X has multiple uses. This is useful for exposing secondary optimizations,
but the X86 backend isn't ready for this when X has a single use. For example,
this can disable load folding.
This is inching towards resolving PR6627.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 20:18:20 +00:00
Jim Grosbach
f7da8821b4
ARM and Thumb2 support for atomic MIN/MAX/UMIN/UMAX loads.
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rdar://9326019
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130234 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 19:44:18 +00:00
Jakob Stoklund Olesen
c9e5015dec
Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on register class inflation.
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The hook will be used by the register allocator when recomputing register
classes after removing constraints.
Thumb1 code doesn't allow anything larger than tGPR, and x86 needs to ensure
that the spill size doesn't change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 18:52:33 +00:00
Rafael Espindola
b28d4f152e
Print all the moves at a given label instead of just the first one.
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Remove previous DwarfCFI hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130187 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 03:58:56 +00:00
Devang Patel
0c99861836
Let dwarf writer allocate extra space in the debug location expression. This space, if requested, will be used for complex addresses of the Blocks' variables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130178 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 00:12:46 +00:00
Chris Lattner
ed0318eab8
add a missed bitfield instcombine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130137 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25 18:44:26 +00:00
Akira Hatanaka
f48eb533d5
Lower BlockAddress node when relocation-model is static.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25 17:10:45 +00:00
Chandler Carruth
a4a2a03c31
Remove some hard coded CR-LFs. Some of these were the entire files, one of
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these was just one line of a file. Explicitly set the eol-style property on the
files to try and ensure this fix stays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25 07:11:23 +00:00
Duncan Sands
d03bcc1364
Fix comment typo. Noticed by Liu.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130120 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25 06:21:43 +00:00
Sebastian Redl
dac4b9267b
Fix Target/ARM/Thumb1FrameLowering.h header guard.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-24 15:47:01 +00:00
Jay Foad
ddcdcc8863
Remove unused STL header includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23 19:53:52 +00:00
Benjamin Kramer
20115617d4
Silence an overzealous uninitialized variable warning from GCC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23 08:21:06 +00:00
Andrew Trick
1c3af779fc
Thumb2 and ARM add/subtract with carry fixes.
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Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>.
t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the
assembly printer correctly prints the 's' suffix.
Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags.
Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS.
Fixes ARM SBC lowering to check for live carry (potential bug).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23 03:55:32 +00:00
Andrew Trick
5adfba283d
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23 03:24:11 +00:00
Johnny Chen
597fa65373
Disassembly of A8.6.59 LDR (literal) Encoding T1 (16-bit thumb instruction) should
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print out ldr, not ldr.n.
rdar://problem/9267772
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 19:12:43 +00:00
Benjamin Kramer
e7cf062537
DAGCombine: fold "(zext x) == C" into "x == (trunc C)" if the trunc is lossless.
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On x86 this allows to fold a load into the cmp, greatly reducing register pressure.
movzbl (%rdi), %eax
cmpl $47, %eax
->
cmpb $47, (%rdi)
This shaves 8k off gcc.o on i386. I'll leave applying the patch in README.txt to Chris :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 18:47:44 +00:00
Devang Patel
0a6ea83f39
Add asserts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 16:44:29 +00:00
Benjamin Kramer
b20a8fc8a6
X86: Try to use a smaller encoding by transforming (X << C1) & C2 into (X & (C2 >> C1)) & C1. (Part of PR5039)
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This tends to happen a lot with bitfield code generated by clang. A simple example for x86_64 is
uint64_t foo(uint64_t x) { return (x&1) << 42; }
which used to compile into bloated code:
shlq $42, %rdi ## encoding: [0x48,0xc1,0xe7,0x2a]
movabsq $4398046511104, %rax ## encoding: [0x48,0xb8,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00]
andq %rdi, %rax ## encoding: [0x48,0x21,0xf8]
ret ## encoding: [0xc3]
with this patch we can fold the immediate into the and:
andq $1, %rdi ## encoding: [0x48,0x83,0xe7,0x01]
movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
shlq $42, %rax ## encoding: [0x48,0xc1,0xe0,0x2a]
ret ## encoding: [0xc3]
It's possible to save another byte by using 'andl' instead of 'andq' but I currently see no way of doing
that without making this code even more complicated. See the TODOs in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 15:30:40 +00:00
Evan Cheng
db6cbe1ff1
In Thumb2 mode, lower frame indix references to:
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add <rd>, sp, #<imm8>
ldr <rd>, [sp, #<imm8>]
When the offset from sp is multiple of 4 and in range of 0-1020.
This saves code size by utilizing 16-bit instructions.
rdar://9321541
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129971 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 01:42:52 +00:00
Rafael Espindola
abf9af60ad
Compute the size of the FDE encoding instead of hard coding it. Update
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X8664_ELFTargetObjectFile::getFDEEncoding to match reality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 00:08:43 +00:00
Rafael Espindola
e8cfbd843d
Remove unused argument.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129955 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21 23:39:26 +00:00
Devang Patel
71f3f1146f
Fix DWARF description of Q registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21 23:22:35 +00:00
Devang Patel
27f5acb7d4
Fix DWARF description of S registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21 22:48:26 +00:00
Devang Patel
64d3d12f37
As per ARM docs, register Dx is described as DW_OP_regx(256+x) in DWARF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21 17:51:06 +00:00
Justin Holewinski
326fb9d1fb
PTX: Expand useable register space
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129913 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21 16:08:02 +00:00