than the vector element type. Don't forget to
handle this when the insertion index is not a
constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53556 91177308-0d34-0410-b5e6-96231b3b80d8
extending load of a vector. Handle this case when
splitting vector loads. I'm not completely sure
what is supposed to happen, but I think it means
hi should be set to undef. LegalizeDAG does not
consider this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53555 91177308-0d34-0410-b5e6-96231b3b80d8
stores of one-element vectors. Also, neaten the
handling of INSERT_VECTOR_ELT when the inserted
type is larger than the vector element type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53554 91177308-0d34-0410-b5e6-96231b3b80d8
are used for passing huge immediates in inline ASM
from the front-end straight down to the ASM writer.
Of course this is a hack, but it is simple, limited
in scope, works in practice, and is what LegalizeDAG
does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53553 91177308-0d34-0410-b5e6-96231b3b80d8
use a timer group for the timers in SelectionDAGISel. Also,
Split scheduling out from emitting, to give each their own
timer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53476 91177308-0d34-0410-b5e6-96231b3b80d8
SINT_TO_FP libcall plus additional operations:
it might as well be a direct UINT_TO_FP libcall.
So only turn it into an SINT_TO_FP if the target
has special handling for SINT_TO_FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53461 91177308-0d34-0410-b5e6-96231b3b80d8
when working on legalizetypes. Both legalizetypes and legalizeops now
produce hte same code for CodeGen/ARM/fcopysign.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53435 91177308-0d34-0410-b5e6-96231b3b80d8
Lack of these caused a bootstrap failure with Fortran
on x86-64 with LegalizeTypes turned on. While there,
be nice to 16 bit machines and support expansion of
i32 too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53408 91177308-0d34-0410-b5e6-96231b3b80d8
makes their special-case checks of use_size() less beneficial,
so remove them. This eliminates all but one use of use_size(),
which is in AssignTopologicalOrder, which uses it only once for
each node, and so can reasonably afford to recompute it, as
this allows the UsesSize field of SDNode to be removed
altogether.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53377 91177308-0d34-0410-b5e6-96231b3b80d8
class, and store IsVolatile and Alignment in a more compact form.
This makes AtomicSDNode slightly larger, but it shrinks LoadSDNode
and StoreSDNode, which are much more common and are the largest of
the SDNode subclasses. Also, this lets the isVolatile() and
getAlignment() accessors be non-virtual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53361 91177308-0d34-0410-b5e6-96231b3b80d8
SINT_TO_FP and UINT_TO_FP. This now produces
the same code as LegalizeDAG (the previous
code was based on a mistaken idea of what
LegalizeDAG did in this case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53288 91177308-0d34-0410-b5e6-96231b3b80d8
available to getAtomic in addition to just getLoad and getStore,
to prevent MachineMemOperands with 0 alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53261 91177308-0d34-0410-b5e6-96231b3b80d8
soft float: experiments show that targets aren't
expecting this for results or for operands. Add
support select/select_cc result soft float and
correct operand soft float for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53245 91177308-0d34-0410-b5e6-96231b3b80d8
MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
and reused across SelectionDAGs.
This drastically reduces the number of calls to malloc/free made during
instruction selection, and improves memory locality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53211 91177308-0d34-0410-b5e6-96231b3b80d8
properly track dead nodes that are on the original SDNode's operand
list but not the new one, and have no other uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53201 91177308-0d34-0410-b5e6-96231b3b80d8
simple const SDOperand*, which is what's usually needed.
For AddNodeIDOperands, which is small, just duplicate the function to
accept an SDUse*.
For SelectionDAG::getNode - Add an overload that accepts SDUse* that
copies the operands into a temporary SDOperand array, but also has
special-case checks for 0 through 3 operands to avoid the copy in
the common cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53183 91177308-0d34-0410-b5e6-96231b3b80d8
that fixed problems in EmitStackConvert where the source and target type
have different alignment by creating a stack slot with the max
alignment of source and target type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53150 91177308-0d34-0410-b5e6-96231b3b80d8
hook for each way in which a result type can be
legalized (promotion, expansion, softening etc),
just use one: ReplaceNodeResults, which returns
a node with exactly the same result types as the
node passed to it, but presumably with a bunch of
custom code behind the scenes. No change if the
new LegalizeTypes infrastructure is not turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53137 91177308-0d34-0410-b5e6-96231b3b80d8
SelectionDAG::SelectNodeTo in the instruction selector. This
updates existing nodes in place instead of creating new ones.
Go back to selecting ISD::DBG_LABEL nodes into
TargetInstrInfo::DBG_LABEL nodes instead of leaving them
unselected, now that SelectNodeTo allows us to update them
in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53057 91177308-0d34-0410-b5e6-96231b3b80d8
to be passed the list of value types, and use this
where appropriate. Inappropriate places are where
the value type list is already known and may be
long, in which case the existing method is more
efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53035 91177308-0d34-0410-b5e6-96231b3b80d8
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
SelectionDAG::allnodes_size is linear, but that doesn't appear to
outweigh the benefit of reducing heap traffic. If it does become a
problem, we should teach SelectionDAG to keep a count of how many
nodes are live, because there are several other places where that
information would be useful as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52926 91177308-0d34-0410-b5e6-96231b3b80d8
purpose, and give it a custom SDNode subclass so that it doesn't
need to have line number, column number, filename string, and
directory string, all existing as individual SDNodes to be the
operands.
This was the only user of ISD::STRING, StringSDNode, etc., so
remove those and some associated code.
This makes stop-points considerably easier to read in
-view-legalize-dags output, and reduces overhead (creating new
nodes and copying std::strings into them) on code containing
debugging information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52924 91177308-0d34-0410-b5e6-96231b3b80d8
SmallVectors. Change the signature of TargetLowering::LowerArguments
to avoid returning a vector by value, and update the two targets
which still use this directly, Sparc and IA64, accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52917 91177308-0d34-0410-b5e6-96231b3b80d8
only needs one bit for each register. UsedRegs is a SmallVector
sized at 16, so this eliminates a heap allocation/free for every
call and return processed by Legalize on most targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52915 91177308-0d34-0410-b5e6-96231b3b80d8
it impossible to create a MERGE_VALUES node with
only one result: sometimes it is useful to be able
to create a node with only one result out of one of
the results of a node with more than one result, for
example because the new node will eventually be used
to replace a one-result node using ReplaceAllUsesWith,
cf X86TargetLowering::ExpandFP_TO_SINT. On the other
hand, most users of MERGE_VALUES don't need this and
for them the optimization was valuable. So add a new
utility method getMergeValues for creating MERGE_VALUES
nodes which by default performs the optimization.
Change almost everywhere to use getMergeValues (and
tidy some stuff up at the same time).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52893 91177308-0d34-0410-b5e6-96231b3b80d8
Move GetConstantStringInfo to lib/Analysis. Remove
string output routine from Constant. Update all
callers. Change debug intrinsic api slightly to
accomodate move of routine, these now return values
instead of strings.
This unbreaks llvm-gcc bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52884 91177308-0d34-0410-b5e6-96231b3b80d8
information of the original load or store, which is checked to be
at least as good, and possibly better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52849 91177308-0d34-0410-b5e6-96231b3b80d8
string output routine from Constant. Update all
callers. Change debug intrinsic api slightly to
accomodate move of routine, these now return values
instead of strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52748 91177308-0d34-0410-b5e6-96231b3b80d8
shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
awful codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52740 91177308-0d34-0410-b5e6-96231b3b80d8
For this it is convenient to permit floats to
be used with EXTRACT_ELEMENT, so I tweaked
things to allow that. I also added libcalls
for ppcf128 to i32 forms of FP_TO_XINT, since
they exist in libgcc and this case can certainly
occur (and does occur in the testsuite) - before
the i64 libcall was being used. Also, the
XINT_TO_FP result seemed to be wrong when
the argument is an i128: the wrong fudge
factor was added (the i32 and i64 cases were
handled directly, but the i128 code fell
through to some generic softening code which
seemed to think it was i64 to f32!). So I
fixed it by adding a fudge factor that I
found in my breakfast cereal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52739 91177308-0d34-0410-b5e6-96231b3b80d8
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
