Commit Graph

93951 Commits

Author SHA1 Message Date
Arnold Schwaighofer
7251a75f6e X86 cost model: Add cost for vectorized gather/scather
radar://14351991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186189 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 19:16:07 +00:00
Arnold Schwaighofer
4a1c764264 ARM cost model: Add cost for gather/scather
Fixes a 35% degradation compared to unvectorized code in
MiBench/automotive-susan and an equally serious regression on a private
image processing benchmark.

radar://14351991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186188 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 19:16:04 +00:00
Arnold Schwaighofer
c0a11edba6 TargetTransformInfo: address calculation parameter for gather/scather
Address calculation for gather/scather in vectorized code can incur a
significant cost making vectorization unbeneficial. Add infrastructure to add
cost.
Tests and cost model for targets will be in follow-up commits.

radar://14351991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186187 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 19:16:02 +00:00
Rafael Espindola
ec11706155 Relax the test a bit more to handle different UIDs and GIDs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 19:13:16 +00:00
Rafael Espindola
f671ab89a5 Relax test a bit to handle umask differences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186184 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:54:28 +00:00
Rafael Espindola
8f81325efc Add a test for the 'o' option in llvm-ar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186183 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:51:25 +00:00
Tom Stellard
c9c322cc39 R600/SI: Add support for f64 kernel arguments
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186182 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:15:26 +00:00
Tom Stellard
97781281ca R600/SI: Implement select and compares for SI
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186181 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:15:19 +00:00
Tom Stellard
513fc45629 R600/SI: Add fsqrt pattern for SI
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186180 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:15:13 +00:00
Tom Stellard
d2442c10f9 R600/SI: Add double precision fsub pattern for SI
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186179 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:15:08 +00:00
Tom Stellard
54453c11b4 R600/SI: SI support for 64bit ConstantFP
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186178 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:15:02 +00:00
Tom Stellard
68e1328662 R600/SI: Add initial double precision support for SI
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186177 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:14:56 +00:00
Tom Stellard
7a88b655cc R600: Add ISA documents to the CompilerWriterInfo page
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186176 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:14:40 +00:00
Michael Gottesman
4ff87aaf84 Fixed comment in header of Block Frequency Impl and added text for C++ mode.
This is a generic block implementation that works on more than machine blocks.
The C++ mode addition is a bonus due to the extra space provided.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186175 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:11:14 +00:00
Benjamin Kramer
b619dd5d5b X86: Shrink certain forms of movsx.
In particular:
movsbw %al, %ax   --> cbtw
movswl %ax, %eax  --> cwtl
movslq %eax, %rax --> cltq

According to Intel's manual those have the same performance characteristics but
come with a smaller encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186174 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 18:06:44 +00:00
Rafael Espindola
2494dfcf17 Add static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186170 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 16:29:27 +00:00
Stephen Lin
fff967358b X86: fold SSE2/AVX2 logical shift by immediate amount into zero vector when possible
Patch by Andrea Di Biagio


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186165 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 15:31:36 +00:00
Stephen Lin
55ec2218c4 Start using CHECK-LABEL in some tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186163 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 14:54:12 +00:00
Stephen Lin
178504b07b Add new directive called CHECK-LABEL to FileCheck.
CHECK-LABEL is meant to be used in place on CHECK on lines containing identifiers or other unique labels (they need not actually be labels in the source or output language, though.) This is used to break up the input stream into separate blocks delineated by CHECK-LABEL lines, each of which is checked independently. This greatly improves the accuracy of errors and fix-it hints in many cases, and allows for FileCheck to recover from errors in one block by continuing to subsequent blocks.

Some tests will be converted to use this new directive in forthcoming patches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186162 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 14:51:05 +00:00
Rafael Espindola
5e102c6c48 Don't reject an empty archive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186159 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 13:32:28 +00:00
Benjamin Kramer
7ffc422659 Mark MDNode::getOperand as readonly.
We can't inline it but we can still CSE calls to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186156 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 12:05:13 +00:00
Chandler Carruth
6f0ec20e8f Revert "indvars: Improve LFTR by eliminating truncation when comparing
against a constant."

This reverts commit r186107. It didn't handle wrapping arithmetic in the
loop correctly and thus caused the following C program to count from
0 to UINT64_MAX instead of from 0 to 255 as intended:

  #include <stdio.h>
  int main() {
    unsigned char first = 0, last = 255;
    do { printf("%d\n", first); } while (first++ != last);
  }

Full test case and instructions to reproduce with just the -indvars pass
sent to the original review thread rather than to r186107's commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186152 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 11:18:55 +00:00
Vladimir Medic
dd51a0c1e0 Add support for Mips break and syscall insructions. The corresponding test cases are added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186151 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 09:25:35 +00:00
Richard Sandiford
566fb9fe3e [SystemZ] Add test missing from r186148
Sigh, twice in two days sorry.  One day I'll remember...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186150 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 09:20:14 +00:00
Richard Sandiford
9bcad42c3a [SystemZ] Optimize sign-extends of vector setccs
Normal (sext (setcc ...)) sequences are optimised into
(select_cc ..., -1, 0) by DAGCombiner::visitSIGN_EXTEND.
However, this is deliberately not done for vectors, and after
vector type legalization we have (sext_inreg (setcc ...)) instead.

I wondered about trying to extend DAGCombiner to handle this case too,
but it seemed to be a loss on some other targets I tried, even those for
which SETCC isn't "legal" and SELECT_CC is.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186149 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 09:17:10 +00:00
Richard Sandiford
5e00954197 [SystemZ] Fix parsing of inline asm registers
GPR and FPR constraints like "{r2}" and "{f2}" weren't handled correctly
because the name-to-regno mapping depends on the value type and
(because of that) the internal names in RegStrings are not the
same as the AsmName.

CC constraints like "{cc}" didn't work either because there was no
associated register class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186148 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 09:08:12 +00:00
Richard Sandiford
6cf3cfa0ab [SystemZ] Improve spilling of LGDR and LDGR
If the source of these instructions is spilled we should load the destination.
If the destination is spilled we should store the source.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186147 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 08:37:17 +00:00
Shuxin Yang
a10369920f Stylistic change.
Thank Nick for figuring out these problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186146 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 07:25:38 +00:00
Nadav Rotem
523cd85b50 SLPVectorizer: Sink and enable CSE for ExtractElements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186145 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 06:09:24 +00:00
Charles Davis
ac226bbf45 Target/X86: Add explicit Win64 and System V/x86-64 calling conventions.
Summary:
This patch adds explicit calling convention types for the Win64 and
System V/x86-64 ABIs. This allows code to override the default, and use
the Win64 convention on a target that wants to use SysV (and
vice-versa). This is needed to implement the `ms_abi` and `sysv_abi` GNU
attributes.

Reviewers:

CC:

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186144 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 06:02:35 +00:00
NAKAMURA Takumi
6ebd77a6c3 llvm/test/Object/archive-toc.test: Use env(1) to satisfy win32 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186143 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 02:34:45 +00:00
NAKAMURA Takumi
99a8b54840 Windows/TimeValue.inc: Mute prefixed '0' on %d to emulate %e.
It fixes compatibility in llvm/test/Object/archive-toc.test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186142 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 02:13:03 +00:00
Manman Ren
da07e9df84 PEI: refactor replaceFrameIndices(MF) to call replaceFrameIndices(BB).
replaceFrameIndices(MF) will iterate over the BBs and call
replaceFrameIndices(BB). No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186141 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 00:37:01 +00:00
Nadav Rotem
931b861e3d SLPVectorize: Replace the code that checks for vectorization candidates in successor blocks with code that scans PHINodes.
Before we could vectorize PHINodes scanning successors was a good way of finding candidates. Now we can vectorize the phinodes which is simpler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186139 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 00:04:18 +00:00
David Dean
2c3c7fd696 Add the ability to use guarded malloc when running llvm lit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186134 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 23:36:57 +00:00
Benjamin Kramer
7172b38af7 llvm-ar: Clean up memory management with OwningPtr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186131 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 23:15:05 +00:00
Benjamin Kramer
459d7bf8f6 Sync SmallBitVector with BitVector. Add unit tests for the missing methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 21:59:16 +00:00
Michael Gottesman
7042aa598d Fixed up comments in TargetLowering.h to conform to the LLVM Style Guide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186121 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 21:38:33 +00:00
Adrian Prantl
fda6a08b49 In response to dblaikie's comment on r186035, replacing the
(reduced LLVM IR) + (full source in comment)
with the
(full LLVM IR) + (reduced src in comment)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186119 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 21:16:14 +00:00
Rafael Espindola
1051934164 Add tests for the before and after modifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186118 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 21:11:55 +00:00
Nadav Rotem
d6f0c34273 Remove an argument that we dont use anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186116 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 20:56:13 +00:00
Rafael Espindola
4d5b0da81b Use %llu to print a 64 bit number. Should fix the ARM bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186113 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 20:01:30 +00:00
Rafael Espindola
3a942ac858 Add a test for llvm-ar's m operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186110 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 19:09:04 +00:00
Hal Finkel
e2ff00e117 PPC: Add some missing V_SET0 patterns
We had patterns to match v4i32 immAllZerosV -> V_SET0, but not patterns for
v8i16 (which occurs in the test case) or v16i8. The same was true for
V_SETALLONES (so I added the associated patterns for those as well).

Another bug found by llvm-stress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186108 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 17:43:32 +00:00
Andrew Trick
53b28f8623 indvars: Improve LFTR by eliminating truncation when comparing against a constant.
Patch by Michele Scandale!

Adds a special handling of the case where, during the loop exit
condition rewriting, the exit value is a constant of bitwidth lower
than the type of the induction variable: instead of introducing a
trunc operation in order to match correctly the operand types, it
allows to convert the constant value to an equivalent constant,
depending on the initial value of the induction variable and the trip
count, in order have an equivalent comparison between the induction
variable and the new constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186107 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 17:08:59 +00:00
Hal Finkel
53c86db25b PPCDAGToDAGISel::isRunOfOnes should return false on zero
This fixes a bug (found by csmith) at -O0 where we attempt to create a RLWIMI
with an out-of-range operand. Most uses of the isRunOfOnes function are guarded
by a condition that the value is not zero. This was not true in two places, and
in both places a zero input would result in an out-of-rage MB value (= 32).

To fix this, isRunOfOnes returns false on a zero input (and I've remove one
now-redundant guard).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186101 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 16:31:51 +00:00
Craig Topper
9e639e8fd9 Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186098 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 16:22:38 +00:00
Rafael Espindola
73480481f4 Add back code for supporting old mingw versions. Should bring the bots back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186096 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 16:11:21 +00:00
Benjamin Kramer
0a230e0d98 Don't use a potentially expensive shift if all we want is one set bit.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186095 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 16:05:50 +00:00
Rafael Espindola
1b3e3eef1f InsertBefore is the same as AddBefore. Delete it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186094 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-11 15:54:53 +00:00