Benjamin Kramer
cd89d4d524
Revert "InstCombine: Turn mul.with.overflow(X, 2) into the cheaper add.with.overflow(X, X)"
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It's better to do this in codegen, mul.with.overflow(X, 2) is more canonical because it has only one use on "X".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131798 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 18:31:42 +00:00
Benjamin Kramer
c21b205f93
InstCombine: Turn mul.with.overflow(X, 2) into the cheaper add.with.overflow(X, X)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131789 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 09:22:06 +00:00
Dan Gohman
424b777171
When BasicAA can determine that two pointers have the same base but
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differ by a dynamic offset, return PartialAlias instead of MayAlias.
See the comment in the code for details. This fixes PR9971.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131781 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 01:05:08 +00:00
Eli Friedman
c088345f13
Add fast-isel support for byval calls on x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131764 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 22:21:04 +00:00
Rafael Espindola
b8adb8af0f
adds some attributes to attribute section when cpu is "xscale"
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(this is what used in Android NDK, when architecture is ARMv5)
patch by Koan-Sin Tan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131751 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 20:10:34 +00:00
Rafael Espindola
298c8e12ea
fixes target address tBL and tBLX and sets relocation type
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of tBL/tBLX to R_ARM_THM_CALL (ARM ELF 4.7.1.6)
Patch by koan-sin tan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131748 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 20:01:01 +00:00
Stuart Hastings
0e29ed081b
Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.
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rdar://problem/8614450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 19:04:40 +00:00
Akira Hatanaka
17a1e87751
Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle
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saving and restoring them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 18:39:33 +00:00
Chad Rosier
5def9657e4
Fixed regression due to commit 131709, which disables vararg tail call optimizations on Win64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131740 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 17:49:39 +00:00
Benjamin Kramer
eb274e6bdd
Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 15:11:26 +00:00
Cameron Zwarich
21a70bf4a5
Fix PR9960 by teaching SimpleRegisterCoalescing::AdjustCopiesBackFrom() to preserve
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the phikill flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131717 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 03:54:04 +00:00
Akira Hatanaka
cd0f90f831
Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 02:30:51 +00:00
Chad Rosier
a166089f36
Don't attempt to tail call optimize for Win64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131709 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 00:59:28 +00:00
Evan Cheng
2e6496026f
Revert r131664 and fix it in instcombine instead. rdar://9467055
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 00:54:37 +00:00
Eli Friedman
dc51575a5f
Add fast-isel support for zeroext and signext ret instructions on x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 22:16:13 +00:00
Rafael Espindola
78ff647e44
Looks like OS X assemblers (including MC) don't like
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foo:
bar = foo
.quad bar
Avoid producing it. Fixes PR9951.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131687 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 22:05:56 +00:00
Eric Christopher
2bbecd8f6d
Oddly people want to use the 'r' constraint for fp constants on x86.
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Fixes rdar://9218925
Fixes PR9601
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:33:47 +00:00
Eli Friedman
24a69c7be2
Fix up this test to use explicit triples (Win64 passes a different number of arguments in registers).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:13:08 +00:00
Jason W Kim
861b9c6a39
This fixes one divergence between LLVM and binutils for ARM in the
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text section.
Assume the following bit of annotated assembly:
.section .data.rel.ro,"aw",%progbits
.align 2
.LAlpha:
.long startval(GOTOFF)
.text
.align 2
.type main,%function
.align 4
main: ;;; assume "main" starts at offset 0x20
0x0 push {r11, lr}
0x4 movw r0, :lower16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-4) + 8) = -20
0x8 movt r0, :upper16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-8) + 8) = -16
0xc ... blah
.LBeta:
0x10 add r0, pc, r0
0x14 ... blah
.LGamma:
0x18 add r1, pc, r1
Above snippet results in the following relocs in the .o file for the
first pair of movw/movt instructions
00000024 R_ARM_MOVW_PREL_NC .LAlpha
00000028 R_ARM_MOVT_PREL .LAlpha
And the encoded instructions in the .o file for main: must be
00000020 <main>:
20: e92d4800 push {fp, lr}
24: e30f0fec movw r0, #65516 ; 0xffec i.e. -20
28: e34f0ff0 movt r0, #65520 ; 0xfff0 i.e. -16
However, llc (prior to this commit) generates the following sequence
00000020 <main>:
20: e92d4800 push {fp, lr}
24: e30f0fec movw r0, #65516 ; 0xffec - i.e. -20
28: e34f0fff movt r0, #65535 ; 0xffff - i.e. -1
What has to happen in the ArmAsmBackend is that if the relocation is PC
relative, the 16 bits encoded as part of movw and movt must be both addends,
not addresses. It makes sense to encode addresses by right shifting the value
by 16, but the result is incorrect for PIC.
i.e., the right shift by 16 for movt is ONLY valid for the NON-PCRel case.
This change agrees with what GNU as does, and makes the PIC code run.
MC/ARM/elf-movt.s covers this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131674 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:55:25 +00:00
Rafael Espindola
a3bff99f0a
ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S.
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Fixes PR9934.
We really need to start tblgening the relocation info :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:32:34 +00:00
Akira Hatanaka
a1a7ba8382
Align i64 arguments to 64 bit boundaries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:29:48 +00:00
Evan Cheng
0efaa5e6a1
crc32 with 64-bit output zeros upper 32-bits. rdar://9467055
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:57:12 +00:00
Stuart Hastings
26847d40db
Move test to Transforms/InstCombine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 05:53:22 +00:00
Rafael Espindola
cf227d5ad9
Add test for PR9946.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 02:35:26 +00:00
Eli Friedman
e6f364b6c4
More instcombine cleanup, towards improving debug line info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131604 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:58:37 +00:00
Tanya Lattner
db28247522
Handle perfect shuffle case that generates a vrev for vectors of floats.
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Add test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131582 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:44:54 +00:00
Dan Gohman
673968ae78
When forming an ICmpZero LSRUse, normalize the non-IV operand
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of the comparison, so that the resulting expression is fully
normalized. This fixes PR9939.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131576 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:02:18 +00:00
Johnny Chen
a96581f4f7
Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immediate operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131565 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 20:32:41 +00:00
Chad Rosier
871f664093
Enables vararg functions that pass all arguments via registers to be optimized into tail-calls when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 19:59:50 +00:00
Eli Friedman
59f15918c2
More instcombine cleanup aimed towards improving debug line info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 19:57:14 +00:00
Stuart Hastings
1f2cb9824d
An imminent fix to the x86_64 byval logic will expose a flaw in the
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x86_64 sibcall logic. I've filed PR9943 for the sibcall problem, and
this patch alters the testcase to work around the flaw. When PR9943
is fixed, this patch should be reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131557 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 19:19:17 +00:00
Eli Friedman
5ceb66692e
Force a triple on a couple of tests; we don't support fast-isel of ret on Win64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 17:16:37 +00:00
Stuart Hastings
11d26f109d
Merge pmovzx test case into existing file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 17:02:04 +00:00
Justin Holewinski
657d1bed23
PTX: add flag to disable mad/fma selection
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Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 15:42:23 +00:00
Duncan Sands
bb1695e333
Tighten up checking of the validity of casts. (1) The IR parser would
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happily accept things like "sext <2 x i32> to <999 x i64>". It would
also accept "sext <2 x i32> to i64", though the verifier would catch
that later. Fixed by having castIsValid check that vector lengths match
except when doing a bitcast. (2) When creating a cast instruction, check
that the cast is valid (this was already done when creating constexpr
casts). While there, replace getScalarSizeInBits (used to allow more
vector casts) with getPrimitiveSizeInBits in getCastOpcode and isCastable
since vector to vector casts are now handled explicitly by passing to the
element types; i.e. this bit should result in no functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 09:21:57 +00:00
Tanya Lattner
2a8eb722c7
In r131488 I misunderstood how VREV works. It splits the vector in half and splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32.
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Updated test case and reverted change to the PerfectShuffle Table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 06:42:21 +00:00
Eli Friedman
ef819d0ed8
Start trying to make InstCombine preserve more debug info. The idea here is to set the debug location on the IRBuilder, which will be then right location in most cases. This should magically give many transformations debug locations, and fixing places which are missing a debug location will usually just means changing the code creating it to use the IRBuilder.
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As an example, the change to InstCombineCalls catches a common case where a call to a bitcast of a function is rewritten.
Chris, does this approach look reasonable?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 01:28:27 +00:00
Eli Friedman
28b42afcb8
Make some of the fast-isel tests actually test fast-isel (and fix test failures).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131510 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 00:00:10 +00:00
Stuart Hastings
ca1ef48585
X86 pmovsx/pmovzx ignore the upper half of their inputs.
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rdar://problem/6945110
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131493 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 22:13:31 +00:00
Tanya Lattner
c81c9709ef
vrev is incorrectly defined in the perfect shuffle table. The ordering is backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 20:48:40 +00:00
Galina Kistanova
416b7117b7
Move test for appropriate directory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 19:06:43 +00:00
Eli Friedman
19515b4e52
Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872.
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This is r131438 with a couple small fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131474 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 18:29:03 +00:00
Stuart Hastings
71753050b1
Drop lli, revise test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131452 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 02:38:59 +00:00
Eli Friedman
c93943b6fe
Back out r131444 and r131438; they're breaking nightly tests. I'll look into
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it more tomorrow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 02:36:59 +00:00
Eli Friedman
b70eac42e7
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131444 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 00:39:14 +00:00
Evan Cheng
50ecb195e1
Add target triple so test doesn't fail on Windows machines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 00:15:58 +00:00
Eli Friedman
cdc9a20561
Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131438 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 00:13:47 +00:00
Jakob Stoklund Olesen
f5497fb1b4
Teach LiveInterval::isZeroLength about null SlotIndexes.
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When instructions are deleted, they leave tombstone SlotIndex entries.
The isZeroLength method should ignore these null indexes.
This causes RABasic to sometimes spill a callee-saved register in the
abi-isel.ll test, so don't run that test with -regalloc=basic. Prioritizing
register allocation according to spill weight can cause more registers to be
used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131436 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 23:50:05 +00:00
Eli Friedman
57f4b03621
Remove dead code. Fix associated test to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 21:28:22 +00:00
Eli Friedman
482feb33b2
Make fast-isel work correctly s/uadd.with.overflow intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 21:06:17 +00:00
Eli Friedman
2586b8f936
Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131417 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 20:27:46 +00:00
Rafael Espindola
6469540adf
sets bit 0 of the function address of thumb function in .symtab
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("T is 1 if the target symbol S has type STT_FUNC and the
symbol addresses a Thumb instruction ;it is 0 otherwise."
from "ELF for the ARM Architecture" 4.7.1.2)
Patch by Koan-Sin Tan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 16:17:21 +00:00
Rafael Espindola
0e00c6c561
Don't do tail calls in a function that call setjmp. The stack might be
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corrupted when setjmp returns again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 03:05:33 +00:00
Benjamin Kramer
dae3b57b91
Disable test harder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131363 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-14 19:30:39 +00:00
Stuart Hastings
47242e8680
Disable this test while I revise it. rdar://problem/9267970
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-14 18:39:05 +00:00
Benjamin Kramer
10fcfb53fd
SimplifyCFG: Use ComputeMaskedBits to prune dead cases from switch instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131345 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-14 15:57:25 +00:00
Stuart Hastings
67f071e697
Avoid combining GEPs that might overflow at runtime.
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rdar://problem/9267970
Patch by Julien Lerouge!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-14 05:55:10 +00:00
Rafael Espindola
a3f88148e6
Don't produce a vmovntdq if we don't have AVX support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131330 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-14 00:30:01 +00:00
Rafael Espindola
0cb3563363
Move test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131315 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 21:35:17 +00:00
Rafael Espindola
8d9e1c2aa0
Move test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131314 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 21:33:32 +00:00
Galina Kistanova
6f0b5e4a22
Move platform-dependent test to appropriate directory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131302 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 19:45:05 +00:00
Rafael Espindola
3fa8283744
Make codegen able to handle values of empty types. This is one way
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to fix PR9900. I will keep it open until sable is able to comment on it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131294 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 15:18:06 +00:00
Stuart Hastings
88882247d2
Since I can't reproduce the failures from 131261, re-trying with a
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simplified version. <rdar://problem/9298790>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131274 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 00:51:54 +00:00
Stuart Hastings
8ad145d729
Revert 131266 and 131261 due to buildbot complaints.
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rdar://problem/9298790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131269 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 00:15:17 +00:00
Stuart Hastings
4c576ca9db
Tweak 131261 (thumb2-cbnz.ll) to generate the intended cbnz.
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rdar://problem/9298790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 00:10:03 +00:00
Stuart Hastings
5adc646380
Non-fast-isel followup to 129634; correctly handle branches controlled
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by non-CMP expressions. The executable test case (129821) would test
this as well, if we had an "-O0 -disable-arm-fast-isel" LLVM-GCC
tester. Alas, the ARM assembly would be very difficult to check with
FileCheck.
The thumb2-cbnz.ll test is affected; it generates larger code (tst.w
vs. cmp #0 ), but I believe the new version is correct.
rdar://problem/9298790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131261 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12 23:36:41 +00:00
Galina Kistanova
60bf5c3197
Correction. Use explicit target triple in the test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131252 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12 21:55:34 +00:00
Evan Cheng
7139d35165
Re-enable branchfolding common code hoisting optimization. Fixed a liveness test bug and also taught it to update liveins.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131241 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12 20:30:01 +00:00
Stuart Hastings
007cfce220
Move this test to CodeGen/Thumb. rdar://problem/9416774
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131196 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 19:41:28 +00:00
Devang Patel
4243e67bd5
Identify end of prologue (and beginning of function body) using DW_LNS_set_prologue_end line table opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 19:22:19 +00:00
Stuart Hastings
e8b9f16a4c
Reduced test case. rdar://problem/9416774
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131191 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 17:29:25 +00:00
Owen Anderson
18901d63bf
Fix encoding of Thumb BLX register instructions. Patch by Koan-Sin Tan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 17:00:48 +00:00
Stuart Hastings
de5d5ded64
And lo, I was given a testcase for 131152. rdar://problem/9416774
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 16:00:21 +00:00
Nadav Rotem
42febc6e99
Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).
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If there is a store after the load node, then there is a chain, which means
that there is another user. Thus, asking hasOneUser would fail. Instead we
ask hasNUsesOfValue on the 'data' value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131183 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 14:40:50 +00:00
Nadav Rotem
4301222525
Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a splat vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 08:12:09 +00:00
Rafael Espindola
41cdc16e73
Revert 131172 as it is causing clang to miscompile itself. I will try
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to provide a reduced testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 03:27:17 +00:00
Evan Cheng
7e20a574eb
Add a late optimization to BranchFolding that hoist common instruction sequences
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at the start of basic blocks to their common predecessor. It's actually quite
common (e.g. about 50 times in JM/lencod) and has shown to be a nice code size
benefit. e.g.
pushq %rax
testl %edi, %edi
jne LBB0_2
## BB#1:
xorb %al, %al
popq %rdx
ret
LBB0_2:
xorb %al, %al
callq _foo
popq %rdx
ret
=>
pushq %rax
xorb %al, %al
testl %edi, %edi
je LBB0_2
## BB#1:
callq _foo
LBB0_2:
popq %rdx
ret
rdar://9145558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 01:03:01 +00:00
Rafael Espindola
88a5fb8f8f
Add triple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131169 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 23:14:29 +00:00
Rafael Espindola
6253c7ca60
Produce a __debug_frame section on darwin ARM when appropriate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131151 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 21:04:45 +00:00
Rafael Espindola
e3a0e987f3
On MachO, unlike ELF, there should be no relocation to produce the CIE pointer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131149 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 20:59:42 +00:00
Rafael Espindola
12f197b3bc
The EH symbols are only needed in eh_frame, not debug_frame.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131146 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 19:51:53 +00:00
Rafael Espindola
e29887b4ee
Use .cfi_sections to put the unwind info in .debug_frame when possible. With
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this clang will use .debug_frame in, for example,
clang -g -c -m32 test.c
This matches gcc's behaviour. It looks like .debug_frame is a bit bigger
than .eh_frame, but has the big advantage of not being allocated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131140 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 18:39:09 +00:00
Rafael Espindola
0d450dc659
In a debug_frame the cfi offset is to the start of the debug_frame section!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131129 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 15:20:23 +00:00
Justin Holewinski
f2453a3f2f
PTX: add test cases for cvt, fneg, and selp
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Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 14:53:13 +00:00
Rafael Espindola
40a7dbbeff
Add support for producing .deubg_frame sections.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131121 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 03:54:12 +00:00
Benjamin Kramer
f51190b697
X86: Add a bunch of peeps for add and sub of SETB.
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"b + ((a < b) ? 1 : 0)" compiles into
cmpl %esi, %edi
adcl $0, %esi
instead of
cmpl %esi, %edi
sbbl %eax, %eax
andl $1, %eax
addl %esi, %eax
This saves a register, a false dependency on %eax
(Intel's CPUs still don't ignore it) and it's shorter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-08 18:36:07 +00:00
Duncan Sands
e864b5b840
The comparision "max(x,y)==x" is equivalent to "x>=y". Since the max is
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often expressed as "x >= y ? x : y", there is a good chance we can extract
the existing "x >= y" from it and use that as a replacement for "max(x,y)==x".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-07 16:56:49 +00:00
Jakob Stoklund Olesen
bf4e10f2f6
Emit a proper error message when register allocators run out of registers.
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This can't be just an assertion, users can always write impossible inline
assembly. Such an assembly statement should be included in the error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 21:58:30 +00:00
Nick Lewycky
308fba5fe2
It's valid to take the blockaddress of a different function, so remove this
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assert in the bitcode writer. No change needed because the ValueEnumerator holds
a whole-module numbering anyhow. Fixes PR9857!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131016 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 21:09:44 +00:00
Galina Kistanova
9dabb78519
Move few target-dependant tests to appropriate directories.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131002 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 18:24:46 +00:00
Rafael Espindola
8b3db735f1
Pass -disable-cfi to llc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 18:01:58 +00:00
Rafael Espindola
e38c61597e
Pass -disable-cfi.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 17:44:58 +00:00
Justin Holewinski
ab0145d2a9
PTX: add PTX 2.3 language target
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Patch by Wei-Ren Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130980 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 11:40:36 +00:00
Duncan Sands
5389210e63
Fix PR9820: a read-only call differs from a load in that a load doesn't
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return the pointer being dereferenced, it returns the pointee, but a call
might return the pointer itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130979 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 10:30:37 +00:00
Eli Friedman
5e926ac651
Re-revert r130877; it's apparently causing a regression on 197.parser,
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possibly related to cbnz formation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130977 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 05:23:07 +00:00
Eli Friedman
b6e7cd655c
PR9838: Fix transform introduced in r127064 to not trigger when only one side of the icmp is an exact shift.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130954 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-05 21:59:18 +00:00
Rafael Espindola
7af1a59382
Don't produce a __debug_frame.
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I tested both gdb on a bootstrapped clang and and the gdb testsuite on OS X (snow leopard)
and both are happy using __eh_frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-05 18:43:39 +00:00
Galina Kistanova
300c1a11c8
Many LLVM tests relies on standard output stream be in the binary mode. Which is not always the case (on Windows in particular). The patch adds a test to verify that the standard output stream is actually in the binary mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-05 18:40:27 +00:00
Eli Friedman
23d3243e62
Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130928 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-05 16:53:34 +00:00
Jakob Stoklund Olesen
d41bd043d3
Fix test to be less sensitive to coalescing.
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This should unbreak llvm-gcc-i386-linux-selfhost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130927 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-05 16:48:00 +00:00