Devang Patel
794fd75c67
Do not use typeinfo to identify pass in pass manager.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36632 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 21:15:47 +00:00
Evan Cheng
1b20168433
Doh. PC displacement is between the constantpool and the add instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36630 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 20:27:19 +00:00
Evan Cheng
97de913821
eliminateFrameIndex() change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36626 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 09:13:03 +00:00
Evan Cheng
5c3885ce8e
Under normal circumstances, when a frame pointer is not required, we reserve
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argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36607 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 00:52:08 +00:00
Dale Johannesen
9118dbc7bd
Remove item: thumb padding in constant islands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36586 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 00:32:06 +00:00
Dale Johannesen
23c968478e
remove unused variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36585 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 00:30:48 +00:00
Lauro Ramos Venancio
0a1817392d
Enable protected visibility on ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36583 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 00:23:51 +00:00
Dale Johannesen
8593e41855
Rewrite of Thumb constant islands handling (exact allowance for padding
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around islands and jump tables).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36573 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29 19:19:30 +00:00
Dale Johannesen
8650199fbb
Make ARM-specific version of getInlineAsmLength
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36572 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29 19:17:45 +00:00
Dale Johannesen
caa8055cf5
change per review
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36519 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 00:36:37 +00:00
Dale Johannesen
25c1f9e125
Prevent Thumb code from generating ARM instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36518 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 22:17:18 +00:00
Lauro Ramos Venancio
4c6d20a096
add parenthesis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36514 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 20:10:08 +00:00
Evan Cheng
185ea1e2aa
Doh. ARM::LEApcrel is a single instruction MI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36513 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 18:27:13 +00:00
Lauro Ramos Venancio
fdc9692f97
In Thumb mode, the frame register must be R7.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36512 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 17:58:03 +00:00
Lauro Ramos Venancio
64f4fa5e0e
ARM TLS: implement "general dynamic", "initial exec" and "local exec" models.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36506 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 13:54:47 +00:00
Evan Cheng
b1df8f2750
Darwin runtime library does not have these.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36505 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 08:15:43 +00:00
Evan Cheng
768c9f725b
Special handling of LEApcrel and tLEApcrel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36504 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 08:14:15 +00:00
Evan Cheng
eec041a037
Back out previous check-in. Incorrect.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36503 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 07:50:02 +00:00
Evan Cheng
33fdc983fd
tLEApcrel is a AddrModeTs, i.e. pc relative.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36502 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 07:37:22 +00:00
Evan Cheng
faa510726f
Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36483 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 19:00:32 +00:00
Evan Cheng
6c087e5585
Match MachineFunction::UsedPhysRegs changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36452 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 22:13:27 +00:00
Lauro Ramos Venancio
305b8a5f62
remember to emit weak reference in one more case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36438 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 14:50:40 +00:00
Evan Cheng
1e341729dd
Relex assertions to account for additional implicit def / use operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36430 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 07:12:14 +00:00
Dale Johannesen
56c42ef3e4
Make Thumb funcs containing islands 4-byte aligned. Fix bugs maintaining
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BBOffsets and BBSizes when adjusting conditional branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36372 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-23 20:09:04 +00:00
Dale Johannesen
bd24f3f398
add Align field, and use when generating function alignment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36371 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-23 20:07:25 +00:00
Dale Johannesen
24fb52da3c
add isThumb (unused as yet)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36370 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-23 20:04:35 +00:00
Lauro Ramos Venancio
0ae4a3357a
Implement PIC for arm-linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36324 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-22 00:04:12 +00:00
Evan Cheng
ba647becb9
Specify S registers as D registers' sub-registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36280 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 21:20:10 +00:00
Chris Lattner
93305bc462
add a crazy idea
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36273 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 20:18:43 +00:00
Lauro Ramos Venancio
267bfb553e
Fix a bug in getFrameRegister.
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Reported by Raul Herbster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36262 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-19 14:09:38 +00:00
Chris Lattner
120fba91a3
dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36222 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 22:39:58 +00:00
Chris Lattner
3c30d10b04
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36203 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 18:03:00 +00:00
Anton Korobeynikov
bed2946a96
Removed tabs everywhere except autogenerated & external files. Add make
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target for tabs checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 18:10:23 +00:00
Chris Lattner
5a3d40d88f
arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13 06:50:55 +00:00
Chris Lattner
e11529438c
Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35909 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11 16:17:12 +00:00
Chris Lattner
eb13d1b710
restore support for negative strides
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35859 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10 03:48:29 +00:00
Chris Lattner
37caf8c68e
remove dead target hooks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35846 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 23:33:39 +00:00
Chris Lattner
b445d0cbb9
remove some dead target hooks, subsumed by isLegalAddressingMode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 22:27:04 +00:00
Evan Cheng
e21e39666e
Implement inline asm modifier P.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35640 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04 00:13:29 +00:00
Evan Cheng
0a7baa24d1
Typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35639 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04 00:06:07 +00:00
Evan Cheng
ed884f3a2f
Remove unused constant pool entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35635 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 23:39:48 +00:00
Evan Cheng
b03eacdbf3
Fixed a bug that causes codegen of noop like add r0, r0, #0 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35627 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 21:31:21 +00:00
Evan Cheng
3c5ad82ba2
Inverted logic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35619 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 06:44:25 +00:00
Chris Lattner
b2c594f350
Arm supports negative strides as well, add them. This lets us compile:
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CodeGen/ARM/arm-negative-stride.ll to:
LBB1_2: @bb
str r1, [r3, -r0, lsl #2 ]
add r0, r0, #1
cmp r0, r2
bne LBB1_2 @bb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35609 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 00:13:57 +00:00
Dale Johannesen
d959aa421a
fix off by 1 error in displacement computation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35602 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02 20:31:06 +00:00
Chris Lattner
6e0784da77
fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales
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to be folded into non-store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35601 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02 18:51:18 +00:00
Chris Lattner
c4e3f8e736
add support for the 'w' inline asm register class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35598 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02 17:24:08 +00:00
Lauro Ramos Venancio
9996663fc6
- Divides the comparisons in two types: comparisons that only use N and Z
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flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35573 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02 01:30:03 +00:00
Evan Cheng
3074d9df96
Add i16 address mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35551 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-01 08:06:46 +00:00
Chris Lattner
c9addb7488
implement the new addressing mode description hook.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35521 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 23:15:24 +00:00