Commit Graph

98594 Commits

Author SHA1 Message Date
Chad Rosier
73f468218f [AArch64] Refactor the NEON scalar floating-point reciprocal step and
floating-point reciprocal square root step LLVM AArch64 intrinsics to
use f32/f64 types, rather than their vector equivalents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197067 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 21:03:43 +00:00
Chad Rosier
c3e5d72ba8 [AArch64] Refactor the NEON scalar floating-point reciprocal estimate, floating-
point reciprocal exponent, and floating-point reciprocal square root estimate
LLVM AArch64 intrinsics to use f32/f64 types, rather than their vector
equivalents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197066 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 21:03:40 +00:00
Rafael Espindola
7dc7cc49a5 Don't set unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197064 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 20:40:57 +00:00
Logan Chien
e18ad3d4c8 [arm] Pass -triple to llvm-mc for ARM ELF test cases.
Replace -arch with -triple so that we can guarantee that
ELF object files can be generated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197062 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 19:38:10 +00:00
Tom Stellard
aa8dde50b7 R600: Re-format Processors.td
This makes it a little easier to read.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197058 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 17:51:51 +00:00
Tom Stellard
f8029c70e0 R600: Register AMDGPUCFGStructurizer pass
This enables -print-before-all to dump MachineInstrs after it is run.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197057 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 17:51:47 +00:00
Tom Stellard
23df2a7178 R600: Register R600EmitClauseMarkers pass
This enables -print-before-all to dump MachineInstrs after it is run.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197056 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 17:51:41 +00:00
Logan Chien
61f848360f [arm] Implement ARM .arch directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 17:16:25 +00:00
Benjamin Kramer
7a4d29e569 SelectionDAG: Fix a typo.
Found by "cppcheck". PR18208.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197047 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 16:36:09 +00:00
Tim Northover
ee06f15a0e ARM: constrain register-class in fast-isel
The tests were no longer using fast-isel at all (MachO needs an "ios" rather
than "darwin" triple at the moment and Linux needs ARM mode). Once that was
corrected, the verifier complained about a t2ADDri created for the alloca.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197046 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 16:04:57 +00:00
Alp Toker
00a9489ff3 Build fix for Android NDK which has neither futimes nor futimens
Based on a patch by Neil Henning!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197045 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 15:42:33 +00:00
Elena Demikhovsky
3bf51cf302 AVX-512: Removed "z" suffix from AVX-512 instructions, since it is incompatible with GCC.
I moved a test from avx512-vbroadcast-crash.ll to avx512-vbroadcast.ll
I defined HasAVX512 predicate as AssemblerPredicate. It means that you should invoke llvm-mc with "-mcpu=knl" to get encoding for AVX-512 instructions. I need this to let AsmMatcher to set different encoding for AVX and AVX-512 instructions that have the same mnemonic and operands (all scalar instructions).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197041 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 14:31:04 +00:00
Richard Sandiford
e54c1060a6 [SystemZ] Optimize fcmp X, 0 in cases where X is also negated
In such cases it's often better to test the result of the negation instead,
since the negation also sets CC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197032 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 11:45:08 +00:00
Richard Sandiford
3c14ba5962 Extend (truncate (load)) folding
DAGCombiner could fold (truncate (load)) -> smaller load if the original
load was the width of the truncation result or wider.  This patch extends
it to handle cases where the original load was narrower (and so the
extension type stays the same).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197030 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 11:37:27 +00:00
Manuel Klimek
255ee7df29 Fix XFAIL rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197017 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 08:38:42 +00:00
Rafael Espindola
b8f64112c9 Make this test a bit stricter.
The extra CHECK and CHECK-NEXT are there to show that we don't print a
linker private symbol on linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197003 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 04:10:41 +00:00
Andrew Trick
2e3f799f01 Add TargetRegisterInfo::reverseLocalAssignment hook.
This hook reverses the order of assignment for local live ranges. This
will generally allocate shorter local live ranges first. For targets with
many registers, this could reduce regalloc compile time by a large
factor. It should still achieve optimal coloring; however, it can change
register eviction decisions. It is disabled by default for two reasons:
(1) Top-down allocation is simpler and easier to debug for targets that
don't benefit from reversing the order.
(2) Bottom-up allocation could result in poor evicition decisions on some
targets affecting the performance of compiled code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197001 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 03:40:15 +00:00
Reed Kotler
d194a4ae67 Distinguish and choose 16 or 32 bit forms of save/restore for Mips16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196999 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 03:32:44 +00:00
Kevin Qin
ec5ebdec47 [AArch64 NEON] Get instruction BSL matched to VSELECT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196998 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 02:33:50 +00:00
Rafael Espindola
8514590ee9 Move mips' datalayout computation out of line and add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196996 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 01:41:10 +00:00
Rafael Espindola
a3b00b504e Move Sparc's getDataLayout out of line and add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196990 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 01:07:43 +00:00
NAKAMURA Takumi
0d87d72fa7 Prune redundant dependencies in LLVMBuild.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196988 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 00:30:57 +00:00
Rafael Espindola
23daba0cb2 Move PPC's getDataLayoutString out of line and document it better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196987 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 00:09:06 +00:00
Reid Kleckner
4d5bee428f Revert the backend fatal error from r196939
The combination of inline asm, stack realignment, and dynamic allocas
turns out to be too common to reject out of hand.

ASan inserts empy inline asm fragments and uses aligned allocas.
Compiling any trivial function containing a dynamic alloca with ASan is
enough to trigger the check.

XFAIL the test cases that would be miscompiled and add one that uses the
relevant functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196986 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 23:23:52 +00:00
Rafael Espindola
9e9622d63e Refactor the computation of the x86 datalayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196976 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 22:05:32 +00:00
Reid Kleckner
0e33b4574b [asan] Fix the coverage.cc test broken by r196939
It was failing because ASan was adding all of the following to one
function:
- dynamic alloca
- stack realignment
- inline asm

This patch avoids making the static alloca dynamic when coverage is
used.

ASan should probably not be inserting empty inline asm blobs to inhibit
duplicate tail elimination.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 21:49:28 +00:00
Matt Arsenault
17427fa9bb Use llvm_unreachable instead of assert(0)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196971 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 21:37:42 +00:00
David Fang
b59d46efa5 on darwin<10, fallback to .weak_definition (PPC,X86)
.weak_def_can_be_hidden was not yet supported by the system assembler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196970 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 21:37:41 +00:00
Chad Rosier
b2282508d3 [AArch64] Refactor the NEON floating-point absolute difference LLVM AArch64
intrinsic to use f32/f64 types, rather than their vector equivalents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196965 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 21:33:59 +00:00
Chad Rosier
2456ea5c92 [AArch64] Refactor the NEON signed/unsigned floating-point convert to fixed-point
LLVM AArch64 intrinsics to use f32/f64, rather than their vector equivalents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196964 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 21:33:56 +00:00
Chad Rosier
c000d11d5d [AArch64] Overload NEON signed/unsigned floating-point convert to fixed-point
and fixed-point convert to floating-point LLVM AArch64 intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196963 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 21:33:53 +00:00
Chad Rosier
d096a5c237 [AArch64] Overload NEON signed/unsigned integer convert to floating-point
LLVM AArch64 intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196962 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 21:33:50 +00:00
Matt Arsenault
bc54a09d20 R600/SI: Add i64 cmp tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196960 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 21:11:55 +00:00
Matt Arsenault
c5019a3d87 Fix gcc warnings.
Unused variable and unused typedef in release build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196947 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 18:55:37 +00:00
Reid Kleckner
7c30637b0e Reland "Fix miscompile of MS inline assembly with stack realignment"
This re-lands commit r196876, which was reverted in r196879.

The tests have been fixed to pass on platforms with a stack alignment
larger than 4.

Update to clang side tests will land shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196939 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 18:27:32 +00:00
Tim Northover
7af55ad434 Make Triple's isOSBinFormatXXX functions partition triple-space.
Most users would be surprised if "isCOFF" and "isMachO" were simultaneously
true, unless they'd put the compiler in a box with a gun attached to a photon
detector.

This makes sure precisely one of the three formats is true for any triple and
simplifies some target logic based on that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 16:57:43 +00:00
Alp Toker
8b71466c43 Support: Update documentation for Program functions
The docstrings were describing an older interface that has been replaced with
functions.

Also describe the performance characteristics of FindProgramByName() and
ExecuteAndWait() explaining when it's best to avoid them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 16:31:09 +00:00
Chad Rosier
fafd264de4 [AArch64] Refactor the Neon vector/scalar floating-point convert intrinsics so
that they use float/double rather than the vector equivalents when appropriate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196930 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 16:11:39 +00:00
Chad Rosier
72800f3a06 [AArch64] Refactor the Neon vector/scalar floating-point convert implementation.
Specifically, reuse the ARM intrinsics when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 15:35:33 +00:00
Andrea Di Biagio
4b3fcc21ec Ensure that the backend no longer emits unnecessary vector insert instructions
immediately after SSE scalar fp instructions like addss or mulss.

Added patterns to select SSE scalar fp arithmetic instructions from a scalar
fp operation followed by a blend.

For example, given the following code:
  __m128 foo(__m128 A, __m128 B) {
    A[0] += B[0];
    return A;
  }

previously we generated:
  addss %xmm0, %xmm1
  movss %xmm1, %xmm0

now we generate:
  addss %xmm1, %xmm0



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196925 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 15:22:48 +00:00
Rafael Espindola
bb0e2be6a3 Use Field Lists for the types' "Overview", "Syntax" and "Examples".
Thanks to Sean Silva for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 14:53:22 +00:00
Vincent Lejeune
a563c91840 R600: Fix an infinite loop when trying to reorganize export/tex vector input
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196923 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 14:43:31 +00:00
Vincent Lejeune
8ff689b443 R600: Fix input modifiers lost for Cayman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196922 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 14:43:27 +00:00
Reed Kotler
526522728c Next step in Mips16 prologue/epilogue cleanup.
Save S2(reg 18) only when we are calling floating point stubs that
have a return value of float or complex. Some more work to make this
better but this is the first step.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196921 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 14:29:38 +00:00
Elena Demikhovsky
8a8581ca4b AVX-512: changed intrinsics for mask operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196918 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 13:53:10 +00:00
Elena Demikhovsky
89458ced87 AVX-512: Changed intrinsics of VPCONFLICT to match GCC builtin form
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196914 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 11:58:35 +00:00
Tim Northover
9f84f21a4c Darwin: update default iOS version to 5.0
Defaulting to iOS 3.0 when LLVM has to guess the version is no longer a useful
option and can give surprising results (like tail calls being disabled).

5.0 seems like a reasonable compromise as a platform that's still interesting
to some people.

rdar://problem/15567348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196912 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 11:53:16 +00:00
NAKAMURA Takumi
b72dc0e146 [CMake] Add MCDisassembler to tools/lto. (has been removed since r196908)
lto.exports really exports LLVM-C Disasm stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 11:50:34 +00:00
Daniel Sanders
dafdc80765 [mips][msa] Correct sld and sldi builtins.
Summary: The result register of these instructions is also the first operand.

Reviewers: jacksprat, dsanders

Reviewed By: dsanders

Differential Revision: http://llvm-reviews.chandlerc.com/D2362
Differential Revision: http://llvm-reviews.chandlerc.com/D2363



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196910 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 11:37:00 +00:00
NAKAMURA Takumi
3aabdebde2 [CMake] Update LLVM_LINK_COMPONENTS for each CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196908 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10 11:13:32 +00:00