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Author SHA1 Message Date
Jim Grosbach
7c6e42e927 ARM Asm parser range checking for [0,31] immediates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135719 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 23:26:25 +00:00
Jim Grosbach
8409f04731 ARM parsing and encoding tests for SBC instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135718 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 23:03:59 +00:00
Benjamin Kramer
5333658df7 Initialize DenseSets lazily. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135717 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 23:03:59 +00:00
Jim Grosbach
8ae45af794 ARM testcases for SADD/SASX parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135715 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 23:00:49 +00:00
Jakub Staszak
9d81c97c8a Add missing getAnalysisUsage in MachineBlockFrequency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135714 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 22:59:09 +00:00
Jim Grosbach
f790193aec ARM assembly parsing support for RSC instruction. 
Add two-operand instruction aliases. Add parsing and encoding tests for
variants of the instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135713 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 22:56:30 +00:00
Jim Grosbach
86fdff0fa7 ARM assembly parsing support for RSB instruction. 
Add two-operand instruction aliases. Add parsing and encoding tests for
variants of the instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135712 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 22:37:43 +00:00
Jim Grosbach
616fbdf987 ARM parsing and encoding tests for RBIT, REV, REV16 and REVSH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135710 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 22:29:23 +00:00
Jim Grosbach
a4c34ab544 ARM parsing and encodings tests for saturating arithmetic insns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135709 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 22:18:28 +00:00
Jim Grosbach
43d3b31cda Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135706 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 21:26:05 +00:00
Nicolas Geoffray
a056d20167 Update generated CPP code with the new API on CallInst::Create and ConstantExpr::getGetElementPtr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135704 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 20:59:21 +00:00
Jim Grosbach
10c7d70a4e ARM assembly parsing POP/PUSH mnemonics. 
Aliases for LDM/STM. The single-register versions should encode to LDR/STR
with writeback, but we don't (yet) get that correct. Neither does Darwin's
system assembler, though, so that's not a deal-breaker of a limitation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135702 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 19:57:11 +00:00
Oscar Fuentes
45e11c7cc7 Fix CMake build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135698 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 19:10:57 +00:00
Jim Grosbach
61b1b21e9a Add tests for ARM PKH assembly parsing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135696 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 19:02:03 +00:00
Owen Anderson
92a202213b Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowing us to distinguish the encodings that use shifted registers from those that use shifted immediates. This is necessary to allow the fixed-length decoder to distinguish things like BICS vs LDRH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135693 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 18:54:16 +00:00
Andrew Trick
a305fe7545 Cleanup: make std::pair usage slightly less indecipherable without actually naming variables! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135684 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 17:37:39 +00:00
Benjamin Kramer
a50c175fe3 Sink parts of TargetRegisterClass into MCRegisterClass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135683 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 17:26:50 +00:00
Jim Grosbach
f6c0525d42 ARM assembly parsing and encoding for PKHBT and PKHTB instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135682 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 17:23:04 +00:00
Bruno Cardoso Lopes
dca6cdd6a1 Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir 
Stefanovic. I removed the part that actually emits the instructions cause
I want that to get in better shape first and in incremental steps. This
also makes it easier to review the upcoming parts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135678 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 16:28:51 +00:00
Jay Foad
4b5e207bf2 Make better use of ConstantExpr::getGetElementPtr's InBounds parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135676 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 15:15:37 +00:00
Jay Foad
b60e851c03 Sort case-insensitively. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135674 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 14:42:51 +00:00
Jay Foad
dab3d29605 Convert ConstantExpr::getGetElementPtr and 
ConstantExpr::getInBoundsGetElementPtr to use ArrayRef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135673 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 14:31:17 +00:00
Jay Foad
14732a1f42 Update llvm-gcc-4.2 and dragonegg after converting ConstantFolder APIs 
to use ArrayRef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135672 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 09:19:11 +00:00
Jay Foad
12fc16f195 Convert ConstantFolder APIs to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135671 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 07:52:17 +00:00
Chris Lattner
c30a38f34b move tier out of an anonymous namespace, it doesn't make sense 
to for it to be an an anon namespace and be in a header.

Eliminate some extraenous uses of tie.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135669 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 06:21:31 +00:00
Bruno Cardoso Lopes
dbd4fe2b0a - Register v16i16 as valid VR256 register class 
- Add more bitcasts for v16i16
- Since 135661 and 135662 already added the splat logic,
just add one more splat test for v16i16

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135663 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 02:24:08 +00:00
Bruno Cardoso Lopes
65b74e1d00 Add support for 256-bit versions of VPERMIL instruction. This is a new 
instruction introduced in AVX, which can operate on 128 and 256-bit vectors.
It considers a 256-bit vector as two independent 128-bit lanes. It can permute
any 32 or 64 elements inside a lane, and restricts the second lane to
have the same permutation of the first one. With the improved splat support
introduced early today, adding codegen for this instruction enable more
efficient 256-bit code:

Instead of:
  vextractf128  $0, %ymm0, %xmm0
  punpcklbw %xmm0, %xmm0
  punpckhbw %xmm0, %xmm0
  vinsertf128 $0, %xmm0, %ymm0, %ymm1
  vinsertf128 $1, %xmm0, %ymm1, %ymm0
  vextractf128  $1, %ymm0, %xmm1
  shufps  $1, %xmm1, %xmm1
  movss %xmm1, 28(%rsp)
  movss %xmm1, 24(%rsp)
  movss %xmm1, 20(%rsp)
  movss %xmm1, 16(%rsp)
  vextractf128  $0, %ymm0, %xmm0
  shufps  $1, %xmm0, %xmm0
  movss %xmm0, 12(%rsp)
  movss %xmm0, 8(%rsp)
  movss %xmm0, 4(%rsp)
  movss %xmm0, (%rsp)
  vmovaps (%rsp), %ymm0
We get:
  vextractf128  $0, %ymm0, %xmm0
  punpcklbw %xmm0, %xmm0
  punpckhbw %xmm0, %xmm0
  vinsertf128 $0, %xmm0, %ymm0, %ymm1
  vinsertf128 $1, %xmm0, %ymm1, %ymm0
  vpermilps $85, %ymm0, %ymm0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135662 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 01:55:47 +00:00
Bruno Cardoso Lopes
9283b668a1 Improve splat promotion to handle AVX types: v32i8 and v16i16. Also 
refactor the code and add a bunch of comments. The final shuffle
emitted by handling 256-bit types is suitable for the VPERM shuffle
instruction which is going to be introduced in a next commit (with
a testcase which cover this commit)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135661 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 01:55:42 +00:00
Bruno Cardoso Lopes
0e87805074 Add aditional patterns for vextractf128 instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135660 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 01:55:39 +00:00
Bruno Cardoso Lopes
df0e03ceb8 Add aditional patterns for vinsertf128 instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135659 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 01:55:36 +00:00
Bruno Cardoso Lopes
11bbb2003a Add v16i16 type to VR256 class 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135658 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 01:55:33 +00:00
Bruno Cardoso Lopes
bca4781b61 Move code around. No functionality changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135657 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 01:55:30 +00:00
Bruno Cardoso Lopes
67727cac2f Tidy up code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135656 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 01:55:27 +00:00
Andrew Trick
c205a094bd LSR, correct fix for rdar://9786536. Silly casting bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135654 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 01:45:54 +00:00
Andrew Trick
c2c988e5e0 LSR must sometimes sign-extend before generating double constants. 
rdar://9786536


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135650 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 01:05:01 +00:00
Bill Wendling
fb4eb165d6 Mark instructions which are part of the frame setup with the MachineInstr::FrameSetup flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135645 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 00:44:56 +00:00
Andrew Trick
37eb38d3f8 LSR crashes on an empty IVUsers list. 
rdar://9786536


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135644 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 00:40:04 +00:00
Evan Cheng
36c62d3cbe X86 is the only target that uses coff format. This should fixes test failures running on Windows, Cygwin, or MingW hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135639 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:53:54 +00:00
NAKAMURA Takumi
e65b7ecab8 docs/GettingStarted.html: Tweak style. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135637 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:37:51 +00:00
Evan Cheng
ee04a6d3a4 Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135636 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:34:39 +00:00
Bill Wendling
7bc3178182 Remove unused function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135635 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:07:42 +00:00
Bill Wendling
16da7366d5 Remove the now defunct getCompactUnwindEncoding method from the frame lowering code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135634 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:04:09 +00:00
Devang Patel
3737b89098 Refactor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135633 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:00:27 +00:00
NAKAMURA Takumi
947431eb88 docs/GettingStarted.html: Fix a typo and tweak a command line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135632 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 22:58:28 +00:00
Devang Patel
40c7e4142e There are two ways to map a variable to its lexical scope. Lexical scope information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135629 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 22:18:50 +00:00
Eli Friedman
747032522f Clean up includes of llvm/Analysis/ConstantFolding.h so it's included where it's used and not included where it isn't. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135628 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 21:57:23 +00:00
Devang Patel
4ec14b0dee While emitting constant value, look through derived type and use underlying basic type to determine size and signness of the constant value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135627 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 21:57:04 +00:00
Jim Grosbach
dde038af59 ARM PKH shift ammount operand printing tweaks. 
Move the shift operator and special value (32 encoded as 0 for PKHTB) handling
into the instruction printer. This cleans up a bit of the disassembler
special casing for these instructions, more easily handles not printing the
operand at all for "lsl #0" and prepares for correct asm parsing of these
operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135626 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 21:40:26 +00:00
Eli Friedman
73bfa4aecf Bring LICM into compliance with the new "Memory Model for Concurrent Operations" in LangRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135625 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 21:37:47 +00:00
Eli Friedman
5b60e1b6fc Commit LangRef changes for LLVM concurrency model. Start of supporting C++0x memory model and atomics. See thread on llvmdev titled "Reviving the new LLVM concurrency model". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135624 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 21:35:53 +00:00