Commit Graph

104637 Commits

Author SHA1 Message Date
Daniel Sanders
7cfd0ffb3b [mips] Add cache and pref instructions
Summary:
cache and pref were added in MIPS-III, and MIPS32 but were re-encoded in
MIPS32r6/MIPS64r6 to use a 9-bit offset rather than the 16-bit offset
available to earlier cores.

Resolved the decoding conflict between pref and lwc3.

Depends on D4115

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4116

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210900 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 13:15:59 +00:00
Daniel Sanders
ef8e567137 [mips][mips64r6] bc1any[24] are not available on MIPS32r6/MIPS64r6
Summary:
These MIPS-3D instructions have never been implemented in LLVM so we only
add testcases.

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4115

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210899 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 13:08:38 +00:00
Daniel Sanders
21ed78f564 [mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal is a normal instruction
Summary:
b(ge|lt)zal have been removed in MIPS32r6/MIPS64r6. However, bal (an alias
for 'bgezal $zero, $offset') still remains with the same encoding it had
prior to MIPS32r6/MIPS64r6.

Updated the MipsNaCLELFStreamer, and MipsLongBranch to correctly handle the
MIPS32r6/MIPS64r6 BAL instruction in addition to the existing BAL_BR pseudo.

No changes were required to the CodeGen test that looks for BAL
(test/CodeGen/Mips/longbranch.ll) since the new instruction has the same
syntax.

Depends on D4113

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210898 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 13:02:52 +00:00
Daniel Sanders
21c016f699 [mips][mips64r6] daddi is not available on MIPS64r6
Summary:
It's not emitted by the code generator so we only need assembler tests.

Also added missing daddi aliases from dsub mnemonics, and removed a couple
duplicate dsub tests.

Depends on D4112

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210897 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 12:49:06 +00:00
NAKAMURA Takumi
94afbc661f [Win32] Let utils/not aware of abort(), aka llvm_unreachable(), in msvcrt.
It has exit code as 3. abort(), aka unreachable, may be handled as crash.

FIXME: Could we move this into Win32/Program.inc?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210895 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 12:23:56 +00:00
NAKAMURA Takumi
c5865cb4fc llvm/test/CodeGen/X86/fast-isel-args-fail2.ll: Don't expect to fail with -Asserts. It might or might not crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210894 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 12:05:06 +00:00
Cameron McInally
a411d0e631 Add HasCDI predicate to AVX512 VPBROADCASTM*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210892 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 11:40:31 +00:00
Tim Northover
d5d864b553 CPP backend: set volatile property on atomic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210890 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 09:14:50 +00:00
Oliver Stannard
a19c2d4a6d ARM: Fix fastcc calling convention for Thumb1
When targetting Thumb1 on a processor which has a VFP unit (which
is not accessible from Thumb1), we were converting the fastcc calling
convention to AAPCS-VFP, which is not possible.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 08:33:03 +00:00
Matt Arsenault
efa4805b58 R600: Don't call setOperationAction with things that aren't opcodes.
CondCode actions are set with setCondCodeAction.
This should have been a harmless bug since the values seem to only
collide only with nodes that don't need to be handled, and these are
already correctly setup elsewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210888 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 07:44:38 +00:00
Matt Arsenault
d344c6bcf9 R600/SI: Fix selection error on i64 rotl / rotr.
Evergreen is still broken due to missing shl_parts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210885 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 04:00:30 +00:00
Rafael Espindola
250305156a Remove the last uses of 'using std::error_code'
This finishes the transition to std::error_code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210877 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 03:20:08 +00:00
Rafael Espindola
1ad45020ec Remove 'using std::error_code' from tools.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210876 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 03:07:50 +00:00
Rafael Espindola
7532b4038f Fix build on windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210873 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 02:36:09 +00:00
Rafael Espindola
4e2b922131 Remove 'using std::errro_code' from lib.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210871 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 02:24:39 +00:00
Juergen Ributzka
e431884ed7 [FastISel][X86] Add support for cvttss2si/cvttsd2si intrinsics.
This adds support for the cvttss2si/cvttsd2si intrinsics. Preceding
insertelement instructions are folded into the conversion instruction (if
possible).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210870 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 02:21:58 +00:00
Tom Stellard
6b0a08b15b R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210869 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 01:32:00 +00:00
Tom Stellard
ee0f3892f9 R600: Drop use of cached TargetMachine in R600InstrInfo.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210868 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 01:31:56 +00:00
Rafael Espindola
a20bcb9969 Remove all uses of 'using std::error_code' from headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210866 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 01:25:41 +00:00
Tom Stellard
aa48b83e80 R600: Drop use of cached TargetMachine in AMDGPUInstrInfo.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210865 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 01:02:57 +00:00
Juergen Ributzka
7f8d138f50 [FastISel][X86] - Add branch weights
Add branch weights to branch instructions, so that the following passes can
optimize based on it (i.e. basic block ordering).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210863 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 00:45:11 +00:00
Eric Christopher
f7a2d5e387 Move ARMSelectionDAGInfo from the TargetMachine to the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210862 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 00:20:39 +00:00
Eric Christopher
1ee246100e Move to a private function to initialize subtarget dependencies
so we can use initializer lists for the ARMSubtarget and then
use this to initialize a moved DataLayout on the subtarget from
the TargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210861 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 00:20:35 +00:00
Alexey Samsonov
740a75968a [DWARF parser] Fix broken address ranges construction.
Previous algorithm for constructing [Address ranges]->[Compile Units]
mapping was wrong. It somewhat relied on the assumption that address ranges
for different compile units may not overlap. It is not so.
For example, two compile units may contain the definition of the same
linkonce_odr function. These definitions will be merged at link-time,
resulting in equivalent .debug_ranges entries for both these units

Instead of sorting and merging original address ranges (from .debug_ranges
and .debug_aranges), implement a different approach: save endpoints
of all ranges, and then use a sweep-line approach to construct
the desired mapping. If we find that certain address maps to
several compilation units, we just pick any of them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210860 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 23:58:49 +00:00
Eric Christopher
9a81e28056 Have ARMSelectionDAGInfo take a DataLayout as it's argument as the
DAG has access to the subtarget and TargetSelectionDAGInfo only
needs a DataLayout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210859 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 23:39:49 +00:00
Juergen Ributzka
4eddf94a14 [FastISel][X86] Add MachineMemOperand to load/store instructions.
This commit adds MachineMemOperands to load and store instructions. This allows
the peephole optimizer to fold load instructions. Unfortunatelly the peephole
optimizer currently doesn't run at -O0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210858 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 23:27:57 +00:00
Eric Christopher
cccc317ee0 Move the PPCSelectionDAGInfo off the TargetMachine and onto the
subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210854 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 23:02:32 +00:00
Eric Christopher
8c5dc520ef Make PPCSelectionDAGInfo take a DataLayout instead of a TargetMachine
since that's all it needs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210853 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 22:56:48 +00:00
Eric Christopher
a7159144c2 Move PPCTargetLowering off of the TargetMachine and onto the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210852 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 22:50:10 +00:00
Eric Christopher
cb7dc25df1 Remove an extraneous this-> to access the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210849 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 22:38:20 +00:00
Eric Christopher
f6b9efa7db Rename PPCSubTarget to Subtarget in PPCTargetLowering for consistency.
Also remove an extra local subtarget in the initialization functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210848 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 22:38:18 +00:00
Andrew Trick
796f114767 Fix the scheduler's MaxObservedStall computation.
WenHan Gu pointed out this bug that results in an assert
not being effective in some cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210846 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 22:36:28 +00:00
Eric Christopher
4ecff11794 Move PPCJITInfo off of the TargetMachine and onto the subtarget.
Needed to migrate a few functions around to avoid circular header
dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210845 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 22:28:06 +00:00
Eric Christopher
ad807370e9 Remove the use of TargetMachine from PPCJITInfo and replace with
the subtarget. Also remove unnecessary argument to the constructor
at the same time, we already have access via the subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210844 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 22:19:51 +00:00
Rafael Espindola
01d3cb8167 Fix the build of KillTheDoctor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210843 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 22:16:55 +00:00
Richard Smith
f8f75df346 [modules] The LLVM C API does not require C++!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210842 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 22:09:39 +00:00
Eric Christopher
e3466d3777 Move PPCInstrInfo off of the target machine and onto the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210839 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 22:05:46 +00:00
Rafael Espindola
647ab7f728 Try to fix the windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210837 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:53:57 +00:00
Eric Christopher
f7ab98c252 Remove TargetMachine from PPCInstrInfo and all dependencies and
replace with the current subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210836 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:48:52 +00:00
Rafael Espindola
5c792faa0e Don't use 'using std::error_code' in include/llvm.
This should make sure that most new uses use the std prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210835 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:46:39 +00:00
Bob Wilson
7418e1f4bd Move test for r210734 to Feature/aliases.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210833 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:37:30 +00:00
Matt Arsenault
231097bc9d Delete trailing whitespace.
Hopefully this forces cmake to re-run.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210830 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:27:03 +00:00
Juergen Ributzka
cc738f8367 Update test case to use "not" instead of "XFAIL".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210829 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:17:40 +00:00
Duncan P. N. Exon Smith
3fdfffbfa3 GVN: Enable value forwarding for calloc
Enable value forwarding for loads from `calloc()` without an intervening
store.

This change extends GVN to handle the following case:

    %1 = tail call noalias i8* @calloc(i64 1, i64 4)
    %2 = bitcast i8* %1 to i32*
    ; This load is trivially constant zero
    %3 = load i32* %2, align 4

This is analogous to the handling for `malloc()` in the same places.
`malloc()` returns `undef`; `calloc()` returns a zero value.  Note that
it is correct to return zero even for out of bounds GEPs since the
result of such a GEP would be undefined.

Patch by Philip Reames!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210828 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:16:19 +00:00
Matt Arsenault
00c3986254 R600: Mostly remove remaining AMDIL intrinsics.
Delete all unused ones, and add new AMDGPU named intrinsics for
the ones that are. Handle the old AMDIL names for comptability (although
remove their GCCBuiltin names) and add tests since there weren't any
for these before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210827 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:15:44 +00:00
Eric Christopher
159a755d7c Move DataLayout from the PPCTargetMachine to the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210824 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:08:06 +00:00
Eric Christopher
054a74452c Move PPCFrameLowering into PPCSubtarget from PPCTargetMachine. Use
the initializeSubtargetDependencies code to obtain an initialized
subtarget and migrate a couple of subtarget using functions to the
.cpp file to avoid circular includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210822 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 20:54:11 +00:00
Bob Wilson
4cea00282f LangRef: clarify that global declarations can have section and alignment info.
I'm not sure what it means to set a section for a declaration in another
translation unit, but there are some tests in the tree that do it so it seems
to be legal now regardless.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210819 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 20:40:33 +00:00
Juergen Ributzka
c7147a3b6d [FastISel][X86] Argument lowering test case
This test case is supposed to xfail, because we do not handle structs or byval
arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210816 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 20:34:09 +00:00
Juergen Ributzka
3f2b28dcaf [FastIsel][X86] Add support for lowering the first 8 floating-point arguments.
Recommit with fixed argument attribute checking code, which is required to bail
out of all the cases we don't handle yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210815 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 20:12:34 +00:00