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Author SHA1 Message Date
Owen Anderson
7eca0e17ba Rename this test to better reflect its contents. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117067 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 21:40:15 +00:00
Tobias Grosser
0305724b9f Fix type in passes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117065 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 21:16:03 +00:00
Owen Anderson
35ea7a4022 Add tests for NEON encodings of vaddhn and vraddhn. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117064 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:56:57 +00:00
Michael J. Spencer
ef0401ad66 Fix Warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117062 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:49:38 +00:00
Michael J. Spencer
391b43bf33 X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan! 
This is needed for indirect calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117061 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:49:23 +00:00
Owen Anderson
90d4cf9314 Move the encoding logic for Q registers into getMachineOpValue(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117060 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:49:13 +00:00
Owen Anderson
4bcb949e18 Add tests for NEON encodings of vqadd, which was already correctly encoded. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117059 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:42:04 +00:00
Mikhail Glushenkov
84ba14f6d0 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117058 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:40:39 +00:00
Michael J. Spencer
5e0b2bf657 Support: Add Endian.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117057 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:28:21 +00:00
Owen Anderson
d451f888b8 ARM encodes Q registers as 2xregno (i.e. the number of the D register that corresponds to the lower 
half of the Q register), rather than with just regno.  This allows us to unify the encodings for
a lot of different NEON instrucitons that differ only in whether they have Q or D register operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117056 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:21:49 +00:00
Eric Christopher
5b924809e4 Handle storing args to the stack for calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117055 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:09:54 +00:00
Wesley Peck
4da992aeba Adding initial AsmParser implementation for the MBlaze backend. It is 
mostly based on the ARM AsmParser at this time and is not particularly
functional.

Changed the MBlaze data layout from:
    "E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-v64:32:32-v128:32:32-n32"
to:
    "E-p:32:32:32-i8:8:8-i16:16:16"
because the MicroBlaze doesn't have i64, f64, v64, or v128 data types.

Cleaned up the MBlaze source code:
    1. The floating point register class has been removed. The
       MicroBlaze does not have floating point registers. Floating
       point values are simply stored in integer registers.
    2. Renaming the CPURegs register class to GPR to reflect the
       standard naming.
    3. Removing a lot of stale code from AsmPrinter after
       the conversion to InstPrinter.
    4. Simplified sign extended loads by marking them as
       expanded in ISelLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117054 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 19:48:38 +00:00
Dan Gohman
bc078c81e6 Explain what "constant" means here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117053 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 19:45:09 +00:00
Eric Christopher
212ae937bb More load/store refactoring, call reg+offset simplification from within 
the emitter to handle the addresses. Only simplify the offset if we need
to - also fix bug where in addrmode 5 we weren't dividing the offset by
4, which showed up due to not always lowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117051 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 19:40:30 +00:00
Jim Grosbach
3ab5658a12 trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117050 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 19:38:40 +00:00
Dan Gohman
de38897cfc Update comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117048 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 19:01:22 +00:00
Owen Anderson
1e93466c3a Add correct NEON encodings for vhadd and vrhadd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117047 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 18:55:04 +00:00
Jakob Stoklund Olesen
9d999772df Don't include the destination interval in the union when computing 
Parent - union(Y, ...). Doh.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117042 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 18:47:08 +00:00
Jakob Stoklund Olesen
0a7bbcb0cc Permit landing pad successor blocks when verifying basic blocks that end in an 
unconditional branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117041 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 18:47:06 +00:00
Owen Anderson
9d50559bae Add correct encodings for NEON vaddw.s* and vaddw.u*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117040 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 18:20:25 +00:00
Owen Anderson
e0e6dc3f4e Provide correct NEON encodings for vaddl.u* and vaddl.s*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117039 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 18:09:17 +00:00
Rafael Espindola
8c8bc05a38 Do not recurse into symbol refs that have a variant kind. This prevents us 
from losing the variant when producing a relocation on an alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117037 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 18:00:20 +00:00
Kevin Enderby
0b9325c97d More tweaks to X86 instructions to allow the 'w' suffix in places it makes 
sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler allows
for these instructions.  Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 17:16:46 +00:00
Duncan Sands
bf9fc53f46 AlignLoc is never used for anything - zap it (gcc-4.6 warning). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117025 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 16:07:10 +00:00
Duncan Sands
dbbd99faf1 The return value of this call is not used, so no point 
in assigning it to a variable (gcc-4.6 warning).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117024 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 16:06:28 +00:00
Duncan Sands
2b55f56df8 RetOp is not actually used for anything useful (though 
it looks like maybe it was supposed to be used in the
test...), so zap it (gcc-4.6 warning).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117023 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 16:05:44 +00:00
Duncan Sands
9bc20ca728 The variable liTRC is not used for anything useful, zap it 
(gcc-4.6 warning).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117022 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 16:04:43 +00:00
Duncan Sands
6abfa46987 Remove some variables that are never really used 
(gcc-4.6 warns about these).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117021 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 16:03:28 +00:00
Duncan Sands
1e1ca0b56d Add parentheses to pacify gcc, which warns otherwise. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117020 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 16:02:12 +00:00
Duncan Sands
db732280a1 Argh, completely forgot to add this to the release notes! 
Better late than never, right?


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117009 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 14:40:02 +00:00
Duncan Sands
b35fd448ce Fix the cleanup process of exception information in JIT. Now JIT 
deregisters registered by it FDE structures allowing consecutive
JIT runs to succeed.  Patch by Yuri.  Fixes PR8285.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117004 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 08:57:29 +00:00
Bill Wendling
ba3f881007 Fix whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117002 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 06:25:08 +00:00
Wesley Peck
42bd9b30d9 Removing stale AsmPrinter directory from MicroBlaze backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116998 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 05:05:06 +00:00
Oscar Fuentes
b692360955 Deleted lib/Target/MBlaze/AsmPrinter/CMakeLists.txt. This way the 
CMake build does not try to build that library, which collides with
MBlaze/InstPrinter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116997 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 05:01:26 +00:00
Wesley Peck
4e9141fd4c Recommit 116986 with capitalization typo fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116993 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 03:57:26 +00:00
Andrew Trick
5b7a825ec5 putback r116983 and fix simple-fp-encoding.ll tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116992 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 03:40:16 +00:00
Wesley Peck
60e7127e86 Reverting the commit 116986. It was breaking the build on llvm-x86_64-linux though it 
compiles on OS X. I'll ensure that it builds on a linux machine before committing
again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116991 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 03:34:22 +00:00
Owen Anderson
d9707e3d85 Revert r116983, which is breaking all the buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116987 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 03:11:16 +00:00
Wesley Peck
13a949071c Major update of the MicroBlaze backend. The new features are: 
1. A delay slot filler that searches for valid instructions
       to fill the delay slot with. Previously NOPs would always
       be inserted into delay slots.
    2. Support for MC based instruction printer added.
    3. Support for MC based machine code generation and ELF
       file generation. ELF file generation does not yet
       completely work as much of the ELF support infrastructure
       is still x86/x86-64 specific.
    4. General clean up of the MBlaze backend code. Much of the
       tablegen code has been cleanup and simplified.

Bug Fixes:
    1. Removed duplicate periods from subtarget feature descriptions.
    2. Many of the instructions had bad machine code information
       in the tablegen files. Much of this has been fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116986 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 03:09:55 +00:00
Wesley Peck
17ffc52718 Adding the EM_MBLAZE value to the machine architectures enumeration to 
support future ELF file generation by the MBlaze backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116985 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 02:52:59 +00:00
Michael J. Spencer
e9c253e0bc X86: Add alloca probing to dynamic alloca on Windows. Fixes PR8424. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116984 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 01:41:01 +00:00
Evan Cheng
d6865de2d2 Add missing scheduling itineraries for transfers between core registers and VFP registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116983 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 01:12:00 +00:00
Owen Anderson
d7795540d0 Implement correct encodings for NEON vadd, both integer and floating point. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116981 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 00:48:00 +00:00
Michael J. Spencer
dd0a00a6e3 CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args. 
This should be the minimum set of functions that could possibly need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116978 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 00:08:21 +00:00
Eric Christopher
2d8f6fe610 Custom lower f64 args passed in integer registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116977 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 00:01:47 +00:00
Michael J. Spencer
6e56b18e57 Fix Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116972 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-20 23:40:27 +00:00
Bill Wendling
01aabdac44 Add encoding for moving a value between two ARM core registers and a doublework 
extension register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116970 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-20 23:37:40 +00:00
Jakob Stoklund Olesen
f1583ae84a Remember to keep track of rematted values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116962 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-20 22:50:42 +00:00
Bill Wendling
7d31a169af Add encodings for movement between ARM core registers and single-precision 
registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116961 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-20 22:44:54 +00:00
Dan Gohman
adb30d211b Memdep says that an instruction clobbers itself 
when it means there is no specific clobber instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116960 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-20 22:37:41 +00:00