Commit Graph

12899 Commits

Author SHA1 Message Date
Jim Grosbach
803b48a155 Now that the default is 'enabled,' a separate command line option for ARM is
not necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86621 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 23:11:45 +00:00
Jim Grosbach
92eb919e80 Enable dynamic stack realignment by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86604 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 22:32:40 +00:00
Jim Grosbach
ad353c74ad Set dynamic stack realignment to real values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 22:32:03 +00:00
Bill Wendling
2718e43d6a Similar to r86588, but for Darwin this time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86592 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 21:45:26 +00:00
Bill Wendling
b1ec31d711 The jump table was being generated before the end label for exception handling
was generated. This caused code like this:

## The asm code for the function
        .section        __TEXT,__const
        .align  2
lJTI11_0:
LJTI11_0:
        .long    LBB11_16
        .long    LBB11_4
        .long    LBB11_5
        .long    LBB11_6
        .long    LBB11_7
        .long    LBB11_8
        .long    LBB11_9
        .long    LBB11_10
        .long    LBB11_11
        .long    LBB11_12
        .long    LBB11_13
        .long    LBB11_14
Leh_func_end11:   ## <---now in the wrong section!

The `Leh_func_end11' would then end up in the wrong section, causing the
resulting EH frame information to be wrong:

__ZL11CheckRightsjPKcbRbRP6NSData.eh:
    .set    Lset500eh,Leh_frame_end11-Leh_frame_begin11
    .long   Lset500eh  ; Length of Frame Information Entry                                                                                                                   
Leh_frame_begin11:
    .long   Leh_frame_begin11-Leh_frame_common
    .long   Leh_func_begin11-.
    .set    Lset501eh,Leh_func_end11-Leh_func_begin11
    .long   Lset501eh                                   ; FDE address range                                                                                                                                   
`Lset501eh' is now something huge instead of the real value.

The X86 back-end generates the jump table after the EH information is
emitted. Do the same here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86588 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 21:20:14 +00:00
Jim Grosbach
43cca695a8 Work around assembler not recognizing #0.0 form immediate for vmcp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86548 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 15:27:51 +00:00
Bruno Cardoso Lopes
b8e0ebf034 Fix PR5149.
http://llvm.org/bugs/show_bug.cgi?id=5149



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86543 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 14:27:49 +00:00
Jim Grosbach
e5165490b7 Use Unified Assembly Syntax for the ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 00:11:35 +00:00
Anton Korobeynikov
f0b47b7f6d Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86471 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 15:33:12 +00:00
Anton Korobeynikov
830fe7bc2d Move OR patterns upper to all logical stuff. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 15:32:44 +00:00
Anton Korobeynikov
ff2c186d59 Some nice peephole patterns. Based on patch by Brian Lucas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86469 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 15:32:28 +00:00
Anton Korobeynikov
764cfaabd2 Print tab before operand of jcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 15:32:11 +00:00
Anton Korobeynikov
52f28e9b63 Fix invalid operand updates & implement post-inc memory operands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86466 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 14:27:38 +00:00
Anton Korobeynikov
773943ac5c Throw an error when stack realignment stuff fails instead of silent
code miscompilation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86463 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 12:58:40 +00:00
Chris Lattner
7e89738f98 Make TargetData::getStringRepresentation spit out native integer types,
this gives llvm-gcc generated modules the right data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86435 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 02:32:01 +00:00
Jim Grosbach
31bc849123 Use aligned load/store instructions for spilling Q registers when we know the stack slot is 128 bit aligned
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 00:27:19 +00:00
Evan Cheng
fdc834046e Refactor code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 00:15:23 +00:00
Nate Begeman
0b10b91465 x86 vector shuffle cleanup/fixes:
1. rename the movhp patfrag to movlhps, since thats what it actually matches
2. eliminate the bogus movhps load and store patterns, they were incorrect.  The load transforms are already handled (correctly) by shufps/unpack.
3. revert a recent test change to its correct form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86415 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 23:17:15 +00:00
Jim Grosbach
31c24bf5b3 80-column cleanup of file header comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86408 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 22:00:39 +00:00
Jim Grosbach
8a5ec86a3d Support alignment specifier for NEON vld/vst instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 21:25:39 +00:00
Nick Lewycky
f80fcd00b3 Improve tail call elimination to handle the switch statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86403 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 21:10:15 +00:00
Evan Cheng
bf992817f2 t2ldrpci_pic can be used for blockaddress as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86400 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 19:40:04 +00:00
Chris Lattner
59a9178fbe indicate what the native integer types for the target are.
Please verify.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86397 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 19:07:32 +00:00
Anton Korobeynikov
06ac0820a6 First try of the post-inc operands handling... Not fully worked, though :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86386 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:15:25 +00:00
Anton Korobeynikov
6534f83ae8 Add some dummy support for post-incremented loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86385 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:15:06 +00:00
Anton Korobeynikov
8983da729a Add 8 bit libcalls and make use of them for msp430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86384 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:14:39 +00:00
Anton Korobeynikov
8046ef4379 Add few pseudo-source-values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:13:57 +00:00
Anton Korobeynikov
123ed8f099 Initial support for addrmode handling. Tests by Brian Lucas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:13:35 +00:00
Anton Korobeynikov
603fce9ebb Some preliminary variable asmprinting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:12:58 +00:00
Anton Korobeynikov
5c192fbe45 Use '.L' for global private prefix (as mspgcc)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:12:38 +00:00
Anton Korobeynikov
b7790e11c4 Drop old asmprinter stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:12:21 +00:00
Anton Korobeynikov
e8ea011cc7 It turns out that the testcase in question uncovered subreg-handling bug.
Add assert in asmprinter to catch such cases and xfail the tests.
PR is to be filled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86375 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 15:20:32 +00:00
Chris Lattner
e82bdc4809 add the ability for TargetData to return information about legal integer
datatypes on a given CPU.  This is intended to allow instcombine and other
transformations to avoid converting big sequences of operations to an
inconvenient width, and will help clean up after SRoA.  See also "Adding 
legal integer sizes to TargetData" on Feb 1, 2009 on llvmdev, and PR3451.

Comments welcome.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86370 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 09:35:34 +00:00
Chris Lattner
2e07494170 more cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86369 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 09:23:04 +00:00
Chris Lattner
8f9b0f6e88 add some missing #includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86367 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 09:20:54 +00:00
Chris Lattner
b7aadfac5e rewrite TargetData to use StringRef/raw_ostream instead of thrashing std::strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 09:13:23 +00:00
Jeffrey Yasskin
2d274412ed Make the need-stub variables accurate and consistent. In the case of
MachineRelocations, "stub" always refers to a far-call stub or a
load-a-faraway-global stub, so this patch adds "Far" to the term. (Other stubs
are used for lazy compilation and dlsym address replacement.) The variable was
also inconsistent between the positive and negative sense, and the positive
sense ("NeedStub") was more demanding than is accurate (since a nearby-enough
function can be called directly even if the platform often requires a stub).
Since the negative sense causes double-negatives, I switched to
"MayNeedFarStub" globally.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 08:51:52 +00:00
Eric Christopher
761411c21b Fix a couple of shuffle patterns to use movhlps instead
of movhps as the constraint.  Changes optimizations so
update testcases as appropriate as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 08:45:53 +00:00
Mon P Wang
0ace1a9f30 Fixed Overload table bug noticed by Jakob
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86332 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 04:07:33 +00:00
Evan Cheng
d457e6e9a5 Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86330 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 04:04:34 +00:00
Evan Cheng
78e5c1140a - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
except it doesn't care if the definitions' virtual registers differ. This is
  used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
  Since pc relative constantpool entries are always different, this requires it
  it check if the values can actually the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 03:52:02 +00:00
Ted Kremenek
b6aae88ac0 Update CMake file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86325 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 03:26:59 +00:00
Kenneth Uildriks
b4997aeab7 Add code to check at SelectionDAGISel::LowerArguments time to see if return values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86324 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 02:11:54 +00:00
Johnny Chen
0430152a11 My previous patch (r84124) for setting the encoding bits 4 and 7 of DPSoRegFrm
was wrong and too aggressive in the sense that DPSoRegFrm includes both constant
shifts (with Inst{4} = 0) and register controlled shifts (with Inst{4} = 1 and
Inst{7} = 0).  The 'rr' fragment of the multiclass definitions actually means
register/register with no shift, see A8-11.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86319 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 00:54:36 +00:00
Jim Grosbach
bd79fc8ef2 80-columns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86310 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 00:13:30 +00:00
Evan Cheng
b9803a8fa6 - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative
load of a GV from constantpool and then add pc. It allows the code sequence to
  be rematerializable so it would be hoisted by machine licm.
- Add a late pass to break these pseudo instructions into a number of real
  instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm
  to this pass. This is done before post regalloc scheduling to allow the
  scheduler to proper schedule these instructions. It also allow them to be
  if-converted and shrunk by later passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86304 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:52:48 +00:00
Anton Korobeynikov
fc2cba8362 Honour subreg machine operands during asmprinting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86303 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:45:15 +00:00
Bob Wilson
54c78ef2fe Print VMOV (immediate) operands as hexadecimal values. Apple's assembler
will not accept negative values for these.  LLVM's default operand printing
sign extends values, so that valid unsigned values appear as negative
immediates.  Print all VMOV immediate operands as hex values to resolve this.
Radar 7372576.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86301 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:33:28 +00:00
Evan Cheng
e7e0d62efd Remove ARMPCLabelIndex from ARMISelLowering. Use ARMFunctionInfo::createConstPoolEntryUId() instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 22:24:13 +00:00
Daniel Dunbar
2928c83b01 Pass StringRef by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86251 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 10:58:06 +00:00