Commit Graph

20 Commits

Author SHA1 Message Date
Saleem Abdulrasool
27b1252c13 ARM: fixup more tests to specify the target more explicitly
This changes the tests that were targeting ARM EABI to explicitly specify the
environment rather than relying on the default.  This breaks with the new
Windows on ARM support when running the tests on Windows where the default
environment is no longer EABI.

Take the opportunity to avoid a pointless redirect (helps when trying to debug
with providing a command line invocation which can be copy and pasted) and
removing a few greps in favour of FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 16:01:44 +00:00
Daniel Sanders
38c6b58eec Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
Summary:
AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for
targets with mature MC support. Such targets will always parse the inline
assembly (even when emitting assembly). Targets without mature MC support
continue to use EmitRawText() for assembly output.

The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced
with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler
to parse inline assembly (even when emitting assembly output). UseIntegratedAs
is set to true for targets that consider any failure to parse valid assembly
to be a bug. Target specific subclasses generally enable the integrated
assembler in their constructor. The default value can be overridden with
-no-integrated-as.

All tests that rely on inline assembly supporting invalid assembly (for example,
those that use mnemonics such as 'foo' or 'hello world') have been updated to
disable the integrated assembler.

Changes since review (and last commit attempt):
- Fixed test failures that were missed due to configuration of local build.
  (fixes crash.ll and a couple others).
- Fixed tests that happened to pass because the local build was on X86
  (should fix 2007-12-17-InvokeAsm.ll)
- mature-mc-support.ll's should no longer require all targets to be compiled.
  (should fix ARM and PPC buildbots)
- Object output (-filetype=obj and similar) now forces the integrated assembler
  to be enabled regardless of default setting or -no-integrated-as.
  (should fix SystemZ buildbots)

Reviewers: rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2686



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201333 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-13 14:44:26 +00:00
Daniel Sanders
7580df334e Revert r201237+r201238: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
It introduced multiple test failures in the buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201241 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-12 15:39:20 +00:00
Daniel Sanders
57edb9588b Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
Summary:
AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output.

The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as.

All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler.

Reviewers: rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201237 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-12 14:44:54 +00:00
Tim Northover
645efd763d ARM: force soft-float ABI for tests depending on it.
This should fix the ARM bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197555 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-18 09:58:06 +00:00
Kristof Beyls
b1d081230e Make ARMAsmParser accept the correct alignment specifier syntax in instructions.
The parser will now accept instructions with alignment specifiers written like
    vld1.8  {d16}, [r0:64]
, while also still accepting the incorrect syntax
    vld1.8  {d16}, [r0, :64]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175164 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 14:46:12 +00:00
Bob Wilson
9cd2b9562d Implement 'e' and 'f' modifiers for Neon inline asm. <rdar://problem/10551006>
These modifiers simply select either the low or high D subregister of a Neon
Q register.  I've also removed the unimplemented 'p' modifier, which turns out
to be a bit different than the comment here suggests and as far as I can tell
was only intended for internal use in Apple's version of gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146417 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 21:45:15 +00:00
Eric Christopher
ef7f1e71f7 Add support for the 'Q' constraint.
Fixes rdar://9866494


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 21:18:58 +00:00
Eric Christopher
5e653c925c Add support for the 'j' immediate constraint. This is conditionalized on
supporting the instruction that the constraint is for 'movw'.

Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134222 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 01:00:07 +00:00
Eric Christopher
d5dc9eca2b Add support for the ARM 't' register constraint. And another testcase
for the 'x' register constraint.

Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134220 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 00:30:46 +00:00
Eric Christopher
89bd71fc53 Add support for the 'x' constraint.
Part of rdar://9307836 and rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134215 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 00:14:47 +00:00
Eric Christopher
ec281c8934 Another possible bug. Stopgap until we can autogenerate tables and
constraint lengths.

Part of rdar://9037836 and rdar://9119939



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132598 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 22:09:12 +00:00
Eric Christopher
ce1ecf59c8 Fix an off by one error.
Part of rdar://9037836 and rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:44:52 +00:00
Eric Christopher
cf714d44b8 Make the Uv constraint a memory operand. This doesn't solve the
addressing mode problem mentioned in r132559.

Backend part of rdar://9037836 and part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 17:24:37 +00:00
Eric Christopher
9aaa02a1d2 Allow bitcasts between valid types of the same size and vector
types if the vector type is legal.

Fixes rdar://9306086


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 19:55:10 +00:00
Jakob Stoklund Olesen
775c3e5824 Make tests register allocation independent again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19 00:14:43 +00:00
Bob Wilson
7d24705f65 Change register allocation order for ARM VFP and NEON registers to put the
callee-saved registers at the end of the lists.  Also prefer to avoid using
the low registers that are in register subclasses required by certain
instructions, so that those registers will more likely be available when needed.
This change makes a huge improvement in spilling in some cases.  Thanks to
Jakob for helping me realize the problem.

Most of this patch is fixing the testsuite.  There are quite a few places
where we're checking for specific registers.  I changed those to wildcards
in places where that doesn't weaken the tests.  The spill-q.ll and
thumb2-spill-q.ll tests stopped spilling with this change, so I added a bunch
of live values to force spills on those tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 06:15:13 +00:00
Rafael Espindola
1e81966626 Remove arm_apcscc from the test files. It is the default and doing this
matches what llvm-gcc and clang now produce.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106221 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17 15:18:27 +00:00
Bob Wilson
5afffaed5c Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types.  Radar 7457110.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:03:29 +00:00
Evan Cheng
d831cda3e7 - Support inline asm 'w' constraint for 128-bit vector types.
- Also support the 'q' NEON registers asm code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 23:06:22 +00:00